| /llvm-project-15.0.7/llvm/lib/Target/AMDGPU/ |
| H A D | AMDGPUSubtarget.cpp | 39 #define AMDGPUSubtarget GCNSubtarget
57 GCNSubtarget::~GCNSubtarget() = default;
59 GCNSubtarget &
159 GCNSubtarget::GCNSubtarget(const Triple &TT, StringRef GPU, StringRef FS, in GCNSubtarget() function in GCNSubtarget
588 bool GCNSubtarget::hasMadF16() const { in hasMadF16()
592 bool GCNSubtarget::useVGPRIndexMode() const { in useVGPRIndexMode()
596 bool GCNSubtarget::useAA() const { return UseAA; } in useAA()
676 unsigned GCNSubtarget::getBaseMaxNumSGPRs( in getBaseMaxNumSGPRs()
758 unsigned GCNSubtarget::getBaseMaxNumVGPRs( in getBaseMaxNumVGPRs()
897 const GCNSubtarget &ST = DAGInstrs->MF.getSubtarget<GCNSubtarget>(); in apply()
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| H A D | AMDGPUResourceUsageAnalysis.h | 23 class GCNSubtarget; variable
45 int32_t getTotalNumSGPRs(const GCNSubtarget &ST) const;
48 int32_t getTotalNumVGPRs(const GCNSubtarget &ST, int32_t NumAGPR,
50 int32_t getTotalNumVGPRs(const GCNSubtarget &ST) const;
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| H A D | SIFrameLowering.cpp | 67 const GCNSubtarget &ST = MF.getSubtarget<GCNSubtarget>(); in getVGPRSpillLaneOrTempRegister()
194 const GCNSubtarget &ST = MF.getSubtarget<GCNSubtarget>(); in emitEntryFunctionFlatScratchInit()
350 const GCNSubtarget &ST = MF.getSubtarget<GCNSubtarget>(); in getEntryFunctionReservedScratchRsrcReg()
419 const GCNSubtarget &ST = MF.getSubtarget<GCNSubtarget>(); in emitEntryFunctionPrologue()
537 const GCNSubtarget &ST = MF.getSubtarget<GCNSubtarget>(); in emitEntryFunctionScratchRsrcRegSetup()
713 const GCNSubtarget &ST = MF.getSubtarget<GCNSubtarget>(); in buildScratchExecCopy()
754 const GCNSubtarget &ST = MF.getSubtarget<GCNSubtarget>(); in emitPrologue()
965 const GCNSubtarget &ST = MF.getSubtarget<GCNSubtarget>(); in emitEpilogue()
1110 const GCNSubtarget &ST = MF.getSubtarget<GCNSubtarget>(); in processFunctionBeforeFrameFinalized()
1217 const GCNSubtarget &ST = MF.getSubtarget<GCNSubtarget>(); in processFunctionBeforeFrameIndicesReplaced()
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| H A D | AMDGPUAsmPrinter.cpp | 195 const GCNSubtarget &STM = MF->getSubtarget<GCNSubtarget>(); in emitFunctionBodyStart()
261 const GCNSubtarget &STM = MF->getSubtarget<GCNSubtarget>(); in emitFunctionBodyEnd()
285 const GCNSubtarget &STM = MF->getSubtarget<GCNSubtarget>(); in emitFunctionEntryLabel()
430 const GCNSubtarget &STM = MF.getSubtarget<GCNSubtarget>(); in getAmdhsaKernelDescriptor()
475 const GCNSubtarget &STM = MF.getSubtarget<GCNSubtarget>(); in runOnMachineFunction()
657 const GCNSubtarget &STM = TM.getSubtarget<GCNSubtarget>(F); in initializeTargetID()
669 const GCNSubtarget &STM = MF.getSubtarget<GCNSubtarget>(); in getFunctionCodeSize()
693 const GCNSubtarget &STM = MF.getSubtarget<GCNSubtarget>(); in getSIProgramInfo()
966 const GCNSubtarget &STM = MF.getSubtarget<GCNSubtarget>(); in EmitProgramInfoSI()
1029 const GCNSubtarget &STM = MF.getSubtarget<GCNSubtarget>(); in EmitPALMetadata()
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| H A D | SILowerSGPRSpills.cpp | 83 const GCNSubtarget &ST = MF.getSubtarget<GCNSubtarget>(); in insertCSRSaves()
125 const GCNSubtarget &ST = MF.getSubtarget<GCNSubtarget>(); in insertCSRRestores()
198 const GCNSubtarget &ST = MF.getSubtarget<GCNSubtarget>(); in spillCalleeSavedRegs()
247 const GCNSubtarget &ST = MF.getSubtarget<GCNSubtarget>(); in runOnMachineFunction()
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| H A D | SIMachineFunctionInfo.cpp | 56 const GCNSubtarget &ST = MF.getSubtarget<GCNSubtarget>(); in SIMachineFunctionInfo()
211 const GCNSubtarget& ST = MF.getSubtarget<GCNSubtarget>(); in limitOccupancy()
290 const GCNSubtarget &ST = MF.getSubtarget<GCNSubtarget>(); in haveFreeLanesForSGPRSpill()
304 const GCNSubtarget &ST = MF.getSubtarget<GCNSubtarget>(); in allocateSGPRSpillToVGPR()
375 const GCNSubtarget &ST = MF.getSubtarget<GCNSubtarget>(); in allocateVGPRSpillToAGPR()
513 const GCNSubtarget &ST = MF.getSubtarget<GCNSubtarget>(); in getGITPtrLoReg()
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| H A D | AMDGPUGlobalISelUtils.h | 19 class GCNSubtarget; variable
29 bool hasAtomicFaddRtnForTy(const GCNSubtarget &Subtarget, const LLT &Ty);
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| H A D | GCNVOPDUtils.cpp | 40 const GCNSubtarget &ST = MF->getSubtarget<GCNSubtarget>(); in checkVOPDRegConstraints()
181 const GCNSubtarget &ST = DAG->MF.getSubtarget<GCNSubtarget>(); in apply()
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| H A D | AMDGPUInstructionSelector.h | 21 #define AMDGPUSubtarget GCNSubtarget
37 class GCNSubtarget; variable
50 const GCNSubtarget *Subtarget;
53 AMDGPUInstructionSelector(const GCNSubtarget &STI,
335 const GCNSubtarget &STI;
338 #define AMDGPUSubtarget GCNSubtarget
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| H A D | GCNSchedStrategy.h | 24 class GCNSubtarget; variable
111 const GCNSubtarget &ST;
186 const GCNSubtarget &ST;
306 bool sinkTriviallyRematInsts(const GCNSubtarget &ST,
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| H A D | SIFixVGPRCopies.cpp | 48 const GCNSubtarget &ST = MF.getSubtarget<GCNSubtarget>(); in runOnMachineFunction()
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| H A D | GCNIterativeScheduler.cpp | 94 const auto &ST = MF.getSubtarget<GCNSubtarget>(); in printRegions()
118 const auto &ST = MF.getSubtarget<GCNSubtarget>(); in printSchedRP()
302 dbgs(), &MF.getSubtarget<GCNSubtarget>()); in schedule()
404 const auto &ST = MF.getSubtarget<GCNSubtarget>(); in scheduleRegion()
419 const auto &ST = MF.getSubtarget<GCNSubtarget>(); in sortRegionsByPressure()
436 const auto &ST = MF.getSubtarget<GCNSubtarget>(); in tryMaximizeOccupancy()
473 const auto &ST = MF.getSubtarget<GCNSubtarget>(); in scheduleLegacyMaxOccupancy()
527 const auto &ST = MF.getSubtarget<GCNSubtarget>(); in scheduleMinReg()
561 const auto &ST = MF.getSubtarget<GCNSubtarget>(); in scheduleILP()
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| H A D | SILateBranchLowering.cpp | 84 const GCNSubtarget &ST = MBB.getParent()->getSubtarget<GCNSubtarget>(); in generateEndPgm()
136 const GCNSubtarget &ST = MF.getSubtarget<GCNSubtarget>(); in runOnMachineFunction()
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| H A D | AMDGPUCallLowering.cpp | 197 const GCNSubtarget &ST = MIRBuilder.getMF().getSubtarget<GCNSubtarget>(); in getStackAddress()
229 const auto &ST = MF.getSubtarget<GCNSubtarget>(); in assignValueToAddress()
494 const GCNSubtarget *Subtarget = &MF.getSubtarget<GCNSubtarget>(); in lowerFormalArgumentsKernel()
581 const GCNSubtarget &Subtarget = MF.getSubtarget<GCNSubtarget>(); in lowerFormalArguments()
784 const GCNSubtarget &ST = MF.getSubtarget<GCNSubtarget>(); in passSpecialInputs()
986 const GCNSubtarget &ST = MF.getSubtarget<GCNSubtarget>(); in doCallerAndCalleePassArgsTheSameWay()
1051 const GCNSubtarget &ST = MF.getSubtarget<GCNSubtarget>(); in areCalleeOutgoingArgsTailCallable()
1091 const SIRegisterInfo *TRI = MF.getSubtarget<GCNSubtarget>().getRegisterInfo(); in isEligibleForTailCallOptimization()
1136 const GCNSubtarget &ST, const SIMachineFunctionInfo &FuncInfo, in handleImplicitCallArguments()
1157 const GCNSubtarget &ST = MF.getSubtarget<GCNSubtarget>(); in lowerTailCall()
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| H A D | AMDGPUInstrInfo.h | 22 class GCNSubtarget; variable
27 explicit AMDGPUInstrInfo(const GCNSubtarget &st);
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| H A D | AMDGPUTargetMachine.cpp | 416 const GCNSubtarget &ST = C->MF->getSubtarget<GCNSubtarget>(); in createGCNMaxOccupancyMachineScheduler()
431 const GCNSubtarget &ST = C->MF->getSubtarget<GCNSubtarget>(); in createIterativeGCNMaxOccupancyMachineScheduler()
447 const GCNSubtarget &ST = C->MF->getSubtarget<GCNSubtarget>(); in createIterativeILPMachineScheduler()
881 I = std::make_unique<GCNSubtarget>(TargetTriple, GPU, FS, *this); in getSubtargetImpl()
925 const GCNSubtarget &ST = C->MF->getSubtarget<GCNSubtarget>(); in createPostMachineScheduler()
1135 const GCNSubtarget &ST = C->MF->getSubtarget<GCNSubtarget>(); in createMachineScheduler()
1149 const GCNSubtarget &ST = C->MF->getSubtarget<GCNSubtarget>(); in createMachineScheduler()
1475 const GCNSubtarget &ST = MF.getSubtarget<GCNSubtarget>(); in parseMachineFunctionInfo()
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| H A D | AMDGPUAttributor.cpp | 142 const GCNSubtarget &ST = TM.getSubtarget<GCNSubtarget>(F); in hasApertureRegs()
148 const GCNSubtarget &ST = TM.getSubtarget<GCNSubtarget>(F); in supportsGetDoorbellID()
153 const GCNSubtarget &ST = TM.getSubtarget<GCNSubtarget>(F); in getFlatWorkGroupSizes()
159 const GCNSubtarget &ST = TM.getSubtarget<GCNSubtarget>(F); in getMaximumFlatWorkGroupRange()
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| H A D | AMDGPURegisterBankInfo.h | 27 class GCNSubtarget; variable
44 const GCNSubtarget &Subtarget;
166 AMDGPURegisterBankInfo(const GCNSubtarget &STI);
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| H A D | AMDGPUMCInstLower.cpp | 162 const GCNSubtarget &STI = MF->getSubtarget<GCNSubtarget>(); in lowerOperand()
181 const GCNSubtarget &STI = MF->getSubtarget<GCNSubtarget>(); in emitInstruction()
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| H A D | GCNRegPressure.h | 63 unsigned getOccupancy(const GCNSubtarget &ST) const { in getOccupancy()
73 bool higherOccupancy(const GCNSubtarget &ST, const GCNRegPressure& O) const { in higherOccupancy()
77 bool less(const GCNSubtarget &ST, const GCNRegPressure& O,
88 void print(raw_ostream &OS, const GCNSubtarget *ST = nullptr) const;
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| H A D | AMDGPUHSAMetadataStreamer.cpp | 193 const GCNSubtarget &STM = MF.getSubtarget<GCNSubtarget>(); in getHSACodeProps()
284 const GCNSubtarget &ST) { in emitKernelArgs()
385 const GCNSubtarget &ST) { in emitHiddenKernelArgs()
469 const GCNSubtarget &ST = MF.getSubtarget<GCNSubtarget>(); in emitKernel()
798 const GCNSubtarget &ST = MF.getSubtarget<GCNSubtarget>(); in emitHiddenKernelArgs()
865 const GCNSubtarget &STM = MF.getSubtarget<GCNSubtarget>(); in getHSAKernelProps()
988 const GCNSubtarget &ST = MF.getSubtarget<GCNSubtarget>(); in emitHiddenKernelArgs()
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| H A D | AMDGPUReleaseVGPRs.cpp | 113 const GCNSubtarget &ST = MF.getSubtarget<GCNSubtarget>(); in runOnMachineFunction()
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| H A D | AMDGPUCallLowering.h | 22 class GCNSubtarget; variable
77 const GCNSubtarget &ST, const SIMachineFunctionInfo &MFI,
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| H A D | AMDGPUHSAMetadataStreamer.h | 33 class GCNSubtarget; variable
192 void emitKernelArgs(const Function &Func, const GCNSubtarget &ST);
202 void emitHiddenKernelArgs(const Function &Func, const GCNSubtarget &ST);
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| /llvm-project-15.0.7/llvm/unittests/Target/AMDGPU/ |
| H A D | DwarfRegMappings.cpp | 50 GCNSubtarget ST(TM->getTargetTriple(), std::string(TM->getTargetCPU()), in TEST()
73 GCNSubtarget ST(TM->getTargetTriple(), std::string(TM->getTargetCPU()), in TEST()
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