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Searched refs:FP_TO_UINT_SAT (Results 1 – 19 of 19) sorted by relevance

/llvm-project-15.0.7/llvm/include/llvm/CodeGen/
H A DISDOpcodes.h839 FP_TO_UINT_SAT, enumerator
/llvm-project-15.0.7/llvm/lib/Target/WebAssembly/
H A DWebAssemblyISelLowering.cpp154 for (auto Op : {ISD::FP_TO_SINT_SAT, ISD::FP_TO_UINT_SAT}) in WebAssemblyTargetLowering()
173 setTargetDAGCombine({ISD::FP_TO_SINT_SAT, ISD::FP_TO_UINT_SAT, in WebAssemblyTargetLowering()
254 for (auto Op : {ISD::FP_TO_SINT_SAT, ISD::FP_TO_UINT_SAT}) in WebAssemblyTargetLowering()
1432 case ISD::FP_TO_UINT_SAT: in LowerOperation()
2514 case ISD::FP_TO_UINT_SAT: in performVectorTruncZeroCombine()
2551 case ISD::FP_TO_UINT_SAT: in performVectorTruncZeroCombine()
2596 case ISD::FP_TO_UINT_SAT: in performVectorTruncZeroCombine()
2745 case ISD::FP_TO_UINT_SAT: in PerformDAGCombine()
/llvm-project-15.0.7/llvm/lib/CodeGen/SelectionDAG/
H A DLegalizeVectorOps.cpp411 case ISD::FP_TO_UINT_SAT: in LegalizeOp()
851 case ISD::FP_TO_UINT_SAT: in Expand()
H A DSelectionDAGDumper.cpp361 case ISD::FP_TO_UINT_SAT: return "fp_to_uint_sat"; in getOperationName()
H A DLegalizeFloatTypes.cpp845 case ISD::FP_TO_UINT_SAT: in SoftenFloatOperand()
2115 case ISD::FP_TO_UINT_SAT: in PromoteFloatOperand()
2911 case ISD::FP_TO_UINT_SAT: in SoftPromoteHalfOperand()
H A DLegalizeVectorTypes.cpp169 case ISD::FP_TO_UINT_SAT: in ScalarizeVectorResult()
1112 case ISD::FP_TO_UINT_SAT: in SplitVectorResult()
2735 case ISD::FP_TO_UINT_SAT: in SplitVectorOperand()
3829 case ISD::FP_TO_UINT_SAT: in WidenVectorResult()
5469 case ISD::FP_TO_UINT_SAT: in WidenVectorOperand()
H A DLegalizeDAG.cpp1146 case ISD::FP_TO_UINT_SAT: in LegalizeOp()
2999 case ISD::FP_TO_UINT_SAT: in ExpandNode()
4521 case ISD::FP_TO_UINT_SAT: in PromoteNode()
H A DLegalizeIntegerTypes.cpp148 case ISD::FP_TO_UINT_SAT: in PromoteIntegerResult()
2429 case ISD::FP_TO_UINT_SAT: ExpandIntRes_FP_TO_XINT_SAT(N, Lo, Hi); break; in ExpandIntegerResult()
H A DSelectionDAG.cpp3766 case ISD::FP_TO_UINT_SAT: { in computeKnownBits()
6132 case ISD::FP_TO_UINT_SAT: { in getNode()
H A DDAGCombiner.cpp5138 unsigned NewOpc = Unsigned ? ISD::FP_TO_UINT_SAT : ISD::FP_TO_SINT_SAT; in PerformMinMaxFpToSatCombine()
5174 if (!DAG.getTargetLoweringInfo().shouldConvertFpToSat(ISD::FP_TO_UINT_SAT, in PerformUMinFpToSatCombine()
5179 DAG.getNode(ISD::FP_TO_UINT_SAT, SDLoc(N0), NewVT, N0.getOperand(0), in PerformUMinFpToSatCombine()
H A DSelectionDAGBuilder.cpp6423 setValue(&I, DAG.getNode(ISD::FP_TO_UINT_SAT, sdl, VT, in visitIntrinsicCall()
/llvm-project-15.0.7/llvm/lib/Target/X86/
H A DX86ISelLowering.h1103 return Op != ISD::FP_TO_UINT_SAT && isOperationLegalOrCustom(Op, VT); in shouldConvertFpToSat()
H A DX86ISelLowering.cpp300 setOperationAction(ISD::FP_TO_UINT_SAT, VT, Custom); in X86TargetLowering()
304 setOperationAction(ISD::FP_TO_UINT_SAT, MVT::i64, Custom); in X86TargetLowering()
32263 case ISD::FP_TO_UINT_SAT: return LowerFP_TO_INT_SAT(Op, DAG); in LowerOperation()
/llvm-project-15.0.7/llvm/lib/CodeGen/
H A DTargetLoweringBase.cpp809 ISD::FP_TO_SINT_SAT, ISD::FP_TO_UINT_SAT, in initActions()
/llvm-project-15.0.7/llvm/lib/Target/AArch64/
H A DAArch64ISelLowering.cpp489 setOperationAction(ISD::FP_TO_UINT_SAT, MVT::i32, Custom); in AArch64TargetLowering()
490 setOperationAction(ISD::FP_TO_UINT_SAT, MVT::i64, Custom); in AArch64TargetLowering()
879 ISD::FP_TO_UINT_SAT, ISD::FDIV}); in AArch64TargetLowering()
971 ISD::FP_ROUND, ISD::FP_TO_SINT_SAT, ISD::FP_TO_UINT_SAT, ISD::MUL, in AArch64TargetLowering()
1509 ISD::FP_TO_UINT_SAT, ISD::STRICT_FP_TO_SINT, ISD::STRICT_FP_TO_UINT}) in addTypeForNEON()
5506 case ISD::FP_TO_UINT_SAT: in LowerOperation()
14503 N->getOpcode() == ISD::FP_TO_UINT_SAT) { in performFpToIntCombine()
19530 case ISD::FP_TO_UINT_SAT: in PerformDAGCombine()
/llvm-project-15.0.7/llvm/lib/Target/ARM/
H A DARMISelDAGToDAG.cpp3278 N->getOpcode() == ISD::FP_TO_UINT_SAT; in tryFP_TO_INT()
3767 case ISD::FP_TO_UINT_SAT: in Select()
H A DARMISelLowering.cpp310 setOperationAction(ISD::FP_TO_UINT_SAT, VT, Custom); in addMVEVectorTypes()
776 setOperationAction(ISD::FP_TO_UINT_SAT, MVT::i32, Custom); in ARMTargetLowering()
778 setOperationAction(ISD::FP_TO_UINT_SAT, MVT::i64, Custom); in ARMTargetLowering()
10361 case ISD::FP_TO_UINT_SAT: return LowerFP_TO_INT_SAT(Op, DAG, Subtarget); in LowerOperation()
10548 case ISD::FP_TO_UINT_SAT: in ReplaceNodeResults()
/llvm-project-15.0.7/llvm/lib/Target/RISCV/
H A DRISCVISelLowering.cpp381 setOperationAction({ISD::FP_TO_UINT_SAT, ISD::FP_TO_SINT_SAT}, XLenVT, in RISCVTargetLowering()
961 ISD::FP_TO_SINT_SAT, ISD::FP_TO_UINT_SAT}); in RISCVTargetLowering()
3415 case ISD::FP_TO_UINT_SAT: in LowerOperation()
9096 case ISD::FP_TO_UINT_SAT: in PerformDAGCombine()
/llvm-project-15.0.7/llvm/include/llvm/Target/
H A DTargetSelectionDAG.td517 def fp_to_uint_sat : SDNode<"ISD::FP_TO_UINT_SAT" , SDTFPToIntSatOp>;