| /llvm-project-15.0.7/llvm/include/llvm/IR/ |
| H A D | ConstrainedOps.def | 79 DAG_FUNCTION(log10, 1, 1, experimental_constrained_log10, FLOG10)
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| /llvm-project-15.0.7/llvm/include/llvm/CodeGen/ |
| H A D | ISDOpcodes.h | 921 FLOG10, enumerator
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| H A D | BasicTTIImpl.h | 1703 ISD = ISD::FLOG10; in getTypeBasedIntrinsicInstrCost()
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| /llvm-project-15.0.7/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | SelectionDAGDumper.cpp | 224 case ISD::FLOG10: return "flog10"; in getOperationName()
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| H A D | LegalizeFloatTypes.cpp | 97 case ISD::FLOG10: R = SoftenFloatRes_FLOG10(N); break; in SoftenFloatResult()
1241 case ISD::FLOG10: ExpandFloatRes_FLOG10(N, Lo, Hi); break; in ExpandFloatResult()
2265 case ISD::FLOG10: in PromoteFloatResult()
2629 case ISD::FLOG10: in SoftPromoteHalfResult()
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| H A D | LegalizeVectorOps.cpp | 374 case ISD::FLOG10: in LegalizeOp()
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| H A D | LegalizeVectorTypes.cpp | 91 case ISD::FLOG10: in ScalarizeVectorResult()
1023 case ISD::FLOG10: in SplitVectorResult()
3840 case ISD::FLOG10: in WidenVectorResult()
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| H A D | LegalizeDAG.cpp | 4046 case ISD::FLOG10: in ConvertNodeToLibcall()
4847 case ISD::FLOG10: in PromoteNode()
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| H A D | SelectionDAG.cpp | 4664 case ISD::FLOG10: in isKnownNeverNaN()
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| H A D | SelectionDAGBuilder.cpp | 5304 return DAG.getNode(ISD::FLOG10, dl, Op.getValueType(), Op, Flags); in expandLog10()
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| /llvm-project-15.0.7/llvm/lib/Target/AMDGPU/ |
| H A D | AMDGPUISelLowering.cpp | 303 setOperationAction({ISD::FLOG, ISD::FLOG10, ISD::FEXP}, MVT::f32, Custom); in AMDGPUTargetLowering()
399 ISD::FLOG10, ISD::FPOW, ISD::FFLOOR, ISD::FTRUNC, in AMDGPUTargetLowering()
1164 case ISD::FLOG10: in LowerOperation()
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| H A D | AMDGPUISelDAGToDAG.cpp | 160 case ISD::FLOG10: in fp16SrcZerosHighBits()
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| H A D | SIISelLowering.cpp | 394 setOperationAction({ISD::FLOG, ISD::FEXP, ISD::FLOG10}, MVT::f16, Custom); in SITargetLowering()
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| /llvm-project-15.0.7/llvm/lib/CodeGen/ |
| H A D | TargetLoweringBase.cpp | 887 setOperationAction({ISD::FCBRT, ISD::FLOG, ISD::FLOG2, ISD::FLOG10, ISD::FEXP, in initActions()
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| /llvm-project-15.0.7/llvm/lib/Target/WebAssembly/ |
| H A D | WebAssemblyISelLowering.cpp | 238 for (auto Op : {ISD::FCOPYSIGN, ISD::FLOG, ISD::FLOG2, ISD::FLOG10, in WebAssemblyTargetLowering()
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| /llvm-project-15.0.7/llvm/lib/Target/ARM/ |
| H A D | ARMISelLowering.cpp | 370 setOperationAction(ISD::FLOG10, VT, Expand); in addMVEVectorTypes()
879 setOperationAction(ISD::FLOG10, MVT::v2f64, Expand); in ARMTargetLowering()
900 setOperationAction(ISD::FLOG10, MVT::v4f32, Expand); in ARMTargetLowering()
916 setOperationAction(ISD::FLOG10, MVT::v2f32, Expand); in ARMTargetLowering()
1049 setOperationAction(ISD::FLOG10, MVT::f64, Expand); in ARMTargetLowering()
1527 setOperationAction(ISD::FLOG10, MVT::f16, Promote); in ARMTargetLowering()
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| /llvm-project-15.0.7/llvm/lib/Target/Hexagon/ |
| H A D | HexagonISelLowering.cpp | 1637 ISD::FLOG10, ISD::FEXP, ISD::FEXP2, ISD::FCEIL, ISD::FTRUNC, in HexagonTargetLowering()
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| /llvm-project-15.0.7/llvm/lib/Target/Mips/ |
| H A D | MipsSEISelLowering.cpp | 153 setOperationAction(ISD::FLOG10, MVT::f16, Promote); in MipsSETargetLowering()
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| H A D | MipsISelLowering.cpp | 429 setOperationAction(ISD::FLOG10, MVT::f32, Expand); in MipsTargetLowering()
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| /llvm-project-15.0.7/llvm/lib/Target/PowerPC/ |
| H A D | PPCISelLowering.cpp | 400 setOperationAction(ISD::FLOG10, MVT::f64, Custom); in PPCTargetLowering()
406 setOperationAction(ISD::FLOG10, MVT::f32, Custom); in PPCTargetLowering()
835 setOperationAction(ISD::FLOG10, VT, Expand); in PPCTargetLowering()
11140 case ISD::FLOG10: return lowerLog10(Op, DAG); in LowerOperation()
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| /llvm-project-15.0.7/llvm/lib/Target/RISCV/ |
| H A D | RISCVISelLowering.cpp | 335 ISD::FLOG2, ISD::FLOG10}, in RISCVTargetLowering()
677 setOperationAction(ISD::FLOG10, VT, Expand); in RISCVTargetLowering()
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| /llvm-project-15.0.7/llvm/lib/Target/AArch64/ |
| H A D | AArch64ISelLowering.cpp | 593 ISD::FLOG2, ISD::FLOG10, ISD::STRICT_FREM, in AArch64TargetLowering()
1334 setOperationAction(ISD::FLOG10, VT, Expand); in AArch64TargetLowering()
1469 setOperationAction(ISD::FLOG10, VT, Expand); in addTypeForNEON()
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| /llvm-project-15.0.7/llvm/lib/Target/X86/ |
| H A D | X86ISelLowering.cpp | 575 setOperationAction(ISD::FLOG10, VT, Action); in X86TargetLowering()
885 setOperationAction(ISD::FLOG10, MVT::f80, Expand); in X86TargetLowering()
903 setOperationAction(ISD::FLOG10, VT, Expand); in X86TargetLowering()
2318 ISD::FLOG10, ISD::STRICT_FLOG10, in X86TargetLowering()
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