| /llvm-project-15.0.7/llvm/include/llvm/IR/ |
| H A D | ConstrainedOps.def | 78 DAG_FUNCTION(log, 1, 1, experimental_constrained_log, FLOG)
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| /llvm-project-15.0.7/llvm/include/llvm/CodeGen/ |
| H A D | ISDOpcodes.h | 919 FLOG, enumerator
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| H A D | BasicTTIImpl.h | 1700 ISD = ISD::FLOG; in getTypeBasedIntrinsicInstrCost()
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| /llvm-project-15.0.7/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | SelectionDAGDumper.cpp | 220 case ISD::FLOG: return "flog"; in getOperationName()
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| H A D | LegalizeFloatTypes.cpp | 93 case ISD::FLOG: R = SoftenFloatRes_FLOG(N); break; in SoftenFloatResult()
1237 case ISD::FLOG: ExpandFloatRes_FLOG(N, Lo, Hi); break; in ExpandFloatResult()
2263 case ISD::FLOG: in PromoteFloatResult()
2627 case ISD::FLOG: in SoftPromoteHalfResult()
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| H A D | LegalizeVectorOps.cpp | 372 case ISD::FLOG: in LegalizeOp()
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| H A D | LegalizeVectorTypes.cpp | 90 case ISD::FLOG: in ScalarizeVectorResult()
1022 case ISD::FLOG: in SplitVectorResult()
3839 case ISD::FLOG: in WidenVectorResult()
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| H A D | LegalizeDAG.cpp | 4036 case ISD::FLOG: in ConvertNodeToLibcall()
4845 case ISD::FLOG: in PromoteNode()
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| H A D | SelectionDAG.cpp | 4662 case ISD::FLOG: in isKnownNeverNaN()
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| H A D | SelectionDAGBuilder.cpp | 5117 return DAG.getNode(ISD::FLOG, dl, Op.getValueType(), Op, Flags); in expandLog()
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| /llvm-project-15.0.7/llvm/lib/Target/AMDGPU/ |
| H A D | AMDGPUISelLowering.cpp | 303 setOperationAction({ISD::FLOG, ISD::FLOG10, ISD::FEXP}, MVT::f32, Custom); in AMDGPUTargetLowering()
398 ISD::FEXP, ISD::FLOG2, ISD::FREM, ISD::FLOG, in AMDGPUTargetLowering()
1162 case ISD::FLOG: in LowerOperation()
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| H A D | AMDGPUISelDAGToDAG.cpp | 158 case ISD::FLOG: in fp16SrcZerosHighBits()
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| H A D | SIISelLowering.cpp | 394 setOperationAction({ISD::FLOG, ISD::FEXP, ISD::FLOG10}, MVT::f16, Custom); in SITargetLowering()
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| /llvm-project-15.0.7/llvm/lib/CodeGen/ |
| H A D | TargetLoweringBase.cpp | 887 setOperationAction({ISD::FCBRT, ISD::FLOG, ISD::FLOG2, ISD::FLOG10, ISD::FEXP, in initActions()
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| /llvm-project-15.0.7/llvm/lib/Target/WebAssembly/ |
| H A D | WebAssemblyISelLowering.cpp | 238 for (auto Op : {ISD::FCOPYSIGN, ISD::FLOG, ISD::FLOG2, ISD::FLOG10, in WebAssemblyTargetLowering()
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| /llvm-project-15.0.7/llvm/lib/Target/ARM/ |
| H A D | ARMISelLowering.cpp | 368 setOperationAction(ISD::FLOG, VT, Expand); in addMVEVectorTypes()
877 setOperationAction(ISD::FLOG, MVT::v2f64, Expand); in ARMTargetLowering()
898 setOperationAction(ISD::FLOG, MVT::v4f32, Expand); in ARMTargetLowering()
914 setOperationAction(ISD::FLOG, MVT::v2f32, Expand); in ARMTargetLowering()
1047 setOperationAction(ISD::FLOG, MVT::f64, Expand); in ARMTargetLowering()
1526 setOperationAction(ISD::FLOG, MVT::f16, Promote); in ARMTargetLowering()
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| /llvm-project-15.0.7/llvm/lib/Target/Hexagon/ |
| H A D | HexagonISelLowering.cpp | 1636 ISD::FCOS, ISD::FPOW, ISD::FLOG, ISD::FLOG2, in HexagonTargetLowering()
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| /llvm-project-15.0.7/llvm/lib/Target/Mips/ |
| H A D | MipsSEISelLowering.cpp | 151 setOperationAction(ISD::FLOG, MVT::f16, Promote); in MipsSETargetLowering()
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| H A D | MipsISelLowering.cpp | 427 setOperationAction(ISD::FLOG, MVT::f32, Expand); in MipsTargetLowering()
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| /llvm-project-15.0.7/llvm/lib/Target/PowerPC/ |
| H A D | PPCISelLowering.cpp | 399 setOperationAction(ISD::FLOG, MVT::f64, Custom); in PPCTargetLowering()
405 setOperationAction(ISD::FLOG, MVT::f32, Custom); in PPCTargetLowering()
834 setOperationAction(ISD::FLOG, VT, Expand); in PPCTargetLowering()
11139 case ISD::FLOG: return lowerLog(Op, DAG); in LowerOperation()
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| /llvm-project-15.0.7/llvm/lib/Target/RISCV/ |
| H A D | RISCVISelLowering.cpp | 334 ISD::FSINCOS, ISD::FEXP, ISD::FEXP2, ISD::FLOG, in RISCVTargetLowering()
675 setOperationAction(ISD::FLOG, VT, Expand); in RISCVTargetLowering()
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| /llvm-project-15.0.7/llvm/lib/Target/AArch64/ |
| H A D | AArch64ISelLowering.cpp | 592 ISD::FEXP, ISD::FEXP2, ISD::FLOG, in AArch64TargetLowering()
1332 setOperationAction(ISD::FLOG, VT, Expand); in AArch64TargetLowering()
1467 setOperationAction(ISD::FLOG, VT, Expand); in addTypeForNEON()
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| /llvm-project-15.0.7/llvm/lib/Target/X86/ |
| H A D | X86ISelLowering.cpp | 573 setOperationAction(ISD::FLOG, VT, Action); in X86TargetLowering()
883 setOperationAction(ISD::FLOG, MVT::f80, Expand); in X86TargetLowering()
901 setOperationAction(ISD::FLOG, VT, Expand); in X86TargetLowering()
2317 ISD::FLOG, ISD::STRICT_FLOG, in X86TargetLowering()
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