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/llvm-project-15.0.7/llvm/lib/Target/BPF/
H A DBPFISelLowering.cpp103 setOperationAction(ISD::SDIVREM, VT, Expand); in BPFTargetLowering()
104 setOperationAction(ISD::UDIVREM, VT, Expand); in BPFTargetLowering()
105 setOperationAction(ISD::SREM, VT, Expand); in BPFTargetLowering()
106 setOperationAction(ISD::MULHU, VT, Expand); in BPFTargetLowering()
107 setOperationAction(ISD::MULHS, VT, Expand); in BPFTargetLowering()
108 setOperationAction(ISD::UMUL_LOHI, VT, Expand); in BPFTargetLowering()
110 setOperationAction(ISD::ROTR, VT, Expand); in BPFTargetLowering()
111 setOperationAction(ISD::ROTL, VT, Expand); in BPFTargetLowering()
115 setOperationAction(ISD::CTPOP, VT, Expand); in BPFTargetLowering()
117 setOperationAction(ISD::SETCC, VT, Expand); in BPFTargetLowering()
[all …]
/llvm-project-15.0.7/llvm/lib/Target/Sparc/
H A DSparcISelLowering.cpp1533 setOperationAction(Op, MVT::v2i32, Expand); in SparcTargetLowering()
1545 setTruncStoreAction(VT, MVT::v2i32, Expand); in SparcTargetLowering()
1546 setTruncStoreAction(MVT::v2i32, VT, Expand); in SparcTargetLowering()
1575 setTruncStoreAction(MVT::f32, MVT::f16, Expand); in SparcTargetLowering()
1576 setTruncStoreAction(MVT::f64, MVT::f16, Expand); in SparcTargetLowering()
1577 setTruncStoreAction(MVT::f64, MVT::f32, Expand); in SparcTargetLowering()
1578 setTruncStoreAction(MVT::f128, MVT::f16, Expand); in SparcTargetLowering()
1579 setTruncStoreAction(MVT::f128, MVT::f32, Expand); in SparcTargetLowering()
1580 setTruncStoreAction(MVT::f128, MVT::f64, Expand); in SparcTargetLowering()
1594 setOperationAction(ISD::UREM, MVT::i32, Expand); in SparcTargetLowering()
[all …]
/llvm-project-15.0.7/llvm/lib/Target/CSKY/
H A DCSKYISelLowering.cpp58 setOperationAction(ISD::SREM, MVT::i32, Expand); in CSKYTargetLowering()
59 setOperationAction(ISD::UREM, MVT::i32, Expand); in CSKYTargetLowering()
62 setOperationAction(ISD::CTTZ, MVT::i32, Expand); in CSKYTargetLowering()
63 setOperationAction(ISD::CTPOP, MVT::i32, Expand); in CSKYTargetLowering()
64 setOperationAction(ISD::ROTR, MVT::i32, Expand); in CSKYTargetLowering()
71 setOperationAction(ISD::BR_CC, MVT::i32, Expand); in CSKYTargetLowering()
76 setOperationAction(ISD::MULHS, MVT::i32, Expand); in CSKYTargetLowering()
124 setOperationAction(ISD::FREM, VT, Expand); in CSKYTargetLowering()
126 setOperationAction(ISD::BR_CC, VT, Expand); in CSKYTargetLowering()
129 setCondCodeAction(CC, VT, Expand); in CSKYTargetLowering()
[all …]
/llvm-project-15.0.7/llvm/lib/Target/Mips/
H A DMips16ISelLowering.cpp130 setOperationAction(ISD::ATOMIC_FENCE, MVT::Other, Expand); in Mips16TargetLowering()
131 setOperationAction(ISD::ATOMIC_CMP_SWAP, MVT::i32, Expand); in Mips16TargetLowering()
132 setOperationAction(ISD::ATOMIC_SWAP, MVT::i32, Expand); in Mips16TargetLowering()
133 setOperationAction(ISD::ATOMIC_LOAD_ADD, MVT::i32, Expand); in Mips16TargetLowering()
134 setOperationAction(ISD::ATOMIC_LOAD_SUB, MVT::i32, Expand); in Mips16TargetLowering()
135 setOperationAction(ISD::ATOMIC_LOAD_AND, MVT::i32, Expand); in Mips16TargetLowering()
136 setOperationAction(ISD::ATOMIC_LOAD_OR, MVT::i32, Expand); in Mips16TargetLowering()
144 setOperationAction(ISD::ROTR, MVT::i32, Expand); in Mips16TargetLowering()
145 setOperationAction(ISD::ROTR, MVT::i64, Expand); in Mips16TargetLowering()
146 setOperationAction(ISD::BSWAP, MVT::i32, Expand); in Mips16TargetLowering()
[all …]
H A DMipsISelLowering.cpp321 setTruncStoreAction(MVT::f32, MVT::f16, Expand); in MipsTargetLowering()
322 setTruncStoreAction(MVT::f64, MVT::f16, Expand); in MipsTargetLowering()
324 setTruncStoreAction(MVT::f64, MVT::f32, Expand); in MipsTargetLowering()
376 setOperationAction(ISD::SDIV, MVT::i32, Expand); in MipsTargetLowering()
377 setOperationAction(ISD::SREM, MVT::i32, Expand); in MipsTargetLowering()
378 setOperationAction(ISD::UDIV, MVT::i32, Expand); in MipsTargetLowering()
379 setOperationAction(ISD::UREM, MVT::i32, Expand); in MipsTargetLowering()
380 setOperationAction(ISD::SDIV, MVT::i64, Expand); in MipsTargetLowering()
381 setOperationAction(ISD::SREM, MVT::i64, Expand); in MipsTargetLowering()
382 setOperationAction(ISD::UDIV, MVT::i64, Expand); in MipsTargetLowering()
[all …]
H A DMipsSEISelLowering.cpp77 setTruncStoreAction(VT0, VT1, Expand); in MipsSETargetLowering()
93 setOperationAction(Opc, VecTy, Expand); in MipsSETargetLowering()
316 setOperationAction(Opc, Ty, Expand); in addMSAIntType()
356 setCondCodeAction(ISD::SETNE, Ty, Expand); in addMSAIntType()
357 setCondCodeAction(ISD::SETGE, Ty, Expand); in addMSAIntType()
358 setCondCodeAction(ISD::SETGT, Ty, Expand); in addMSAIntType()
359 setCondCodeAction(ISD::SETUGE, Ty, Expand); in addMSAIntType()
360 setCondCodeAction(ISD::SETUGT, Ty, Expand); in addMSAIntType()
370 setOperationAction(Opc, Ty, Expand); in addMSAFloatType()
393 setCondCodeAction(ISD::SETOGE, Ty, Expand); in addMSAFloatType()
[all …]
/llvm-project-15.0.7/llvm/lib/Target/MSP430/
H A DMSP430ISelLowering.cpp68 setLoadExtAction(ISD::SEXTLOAD, VT, MVT::i8, Expand); in MSP430TargetLowering()
69 setLoadExtAction(ISD::SEXTLOAD, VT, MVT::i16, Expand); in MSP430TargetLowering()
73 setTruncStoreAction(MVT::i16, MVT::i8, Expand); in MSP430TargetLowering()
81 setOperationAction(ISD::ROTL, MVT::i8, Expand); in MSP430TargetLowering()
82 setOperationAction(ISD::ROTR, MVT::i8, Expand); in MSP430TargetLowering()
83 setOperationAction(ISD::ROTL, MVT::i16, Expand); in MSP430TargetLowering()
84 setOperationAction(ISD::ROTR, MVT::i16, Expand); in MSP430TargetLowering()
88 setOperationAction(ISD::BR_JT, MVT::Other, Expand); in MSP430TargetLowering()
91 setOperationAction(ISD::BRCOND, MVT::Other, Expand); in MSP430TargetLowering()
94 setOperationAction(ISD::SELECT, MVT::i8, Expand); in MSP430TargetLowering()
[all …]
/llvm-project-15.0.7/llvm/lib/Target/AVR/
H A DAVRISelLowering.cpp63 setLoadExtAction(N, VT, MVT::i8, Expand); in AVRTargetLowering()
67 setTruncStoreAction(MVT::i16, MVT::i8, Expand); in AVRTargetLowering()
94 setOperationAction(ISD::ROTL, MVT::i16, Expand); in AVRTargetLowering()
96 setOperationAction(ISD::ROTR, MVT::i16, Expand); in AVRTargetLowering()
146 setOperationAction(ISD::UDIV, MVT::i8, Expand); in AVRTargetLowering()
164 setOperationAction(ISD::MUL, MVT::i8, Expand); in AVRTargetLowering()
179 setOperationAction(ISD::MULHS, VT, Expand); in AVRTargetLowering()
180 setOperationAction(ISD::MULHU, VT, Expand); in AVRTargetLowering()
184 setOperationAction(ISD::CTPOP, VT, Expand); in AVRTargetLowering()
185 setOperationAction(ISD::CTLZ, VT, Expand); in AVRTargetLowering()
[all …]
/llvm-project-15.0.7/llvm/lib/CodeGen/
H A DTargetLoweringBase.cpp756 setTruncStoreAction(AVT, VT, Expand); in initActions()
764 setIndexedLoadAction(IM, VT, Expand); in initActions()
811 VT, Expand); in initActions()
816 VT, Expand); in initActions()
821 VT, Expand); in initActions()
825 Expand); in initActions()
830 Expand); in initActions()
837 Expand); in initActions()
850 VT, Expand); in initActions()
867 VT, Expand); in initActions()
[all …]
/llvm-project-15.0.7/llvm/lib/Target/Lanai/
H A DLanaiISelLowering.cpp86 setOperationAction(ISD::BR_JT, MVT::Other, Expand); in LanaiTargetLowering()
89 setOperationAction(ISD::SELECT, MVT::i32, Expand); in LanaiTargetLowering()
106 setOperationAction(ISD::SDIV, MVT::i32, Expand); in LanaiTargetLowering()
107 setOperationAction(ISD::UDIV, MVT::i32, Expand); in LanaiTargetLowering()
110 setOperationAction(ISD::SREM, MVT::i32, Expand); in LanaiTargetLowering()
111 setOperationAction(ISD::UREM, MVT::i32, Expand); in LanaiTargetLowering()
114 setOperationAction(ISD::MULHU, MVT::i32, Expand); in LanaiTargetLowering()
115 setOperationAction(ISD::MULHS, MVT::i32, Expand); in LanaiTargetLowering()
119 setOperationAction(ISD::ROTR, MVT::i32, Expand); in LanaiTargetLowering()
120 setOperationAction(ISD::ROTL, MVT::i32, Expand); in LanaiTargetLowering()
[all …]
/llvm-project-15.0.7/llvm/lib/Target/VE/
H A DVEISelLowering.cpp108 setTruncStoreAction(VT, MVT::i1, Expand); in initSPUActions()
164 setOperationAction(ISD::UREM, IntVT, Expand); in initSPUActions()
165 setOperationAction(ISD::SREM, IntVT, Expand); in initSPUActions()
182 setOperationAction(ISD::CTTZ, IntVT, Expand); in initSPUActions()
183 setOperationAction(ISD::ROTL, IntVT, Expand); in initSPUActions()
227 setOperationAction(ISD::FNEG, VT, Expand); in initSPUActions()
228 setOperationAction(ISD::FREM, VT, Expand); in initSPUActions()
244 setOperationAction(ISD::FABS, VT, Expand); in initSPUActions()
246 setOperationAction(ISD::FCOS, VT, Expand); in initSPUActions()
247 setOperationAction(ISD::FSIN, VT, Expand); in initSPUActions()
[all …]
/llvm-project-15.0.7/llvm/lib/Target/AMDGPU/
H A DAMDGPUISelLowering.cpp133 Expand); in AMDGPUTargetLowering()
143 setLoadExtAction(Op, VT, MVT::i32, Expand); in AMDGPUTargetLowering()
151 Expand); in AMDGPUTargetLowering()
241 setTruncStoreAction(MVT::i64, MVT::i1, Expand); in AMDGPUTargetLowering()
242 setTruncStoreAction(MVT::i64, MVT::i8, Expand); in AMDGPUTargetLowering()
243 setTruncStoreAction(MVT::i64, MVT::i16, Expand); in AMDGPUTargetLowering()
244 setTruncStoreAction(MVT::i64, MVT::i32, Expand); in AMDGPUTargetLowering()
251 setTruncStoreAction(MVT::f32, MVT::f16, Expand); in AMDGPUTargetLowering()
335 Expand); in AMDGPUTargetLowering()
388 VT, Expand); in AMDGPUTargetLowering()
[all …]
H A DR600ISelLowering.cpp58 MVT::v2i1, Expand); in R600TargetLowering()
61 MVT::v4i1, Expand); in R600TargetLowering()
82 setTruncStoreAction(MVT::v2i32, MVT::v2i1, Expand); in R600TargetLowering()
83 setTruncStoreAction(MVT::v4i32, MVT::v4i1, Expand); in R600TargetLowering()
89 MVT::f32, Expand); in R600TargetLowering()
92 MVT::i32, Expand); in R600TargetLowering()
101 setOperationAction(ISD::FSUB, MVT::f32, Expand); in R600TargetLowering()
113 Expand); in R600TargetLowering()
166 setOperationAction(ISD::CTPOP, MVT::i32, Expand); in R600TargetLowering()
169 setOperationAction(ISD::CTPOP, MVT::i64, Expand); in R600TargetLowering()
[all …]
/llvm-project-15.0.7/llvm/test/CodeGen/X86/
H A DO0-pipeline.ll20 ; CHECK-NEXT: Expand Atomic instructions
28 ; CHECK-NEXT: Expand vector predication intrinsics
30 ; CHECK-NEXT: Expand reduction intrinsics
31 ; CHECK-NEXT: Expand indirectbr instructions
/llvm-project-15.0.7/llvm/lib/CodeGen/SelectionDAG/
H A DLegalizeVectorOps.cpp94 void Expand(SDNode *Node, SmallVectorImpl<SDValue> &Results);
289 Action = TargetLowering::Expand; in LegalizeOp()
304 if (Action == TargetLowering::Expand && !TLI.isStrictFPEnabled() && in LegalizeOp()
309 == TargetLowering::Expand && in LegalizeOp()
496 case TargetLowering::Expand: in LegalizeOp()
498 Expand(Node, ResultVals); in LegalizeOp()
944 VT) == TargetLowering::Expand) in ExpandSELECT()
981 TLI.getOperationAction(ISD::SHL, VT) == TargetLowering::Expand) in ExpandSEXTINREG()
1206 TLI.getOperationAction(ISD::OR, VT) == TargetLowering::Expand) in ExpandVSELECT()
1352 TargetLowering::Expand) || in ExpandUINT_TO_FLOAT()
[all …]
/llvm-project-15.0.7/llvm/lib/Target/Hexagon/
H A DHexagonISelLowering.cpp1586 setOperationAction(IntExpOp, VT, Expand); in HexagonTargetLowering()
1593 setOperationAction(FPExpOp, VT, Expand); in HexagonTargetLowering()
1652 setOperationAction(VectExpOp, VT, Expand); in HexagonTargetLowering()
1734 setCondCodeAction(ISD::SETNE, VT, Expand); in HexagonTargetLowering()
1735 setCondCodeAction(ISD::SETLE, VT, Expand); in HexagonTargetLowering()
1736 setCondCodeAction(ISD::SETGE, VT, Expand); in HexagonTargetLowering()
1737 setCondCodeAction(ISD::SETLT, VT, Expand); in HexagonTargetLowering()
1738 setCondCodeAction(ISD::SETULE, VT, Expand); in HexagonTargetLowering()
1739 setCondCodeAction(ISD::SETUGE, VT, Expand); in HexagonTargetLowering()
1740 setCondCodeAction(ISD::SETULT, VT, Expand); in HexagonTargetLowering()
[all …]
H A DHexagonISelLoweringHVX.cpp217 setOperationAction(ISD::SINT_TO_FP, T, Expand); in initializeHVXLowering()
218 setOperationAction(ISD::UINT_TO_FP, T, Expand); in initializeHVXLowering()
219 setOperationAction(ISD::FP_TO_SINT, T, Expand); in initializeHVXLowering()
220 setOperationAction(ISD::FP_TO_UINT, T, Expand); in initializeHVXLowering()
228 setCondCodeAction(ISD::SETNE, T, Expand); in initializeHVXLowering()
229 setCondCodeAction(ISD::SETLE, T, Expand); in initializeHVXLowering()
230 setCondCodeAction(ISD::SETGE, T, Expand); in initializeHVXLowering()
231 setCondCodeAction(ISD::SETLT, T, Expand); in initializeHVXLowering()
232 setCondCodeAction(ISD::SETULE, T, Expand); in initializeHVXLowering()
233 setCondCodeAction(ISD::SETUGE, T, Expand); in initializeHVXLowering()
[all …]
/llvm-project-15.0.7/llvm/test/CodeGen/RISCV/
H A DO0-pipeline.ll22 ; CHECK-NEXT: Expand Atomic instructions
28 ; CHECK-NEXT: Expand vector predication intrinsics
30 ; CHECK-NEXT: Expand reduction intrinsics
/llvm-project-15.0.7/llvm/lib/Target/PowerPC/
H A DPPCISelLowering.cpp213 setTruncStoreAction(MVT::f64, MVT::f32, Expand); in PPCTargetLowering()
291 setTruncStoreAction(VT, MVT::i1, Expand); in PPCTargetLowering()
825 setOperationAction(ISD::MUL , VT, Expand); in PPCTargetLowering()
826 setOperationAction(ISD::SDIV, VT, Expand); in PPCTargetLowering()
827 setOperationAction(ISD::SREM, VT, Expand); in PPCTargetLowering()
828 setOperationAction(ISD::UDIV, VT, Expand); in PPCTargetLowering()
829 setOperationAction(ISD::UREM, VT, Expand); in PPCTargetLowering()
830 setOperationAction(ISD::FDIV, VT, Expand); in PPCTargetLowering()
831 setOperationAction(ISD::FREM, VT, Expand); in PPCTargetLowering()
832 setOperationAction(ISD::FNEG, VT, Expand); in PPCTargetLowering()
[all …]
/llvm-project-15.0.7/llvm/lib/Target/NVPTX/
H A DNVPTXISelLowering.cpp418 setOperationAction(ISD::BR_CC, VT, Expand); in NVPTXTargetLowering()
447 setOperationAction(ISD::ROTL, MVT::i16, Expand); in NVPTXTargetLowering()
448 setOperationAction(ISD::ROTR, MVT::i16, Expand); in NVPTXTargetLowering()
449 setOperationAction(ISD::ROTL, MVT::i8, Expand); in NVPTXTargetLowering()
450 setOperationAction(ISD::ROTR, MVT::i8, Expand); in NVPTXTargetLowering()
490 setTruncStoreAction(VT, MVT::i1, Expand); in NVPTXTargetLowering()
578 setOperationAction(Op, MVT::v2f16, Expand); in NVPTXTargetLowering()
601 setOperationAction(Op, MVT::v2f16, Expand); in NVPTXTargetLowering()
612 setFP16OperationAction(Op, MVT::v2f16, GetMinMaxAction(Expand), Expand); in NVPTXTargetLowering()
615 setFP16OperationAction(Op, MVT::f16, GetMinMaxAction(Expand), Expand); in NVPTXTargetLowering()
[all …]
/llvm-project-15.0.7/llvm/lib/Target/WebAssembly/
H A DWebAssemblyISelLowering.cpp121 setCondCodeAction(CC, T, Expand); in WebAssemblyTargetLowering()
125 setOperationAction(Op, T, Expand); in WebAssemblyTargetLowering()
135 setOperationAction(ISD::FP16_TO_FP, T, Expand); in WebAssemblyTargetLowering()
138 setTruncStoreAction(T, MVT::f16, Expand); in WebAssemblyTargetLowering()
147 setOperationAction(Op, T, Expand); in WebAssemblyTargetLowering()
150 setOperationAction(Op, T, Expand); in WebAssemblyTargetLowering()
220 setOperationAction(Op, T, Expand); in WebAssemblyTargetLowering()
241 setOperationAction(Op, T, Expand); in WebAssemblyTargetLowering()
251 setOperationAction(Op, T, Expand); in WebAssemblyTargetLowering()
282 setOperationAction(Op, T, Expand); in WebAssemblyTargetLowering()
[all …]
/llvm-project-15.0.7/llvm/test/CodeGen/AArch64/
H A DO0-pipeline.ll18 ; CHECK-NEXT: Expand Atomic instructions
24 ; CHECK-NEXT: Expand vector predication intrinsics
26 ; CHECK-NEXT: Expand reduction intrinsics
/llvm-project-15.0.7/llvm/test/CodeGen/PowerPC/
H A DO3-pipeline.ll22 ; CHECK-NEXT: Expand Atomic instructions
52 ; CHECK-NEXT: Expand memcmp() to load/stores
64 ; CHECK-NEXT: Expand vector predication intrinsics
66 ; CHECK-NEXT: Expand reduction intrinsics
202 ; CHECK-NEXT: PowerPC Expand ISEL Generation
207 ; CHECK-NEXT: PowerPC Expand Atomic
/llvm-project-15.0.7/llvm/lib/Target/ARM/
H A DARMISelLowering.cpp198 setOperationAction(ISD::SDIV, VT, Expand); in addTypeForNEON()
199 setOperationAction(ISD::UDIV, VT, Expand); in addTypeForNEON()
200 setOperationAction(ISD::FDIV, VT, Expand); in addTypeForNEON()
201 setOperationAction(ISD::SREM, VT, Expand); in addTypeForNEON()
202 setOperationAction(ISD::UREM, VT, Expand); in addTypeForNEON()
203 setOperationAction(ISD::FREM, VT, Expand); in addTypeForNEON()
228 setOperationAction(Opc, VT, Expand); in setAllExpand()
282 setOperationAction(ISD::UDIV, VT, Expand); in addMVEVectorTypes()
283 setOperationAction(ISD::SDIV, VT, Expand); in addMVEVectorTypes()
284 setOperationAction(ISD::UREM, VT, Expand); in addMVEVectorTypes()
[all …]
/llvm-project-15.0.7/llvm/lib/Target/ARC/
H A DARCISelLowering.cpp114 setOperationAction(Opc, MVT::i32, Expand); in ARCTargetLowering()
147 setOperationAction(ISD::BRCOND, MVT::Other, Expand); in ARCTargetLowering()
148 setOperationAction(ISD::BR_JT, MVT::Other, Expand); in ARCTargetLowering()
158 setOperationAction(ISD::VAEND, MVT::Other, Expand); in ARCTargetLowering()
159 setOperationAction(ISD::VAARG, MVT::Other, Expand); in ARCTargetLowering()
160 setOperationAction(ISD::VACOPY, MVT::Other, Expand); in ARCTargetLowering()
163 setOperationAction(ISD::STACKSAVE, MVT::Other, Expand); in ARCTargetLowering()
164 setOperationAction(ISD::STACKRESTORE, MVT::Other, Expand); in ARCTargetLowering()

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