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Searched refs:getNode (Results 1 – 25 of 205) sorted by relevance

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/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/VE/
H A DVECustomDAG.cpp219 if (MemSDNode *MemN = dyn_cast<MemSDNode>(Op.getNode())) in getNodeChain()
231 if (auto *MemN = dyn_cast<MemSDNode>(Op.getNode())) in getMemoryPtr()
305 if (isa<MemSDNode>(Op.getNode())) { in getLoadStoreStride()
338 if (auto *StoreN = dyn_cast<StoreSDNode>(Op.getNode())) in getStoredValue()
354 if (auto *N = dyn_cast<MaskedLoadSDNode>(Op.getNode())) in getNodePassthru()
465 Scalar = getNode(VEISD::REPL_F32, MVT::i64, Scalar); in getBroadcast()
467 Scalar = getNode(VEISD::REPL_I32, MVT::i64, Scalar); in getBroadcast()
487 return DAG.getNode(OC, DL, DestVT, Vec, AVL); in getUnpack()
504 NewAVL = getNode(ISD::ADD, MVT::i32, {RawAVL, OneV}); in getTargetSplitMask()
507 NewAVL = getNode(ISD::SRL, MVT::i32, {NewAVL, OneV}); in getTargetSplitMask()
[all …]
H A DVVPISelLowering.cpp33 auto LoRes = CDAG.getNode(Opc, MVT::v256i1, {LoA, LoB}); in splitMaskArithmetic()
34 auto HiRes = CDAG.getNode(Opc, MVT::v256i1, {HiA, HiB}); in splitMaskArithmetic()
59 EVT OpVecVT = *getIdiomaticVectorType(Op.getNode()); in lowerToVVP()
86 return CDAG.getNode(VVPOpcode, LegalVecVT, in lowerToVVP()
140 auto DataVT = *getIdiomaticVectorType(Op.getNode()); in lowerVVP_LOAD_STORE()
162 SDValue DataV = CDAG.getNode(VEISD::VVP_SELECT, DataVT, in lowerVVP_LOAD_STORE()
164 SDValue NewLoadChainV = SDValue(NewLoadV.getNode(), 1); in lowerVVP_LOAD_STORE()
178 return CDAG.getNode(VEISD::VVP_STORE, Op.getNode()->getVTList(), in lowerVVP_LOAD_STORE()
271 EVT DataVT = *getIdiomaticVectorType(Op.getNode()); in lowerVVP_GATHER_SCATTER()
300 return CDAG.getNode(VEISD::VVP_SCATTER, MVT::Other, in lowerVVP_GATHER_SCATTER()
[all …]
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DAMDGPUISelLowering.cpp1720 SDValue Hi = DAG.getNode( in splitVector()
1774 Join = DAG.getNode( in SplitVectorLoad()
2221 Z = DAG.getNode(ISD::ADD, DL, VT, Z, in LowerUDIVREM()
2227 DAG.getNode(ISD::SUB, DL, VT, X, DAG.getNode(ISD::MUL, DL, VT, Q, Y)); in LowerUDIVREM()
3212 SDValue OppositeSign = DAG.getNode( in LowerINT_TO_FP32()
3931 DCI.AddToWorklist(Lo.getNode()); in splitBinaryBitConstantOpImpl()
3932 DCI.AddToWorklist(Hi.getNode()); in splitBinaryBitConstantOpImpl()
4060 return DAG.getNode( in performSrlCombine()
4368 DCI.AddToWorklist(Mulhi.getNode()); in performMulhsCombine()
4401 DCI.AddToWorklist(Mulhi.getNode()); in performMulhuCombine()
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H A DAMDGPUHSAMetadataStreamer.cpp182 Dims.push_back(Dims.getDocument()->getNode( in getWorkGroupDimensions()
208 Printf.push_back(Printf.getDocument()->getNode( in emitPrintf()
225 LanguageVersion.push_back(Kern.getDocument()->getNode( in emitKernelLanguage()
227 LanguageVersion.push_back(Kern.getDocument()->getNode( in emitKernelLanguage()
240 Kern[".vec_type_hint"] = Kern.getDocument()->getNode( in emitKernelAttrs()
252 Kern[".kind"] = Kern.getDocument()->getNode("init"); in emitKernelAttrs()
254 Kern[".kind"] = Kern.getDocument()->getNode("fini"); in emitKernelAttrs()
347 Arg[".size"] = Arg.getDocument()->getNode(Size); in emitKernelArg()
349 Arg[".offset"] = Arg.getDocument()->getNode(Offset); in emitKernelArg()
471 Kern.getDocument()->getNode(ProgramInfo.LDSSize); in getHSAKernelProps()
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H A DR600ISelLowering.cpp414 assert((!Result.getNode() || in LowerOperation()
692 DAG.getNode(ISD::FADD, DL, VT, in LowerTrig()
744 return DAG.getNode( in lowerFP_TO_UINT()
754 return DAG.getNode( in lowerFP_TO_SINT()
1856 if (LHS.getOperand(2).getNode() != True.getNode() || in PerformDAGCombine()
1857 LHS.getOperand(3).getNode() != False.getNode() || in PerformDAGCombine()
1858 RHS.getNode() != False.getNode()) { in PerformDAGCombine()
1955 if (!Neg.getNode()) in FoldOperand()
1961 if (!Abs.getNode()) in FoldOperand()
1970 if (!Sel.getNode()) in FoldOperand()
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/freebsd-14.2/contrib/llvm-project/llvm/lib/BinaryFormat/
H A DMsgPackDocument.cpp80 *this = getDocument()->getNode(Val); in operator =()
84 *this = getDocument()->getNode(Val); in operator =()
88 *this = getDocument()->getNode(Val); in operator =()
92 *this = getDocument()->getNode(Val); in operator =()
96 *this = getDocument()->getNode(Val); in operator =()
163 Node = getNode(); in readFromBlob()
166 Node = getNode(Obj.Int); in readFromBlob()
169 Node = getNode(Obj.UInt); in readFromBlob()
172 Node = getNode(Obj.Bool); in readFromBlob()
175 Node = getNode(Obj.Float); in readFromBlob()
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/freebsd-14.2/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/
H A DLegalizeIntegerTypes.cpp313 if (Res.getNode()) in PromoteIntegerResult()
539 return DAG.getNode(ISD::SRL, dl, NVT, DAG.getNode(ISD::BSWAP, dl, NVT, Op), in PromoteIntRes_BSWAP()
1897 if (Res.getNode() == N) in PromoteIntegerOperand()
2779 if (Lo.getNode()) in ExpandIntegerResult()
3673 Lo = DAG.getNode(ISD::ADD, dl, NVT, DAG.getNode(ISD::CTPOP, dl, NVT, Lo), in ExpandIntRes_CTPOP()
3956 Lo = DAG.getNode( in ExpandIntRes_LOAD()
4656 Hi = DAG.getNode( in ExpandIntRes_SIGN_EXTEND()
5213 if (!LoCmp.getNode()) in IntegerExpandSetCCOperands()
5220 if (!HiCmp.getNode()) in IntegerExpandSetCCOperands()
5288 if (!NewLHS.getNode()) in IntegerExpandSetCCOperands()
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H A DLegalizeDAG.cpp597 Hi = DAG.getNode( in LegalizeStoreOps()
608 Hi = DAG.getNode( in LegalizeStoreOps()
821 Hi = DAG.getNode( in LegalizeLoadOps()
850 Hi = DAG.getNode( in LegalizeLoadOps()
1426 if (!Ch.getNode()) { in ExpandExtractFromVectorThroughStack()
1954 if (!Value1.getNode()) in ExpandBUILD_VECTOR()
3263 Op = DAG.getNode( in ExpandNode()
3279 Op = DAG.getNode( in ExpandNode()
3923 Tmp2 = DAG.getNode( in ExpandNode()
4994 Tmp1 = DAG.getNode( in PromoteNode()
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H A DTargetLowering.cpp5952 if (!Op.getNode()) in lowerImmediateIfPossible()
7424 assert((LL.getNode() && LH.getNode() && RL.getNode() && RH.getNode()) || in expandMUL_LOHI()
7425 (!LL.getNode() && !LH.getNode() && !RL.getNode() && !RH.getNode())); in expandMUL_LOHI()
7445 if (!LL.getNode() && !RL.getNode() && in expandMUL_LOHI()
7451 if (!LL.getNode()) in expandMUL_LOHI()
7485 if (!LH.getNode() && !RH.getNode() && in expandMUL_LOHI()
7494 if (!LH.getNode()) in expandMUL_LOHI()
7684 LL = DAG.getNode( in expandDIVREMByConstant()
8658 Op = DAG.getNode(ISD::ADD, dl, VT, DAG.getNode(ISD::AND, dl, VT, Op, Mask33), in expandCTPOP()
8841 DAG.getNode(ISD::MUL, DL, VT, DAG.getNode(ISD::AND, DL, VT, Op, Neg), in CTTZTableLookup()
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H A DDAGCombiner.cpp3586 if (Carry1.getNode()->isOperandOf(Carry0.getNode())) in combineCarryDiamond()
5340 if (LoOpt.getNode() && LoOpt.getNode() != Lo.getNode() && in SimplifyNodeWithTwoResults()
6162 LogicOp, LHS.getNode(), RHS.getNode()); in foldAndOrOfSETCC()
8491 if (LHSMask.getNode() || RHSMask.getNode()) { in MatchRotate()
8584 if (LHSMask.getNode() || RHSMask.getNode()) in MatchRotate()
13415 if (NarrowLoad.getNode() != N0.getNode()) { in visitSIGN_EXTEND()
13570 if (NewXor.getNode() == N0.getNode()) { in visitSIGN_EXTEND()
13695 if (NarrowLoad.getNode() != N0.getNode()) { in visitZERO_EXTEND()
13950 if (NarrowLoad.getNode() != N0.getNode()) { in visitANY_EXTEND()
17999 if (Tmp.getNode() == N.getNode()) in rebuildSetCC()
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H A DResourcePriorityQueue.cpp74 const SDNode *ScegN = PredSU->getNode(); in numberRCValPredInSU()
112 const SDNode *ScegN = SuccSU->getNode(); in numberRCValSuccInSU()
239 if (!SU || !SU->getNode()) in isResourceAvailable()
244 if (SU->getNode()->getGluedNode()) in isResourceAvailable()
249 if (SU->getNode()->isMachineOpcode()) in isResourceAvailable()
289 if (SU->getNode() && SU->getNode()->isMachineOpcode()) { in reserveResources()
293 SU->getNode()->getMachineOpcode())); in reserveResources()
321 if (!SU || !SU->getNode() || !SU->getNode()->isMachineOpcode()) in rawRegPressureDelta()
336 if (isa<ConstantSDNode>(Op.getNode())) in rawRegPressureDelta()
355 if (!SU || !SU->getNode() || !SU->getNode()->isMachineOpcode()) in regPressureDelta()
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H A DLegalizeTypesGeneric.cpp58 Lo = DAG.getNode(ISD::BITCAST, dl, NOutVT, Lo); in ExpandRes_BITCAST()
59 Hi = DAG.getNode(ISD::BITCAST, dl, NOutVT, Hi); in ExpandRes_BITCAST()
69 Lo = DAG.getNode(ISD::BITCAST, dl, NOutVT, Lo); in ExpandRes_BITCAST()
70 Hi = DAG.getNode(ISD::BITCAST, dl, NOutVT, Hi); in ExpandRes_BITCAST()
77 Lo = DAG.getNode(ISD::BITCAST, dl, NOutVT, Lo); in ExpandRes_BITCAST()
78 Hi = DAG.getNode(ISD::BITCAST, dl, NOutVT, Hi); in ExpandRes_BITCAST()
83 Lo = DAG.getNode(ISD::BITCAST, dl, NOutVT, Lo); in ExpandRes_BITCAST()
139 Vals.push_back(DAG.getNode( in ExpandRes_BITCAST()
229 SDValue NewVec = DAG.getNode( in ExpandRes_EXTRACT_VECTOR_ELT()
422 SDValue NewVec = DAG.getNode(ISD::BITCAST, dl, in ExpandOp_INSERT_VECTOR_ELT()
[all …]
H A DLegalizeVectorTypes.cpp205 if (R.getNode()) in ScalarizeVectorResult()
244 .getNode(); in ScalarizeVecRes_FFREXP()
593 Src = DAG.getNode( in ScalarizeVecRes_FP_TO_XINT_SAT()
751 if (Res.getNode() == N) in ScalarizeVectorOperand()
1220 if (Lo.getNode()) in SplitVectorResult()
1448 Hi = DAG.getNode( in SplitVecRes_EXTRACT_SUBVECTOR()
1743 SDNode *LoNode = DAG.getNode(Opcode, dl, LoVTs, LoLHS, LoRHS).getNode(); in SplitVecRes_OverflowOp()
1744 SDNode *HiNode = DAG.getNode(Opcode, dl, HiVTs, HiLHS, HiRHS).getNode(); in SplitVecRes_OverflowOp()
3097 if (Res.getNode() == N) in SplitVectorOperand()
4334 if (Res.getNode()) in WidenVectorResult()
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H A DSelectionDAGBuilder.cpp1187 if (N.getNode()) { in handleDebugDeclare()
1436 if (Val.getNode()) { in resolveDanglingDebugInfo()
1594 if (N.getNode()) { in handleDebugValue()
1723 if (N.getNode()) return N; in getValue()
1742 if (N.getNode()) { in getNonRegisterValue()
6606 Result = DAG.getNode( in visitIntrinsicCall()
6702 Res = DAG.getNode( in visitIntrinsicCall()
6753 Res = DAG.getNode( in visitIntrinsicCall()
7537 assert(!Result.first.getNode() && !Result.second.getNode() && in visitIntrinsicCall()
8274 assert((Result.second.getNode() || !Result.first.getNode()) && in lowerInvokable()
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H A DLegalizeVectorOps.cpp547 if (!Res.getNode()) in LowerOperationWrapper()
772 Res = DAG.getNode(ISD::FP_ROUND, dl, VT, Res, in Promote()
775 Res = DAG.getNode(ISD::BITCAST, dl, VT, Res); in Promote()
1256 return DAG.getNode( in ExpandANY_EXTEND_VECTOR_INREG()
1277 return DAG.getNode(ISD::SRA, DL, VT, in ExpandSIGN_EXTEND_VECTOR_INREG()
1317 return DAG.getNode(ISD::BITCAST, DL, VT, in ExpandZERO_EXTEND_VECTOR_INREG()
1345 return DAG.getNode(ISD::BITCAST, DL, VT, Op); in ExpandBSWAP()
1457 Op1 = DAG.getNode(ISD::BITCAST, DL, VT, Op1); in ExpandVSELECT()
1458 Op2 = DAG.getNode(ISD::BITCAST, DL, VT, Op2); in ExpandVSELECT()
1740 if (CC.getNode()) { in ExpandSETCC()
[all …]
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/XCore/
H A DXCoreISelLowering.cpp542 SDValue Lo(Hi.getNode(), 1); in LowerSMUL_LOHI()
559 SDValue Lo(Hi.getNode(), 1); in LowerUMUL_LOHI()
656 SDValue Lo(Hi.getNode(), 1); in TryExpandADDWithMul()
664 SDValue Lo(Hi.getNode(), 1); in TryExpandADDWithMul()
675 SDValue Lo(Hi.getNode(), 1); in TryExpandADDWithMul()
716 SDValue Carry(Lo.getNode(), 1); in ExpandADDSUB()
720 SDValue Ignored(Hi.getNode(), 1); in ExpandADDSUB()
730 SDNode *Node = Op.getNode(); in LowerVAARG()
1124 if (InGlue.getNode()) in LowerCCCCallTo()
1416 if (Glue.getNode()) in LowerReturn()
[all …]
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/Hexagon/
H A DHexagonISelLoweringHVX.cpp728 return DAG.getNode(ISD::SHL, dl, MVT::i32, in convertToByteIndex()
815 if (!SplatV.getNode()) in buildHvxVectorReg()
831 assert(SplatV.getNode()); in buildHvxVectorReg()
873 if (Vec.getNode() != nullptr && T.getNode() != Vec.getNode()) in buildHvxVectorReg()
1677 for (SDValue V : Op.getNode()->ops()) in LowerHvxConcatVectors()
1727 ArrayRef<SDUse> U(Op.getNode()->ops()); in LowerHvxConcatVectors()
1893 return DAG.getNode(ISD::SUB, dl, ResTy, in LowerHvxCttz()
2100 DAG.getNode(ISD::AND, dl, MVT::i32, in LowerHvxFunnelShift()
2103 DAG.getNode(ISD::SUB, dl, MVT::i32, in LowerHvxFunnelShift()
2123 return DAG.getNode(MOpc, dl, ty(Op), in LowerHvxFunnelShift()
[all …]
H A DHexagonISelDAGToDAG.cpp277 SDNode *C = Ch.getNode(); in tryLoadOfLoadIntrinsic()
305 if (C->getNumOperands() < 4 || Loc.getNode() != C->getOperand(3).getNode()) in tryLoadOfLoadIntrinsic()
1113 ReplaceNode(T0.getNode(), NewShl.getNode()); in ppAddrReorderAddShl()
1189 ReplaceNode(T0.getNode(), NewShl.getNode()); in ppAddrRewriteAndSrl()
1715 assert(A.Value.getNode() && B.Value.getNode()); in Compare()
1961 if ((!isOpcodeHandled(Op0.getNode()) || RootWeights.count(Op0.getNode())) && in balanceSubTree()
1962 (!isOpcodeHandled(Op1.getNode()) || RootWeights.count(Op1.getNode()))) { in balanceSubTree()
2026 if (Child.getNode() != N && RootWeights.count(Child.getNode())) { in balanceSubTree()
2191 if (GA.Value.getNode()) in balanceSubTree()
2222 if ((RootWeights.count(V0.getNode()) && RootWeights[V0.getNode()] == -2) || in balanceSubTree()
[all …]
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/ARM/
H A DARMISelLowering.cpp3332 if (Glue.getNode()) in LowerReturn()
5164 if (True.getNode() && False.getNode()) { in LowerSELECT()
12629 if (!IsVUZPShuffleNode(N0.getNode()) || N0.getNode() != N1.getNode() || in AddCombineToVPADD()
12667 if (!IsVUZPShuffleNode(N00.getNode()) || N00.getNode() != N10.getNode() || in AddCombineVUZPToVPADDL()
12930 if (AddcSubcOp0.getNode() == AddcSubcOp1.getNode()) in AddCombineTo64bitMLAL()
12951 if (AddeSubeOp0.getNode() == AddeSubeOp1.getNode()) in AddCombineTo64bitMLAL()
14469 if ((SRL.getOperand(0).getNode() != SHL.getOperand(0).getNode()) || in PerformORCombineToSMULWBT()
15141 Op0.getNode() == Op1.getNode() && in PerformVMOVDRRCombine()
15557 DCI.CombineTo(OtherExt.getNode(), SDValue(VMOVRRD.getNode(), 1)); in PerformExtractEltToVMOVRRD()
18304 DAG.ReplaceAllUsesWith(Int.getNode(), LoopDec.getNode()); in PerformHWLoopCombine()
[all …]
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/AMDGPU/Utils/
H A DAMDGPUPALMetadata.cpp161 auto It = Regs.find(MsgPackDoc.getNode(Reg)); in getRegister()
179 auto &N = getRegisters()[MsgPackDoc.getNode(Reg)]; in setRegister()
182 N = N.getDocument()->getNode(Val); in setRegister()
207 getHwStage(CC)[".vgpr_count"] = MsgPackDoc.getNode(Val); in setNumUsedVgprs()
228 getHwStage(CC)[".sgpr_count"] = MsgPackDoc.getNode(Val); in setNumUsedSgprs()
246 Node[".backend_stack_size"] = MsgPackDoc.getNode(Val); in setFunctionScratchSize()
252 Node[".lds_size"] = MsgPackDoc.getNode(Val); in setFunctionLdsSize()
259 Node[".vgpr_count"] = MsgPackDoc.getNode(Val); in setFunctionNumUsedVgprs()
266 Node[".sgpr_count"] = MsgPackDoc.getNode(Val); in setFunctionNumUsedSgprs()
696 Key = MsgPackDoc.getNode(KeyName, /*Copy=*/true); in toString()
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/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/AArch64/
H A DAArch64ISelLowering.cpp4038 return DAG.getNode( in LowerVectorFP_TO_INT()
4111 return DAG.getNode( in LowerFP_TO_INT()
4776 return DAG.getNode( in LowerMUL()
8356 if (Glue.getNode()) in LowerReturn()
8434 return DAG.getNode( in getAddrLarge()
9189 Val = DAG.getNode( in LowerCTPOP_PARITY()
10529 return DAG.getNode( in getSETCC()
11015 return DAG.getNode( in ReconstructShuffleWithRuntimeMask()
14067 if (!Cmp.getNode()) in LowerVSETCC()
22207 N = NV.getNode(); in performBRCONDCombine()
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/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/X86/
H A DX86ISelLowering.cpp6590 if (!V1.getNode()) in LowerBuildVectorv4x32()
6771 if (!Elt.getNode()) in EltsFromConsecutiveLoads()
8780 assert(!VarElt.getNode() && !InsIndex.getNode() && in LowerBUILD_VECTOR()
8886 if (Op.getNode()->isOnlyUserOf(Item.getNode())) in LowerBUILD_VECTOR()
21507 Res = DAG.getNode( in LowerFP_TO_FP16()
22840 if (!Src.getNode()) in LowerAndToBT()
29992 R = DAG.getNode( in LowerRotate()
30039 M = DAG.getNode( in LowerRotate()
30049 M = DAG.getNode( in LowerRotate()
30059 M = DAG.getNode( in LowerRotate()
[all …]
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/Lanai/
H A DLanaiISelLowering.cpp352 if (Result.getNode()) { in LowerAsmOperandForConstraint()
593 if (Glue.getNode()) in LowerReturn()
597 return DAG.getNode(Opc, DL, MVT::Other, in LowerReturn()
697 if (StackPtr.getNode() == nullptr) in LowerCCCCallTo()
758 if (InGlue.getNode()) in LowerCCCCallTo()
949 Res = DAG.getNode(ISD::SHL, DL, VT, V, in LowerMUL()
1142 return DAG.getNode(ISD::OR, DL, MVT::i32, in LowerConstantPool()
1307 SDValue NegatedPlus32 = DAG.getNode( in LowerSRL_PARTS()
1448 if (N0.getNode()->hasOneUse()) in combineSelectAndUseCommutative()
1451 if (N1.getNode()->hasOneUse()) in combineSelectAndUseCommutative()
[all …]
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/LoongArch/
H A DLoongArchISelLowering.cpp867 return DAG.getNode(ISD::ADD, DL, Ty, Offset, in getStaticTLSAddr()
1310 return DAG.getNode( in lowerINTRINSIC_W_CHAIN()
2037 SDValue CSRXCHGResults = DAG.getNode( in ReplaceNodeResults()
2343 return DAG.getNode( in performORCombine()
2624 return DAG.getNode( in performINTRINSIC_WO_CHAINCombine()
2944 return DAG.getNode( in performINTRINSIC_WO_CHAINCombine()
2970 return DAG.getNode( in performINTRINSIC_WO_CHAINCombine()
3963 cast<StoreSDNode>(Store.getNode()) in LowerFormalArguments()
4202 if (!StackPtr.getNode()) in LowerCall()
4263 if (Glue.getNode()) in LowerCall()
[all …]
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/M68k/
H A DM68kISelLowering.cpp684 if (!StackPtr.getNode()) { in LowerCall()
742 if (!StackPtr.getNode()) { in LowerCall()
840 if (InGlue.getNode()) in LowerCall()
1163 if (Glue.getNode()) in LowerReturn()
1552 SDNode *N = Op.getNode(); in lowerOverflowArithmetic()
1627 SDNode *N = Op.getNode(); in LowerXALUO()
1716 if (LHS.getNode()) in LowerAndToBTST()
1779 if (ISD::isNON_EXTLoad(LHS.getNode()) && !ISD::isNON_EXTLoad(RHS.getNode())) { in TranslateM68kCC()
2078 return SDValue(New.getNode(), 1); in EmitTest()
2999 if (Result.getNode()) { in LowerAsmOperandForConstraint()
[all …]

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