Lines Matching refs:getNode
2166 Val = DAG.getNode(ISD::BITCAST, dl, MVT::getIntegerVT(LocVT.getSizeInBits()), in MoveToHPR()
2169 Val = DAG.getNode(ARMISD::VMOVhr, dl, ValVT, Val); in MoveToHPR()
2171 Val = DAG.getNode(ISD::TRUNCATE, dl, in MoveToHPR()
2173 Val = DAG.getNode(ISD::BITCAST, dl, ValVT, Val); in MoveToHPR()
2182 Val = DAG.getNode(ARMISD::VMOVrh, dl, in MoveFromHPR()
2185 Val = DAG.getNode(ISD::BITCAST, dl, in MoveFromHPR()
2187 Val = DAG.getNode(ISD::ZERO_EXTEND, dl, in MoveFromHPR()
2190 return DAG.getNode(ISD::BITCAST, dl, LocVT, Val); in MoveFromHPR()
2234 Val = DAG.getNode(ARMISD::VMOVDRR, dl, MVT::f64, Lo, Hi); in LowerCallResult()
2237 SDValue Vec = DAG.getNode(ISD::UNDEF, dl, MVT::v2f64); in LowerCallResult()
2238 Vec = DAG.getNode(ISD::INSERT_VECTOR_ELT, dl, MVT::v2f64, Vec, Val, in LowerCallResult()
2251 Val = DAG.getNode(ARMISD::VMOVDRR, dl, MVT::f64, Lo, Hi); in LowerCallResult()
2252 Val = DAG.getNode(ISD::INSERT_VECTOR_ELT, dl, MVT::v2f64, Vec, Val, in LowerCallResult()
2266 Val = DAG.getNode(ISD::BITCAST, dl, VA.getValVT(), Val); in LowerCallResult()
2301 DstAddr = DAG.getNode(ISD::ADD, dl, getPointerTy(DAG.getDataLayout()), in computeAddrForCallArg()
2318 SDValue fmrrd = DAG.getNode(ARMISD::VMOVRRD, dl, in PassF64ArgInRegs()
2327 if (!StackPtr.getNode()) in PassF64ArgInRegs()
2499 Arg = DAG.getNode(ISD::SIGN_EXTEND, dl, VA.getLocVT(), Arg); in LowerCall()
2502 Arg = DAG.getNode(ISD::ZERO_EXTEND, dl, VA.getLocVT(), Arg); in LowerCall()
2505 Arg = DAG.getNode(ISD::ANY_EXTEND, dl, VA.getLocVT(), Arg); in LowerCall()
2508 Arg = DAG.getNode(ISD::BITCAST, dl, VA.getLocVT(), Arg); in LowerCall()
2532 Arg = DAG.getNode(ISD::BITCAST, dl, MVT::getIntegerVT(LocBits), Arg); in LowerCall()
2533 Arg = DAG.getNode(ISD::AND, dl, MVT::getIntegerVT(LocBits), Arg, Mask); in LowerCall()
2534 Arg = DAG.getNode(ISD::BITCAST, dl, VA.getLocVT(), Arg); in LowerCall()
2540 SDValue Op0 = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, MVT::f64, Arg, in LowerCall()
2542 SDValue Op1 = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, MVT::f64, Arg, in LowerCall()
2595 SDValue AddArg = DAG.getNode(ISD::ADD, dl, PtrVT, Arg, Const); in LowerCall()
2617 SDValue Src = DAG.getNode(ISD::ADD, dl, PtrVT, Arg, SrcOffset); in LowerCall()
2625 MemOpChains.push_back(DAG.getNode(ARMISD::COPY_STRUCT_BYVAL, dl, VTs, in LowerCall()
2641 Chain = DAG.getNode(ISD::TokenFactor, dl, MVT::Other, MemOpChains); in LowerCall()
2679 Callee = DAG.getNode(ARMISD::Wrapper, dl, PtrVt, in LowerCall()
2689 Addr = DAG.getNode(ARMISD::Wrapper, dl, MVT::i32, Addr); in LowerCall()
2700 Callee = DAG.getNode(ARMISD::Wrapper, dl, PtrVt, in LowerCall()
2710 Addr = DAG.getNode(ARMISD::Wrapper, dl, MVT::i32, Addr); in LowerCall()
2726 Callee = DAG.getNode( in LowerCall()
2747 DAG.getNode(ARMISD::Wrapper, dl, PtrVt, Callee), in LowerCall()
2763 CPAddr = DAG.getNode(ARMISD::Wrapper, dl, MVT::i32, CPAddr); in LowerCall()
2768 Callee = DAG.getNode(ARMISD::PIC_ADD, dl, PtrVt, Callee, PICLabel); in LowerCall()
2858 if (InGlue.getNode()) in LowerCall()
2864 SDValue Ret = DAG.getNode(ARMISD::TC_RETURN, dl, NodeTys, Ops); in LowerCall()
2865 DAG.addNoMergeSiteInfo(Ret.getNode(), CLI.NoMerge); in LowerCall()
2866 DAG.addCallSiteInfo(Ret.getNode(), std::move(CSInfo)); in LowerCall()
2871 Chain = DAG.getNode(CallOpc, dl, NodeTys, Ops); in LowerCall()
2872 DAG.addNoMergeSiteInfo(Chain.getNode(), CLI.NoMerge); in LowerCall()
2874 DAG.addCallSiteInfo(Chain.getNode(), std::move(CSInfo)); in LowerCall()
3015 (!isa<GlobalAddressSDNode>(Callee.getNode()) || isIndirect)) { in IsEligibleForTailCallOptimization()
3173 return DAG.getNode(ARMISD::INTRET_GLUE, DL, MVT::Other, RetOps); in LowerInterruptReturn()
3250 Arg = DAG.getNode(ISD::BITCAST, dl, VA.getLocVT(), Arg); in LowerReturn()
3264 Arg = DAG.getNode(ISD::BITCAST, dl, MVT::getIntegerVT(LocBits), Arg); in LowerReturn()
3265 Arg = DAG.getNode(ISD::AND, dl, MVT::getIntegerVT(LocBits), Arg, Mask); in LowerReturn()
3266 Arg = DAG.getNode(ISD::BITCAST, dl, VA.getLocVT(), Arg); in LowerReturn()
3274 SDValue Half = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, MVT::f64, Arg, in LowerReturn()
3276 SDValue HalfGPRs = DAG.getNode(ARMISD::VMOVRRD, dl, in LowerReturn()
3293 Arg = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, MVT::f64, Arg, in LowerReturn()
3298 SDValue fmrrd = DAG.getNode(ARMISD::VMOVRRD, dl, in LowerReturn()
3332 if (Glue.getNode()) in LowerReturn()
3350 return DAG.getNode(RetNode, dl, MVT::Other, RetOps); in LowerReturn()
3381 if (Copies.count(UseChain.getNode())) in isUsedByReturnOnly()
3448 return DAG.getNode(ISD::WRITE_REGISTER, DL, MVT::Other, Ops); in LowerWRITE_REGISTER()
3496 return DAG.getNode(ARMISD::Wrapper, dl, MVT::i32, Res); in LowerConstantPool()
3528 CPAddr = DAG.getNode(ARMISD::Wrapper, DL, PtrVT, CPAddr); in LowerBlockAddress()
3535 return DAG.getNode(ARMISD::PIC_ADD, DL, PtrVT, Result, PICLabel); in LowerBlockAddress()
3600 DAG.getNode(ARMISD::CALL, DL, DAG.getVTList(MVT::Other, MVT::Glue), in LowerGlobalTLSAddressDarwin()
3623 SDValue CurrentTEB = DAG.getNode(ISD::INTRINSIC_W_CHAIN, DL, in LowerGlobalTLSAddressWindows()
3632 DAG.getNode(ISD::ADD, DL, PtrVT, TEB, DAG.getIntPtrConstant(0x2c, DL)); in LowerGlobalTLSAddressWindows()
3641 TLSIndex = DAG.getNode(ARMISD::Wrapper, DL, PtrVT, TLSIndex); in LowerGlobalTLSAddressWindows()
3644 SDValue Slot = DAG.getNode(ISD::SHL, DL, PtrVT, TLSIndex, in LowerGlobalTLSAddressWindows()
3647 DAG.getNode(ISD::ADD, DL, PtrVT, TLSArray, Slot), in LowerGlobalTLSAddressWindows()
3655 DAG.getNode(ARMISD::Wrapper, DL, MVT::i32, in LowerGlobalTLSAddressWindows()
3659 return DAG.getNode(ISD::ADD, DL, PtrVT, TLS, Offset); in LowerGlobalTLSAddressWindows()
3676 Argument = DAG.getNode(ARMISD::Wrapper, dl, MVT::i32, Argument); in LowerToTLSGeneralDynamicModel()
3683 Argument = DAG.getNode(ARMISD::PIC_ADD, dl, PtrVT, Argument, PICLabel); in LowerToTLSGeneralDynamicModel()
3714 SDValue ThreadPointer = DAG.getNode(ARMISD::THREAD_POINTER, dl, PtrVT); in LowerToTLSExecModels()
3727 Offset = DAG.getNode(ARMISD::Wrapper, dl, MVT::i32, Offset); in LowerToTLSExecModels()
3734 Offset = DAG.getNode(ARMISD::PIC_ADD, dl, PtrVT, Offset, PICLabel); in LowerToTLSExecModels()
3745 Offset = DAG.getNode(ARMISD::Wrapper, dl, MVT::i32, Offset); in LowerToTLSExecModels()
3753 return DAG.getNode(ISD::ADD, dl, PtrVT, ThreadPointer, Offset); in LowerToTLSExecModels()
3894 return DAG.getNode(ARMISD::Wrapper, dl, MVT::i32, CPAddr); in promoteToConstantPool()
3936 SDValue Result = DAG.getNode(ARMISD::WrapperPIC, dl, PtrVT, G); in LowerGlobalAddressELF()
3945 SDValue Result = DAG.getNode(ARMISD::WrapperPIC, dl, PtrVT, G); in LowerGlobalAddressELF()
3953 RelAddr = DAG.getNode(ARMISD::Wrapper, dl, PtrVT, G); in LowerGlobalAddressELF()
3958 CPAddr = DAG.getNode(ARMISD::Wrapper, dl, MVT::i32, CPAddr); in LowerGlobalAddressELF()
3964 SDValue Result = DAG.getNode(ISD::ADD, dl, PtrVT, SB, RelAddr); in LowerGlobalAddressELF()
3977 return DAG.getNode(ARMISD::Wrapper, dl, PtrVT, in LowerGlobalAddressELF()
3981 CPAddr = DAG.getNode(ARMISD::Wrapper, dl, MVT::i32, CPAddr); in LowerGlobalAddressELF()
4005 SDValue Result = DAG.getNode(Wrapper, dl, PtrVT, G); in LowerGlobalAddressDarwin()
4036 Result = DAG.getNode(ARMISD::Wrapper, DL, PtrVT, in LowerGlobalAddressWindows()
4049 return DAG.getNode(ARMISD::EH_SJLJ_SETJMP, dl, in LowerEH_SJLJ_SETJMP()
4057 return DAG.getNode(ARMISD::EH_SJLJ_LONGJMP, dl, MVT::Other, Op.getOperand(0), in LowerEH_SJLJ_LONGJMP()
4064 return DAG.getNode(ARMISD::EH_SJLJ_SETUP_DISPATCH, dl, MVT::Other, in LowerEH_SJLJ_SETUP_DISPATCH()
4119 return DAG.getNode(ARMISD::THREAD_POINTER, dl, PtrVT); in LowerINTRINSIC_WO_CHAIN()
4125 DAG.getNode(ISD::SRA, dl, VTy, Operand, DAG.getConstant(31, dl, VTy)); in LowerINTRINSIC_WO_CHAIN()
4126 SDValue XOR = DAG.getNode(ISD::XOR, dl, VTy, SRA, Operand); in LowerINTRINSIC_WO_CHAIN()
4128 DAG.getNode(ISD::SHL, dl, VTy, XOR, DAG.getConstant(1, dl, VTy)); in LowerINTRINSIC_WO_CHAIN()
4130 DAG.getNode(ISD::OR, dl, VTy, SHL, DAG.getConstant(1, dl, VTy)); in LowerINTRINSIC_WO_CHAIN()
4131 SDValue Result = DAG.getNode(ISD::CTLZ, dl, VTy, OR); in LowerINTRINSIC_WO_CHAIN()
4144 SDValue SRAHi = DAG.getNode(ISD::SRA, dl, VTy, Hi, Constant31); in LowerINTRINSIC_WO_CHAIN()
4145 SDValue XORHi = DAG.getNode(ISD::XOR, dl, VTy, SRAHi, Hi); in LowerINTRINSIC_WO_CHAIN()
4146 SDValue SHLHi = DAG.getNode(ISD::SHL, dl, VTy, XORHi, Constant1); in LowerINTRINSIC_WO_CHAIN()
4147 SDValue ORHi = DAG.getNode(ISD::OR, dl, VTy, SHLHi, Constant1); in LowerINTRINSIC_WO_CHAIN()
4148 SDValue CLSHi = DAG.getNode(ISD::CTLZ, dl, VTy, ORHi); in LowerINTRINSIC_WO_CHAIN()
4155 SDValue CLZAdjustedLo = DAG.getNode(ISD::CTLZ, dl, VTy, AdjustedLo); in LowerINTRINSIC_WO_CHAIN()
4158 DAG.getNode(ISD::ADD, dl, VTy, CLZAdjustedLo, Constant31), CLSHi); in LowerINTRINSIC_WO_CHAIN()
4173 CPAddr = DAG.getNode(ARMISD::Wrapper, dl, MVT::i32, CPAddr); in LowerINTRINSIC_WO_CHAIN()
4180 Result = DAG.getNode(ARMISD::PIC_ADD, dl, PtrVT, Result, PICLabel); in LowerINTRINSIC_WO_CHAIN()
4185 return DAG.getNode(ISD::ABS, SDLoc(Op), Op.getValueType(), in LowerINTRINSIC_WO_CHAIN()
4191 return DAG.getNode(NewOpc, SDLoc(Op), Op.getValueType(), in LowerINTRINSIC_WO_CHAIN()
4198 return DAG.getNode(NewOpc, SDLoc(Op), Op.getValueType(), in LowerINTRINSIC_WO_CHAIN()
4207 return DAG.getNode(NewOpc, SDLoc(Op), Op.getValueType(), in LowerINTRINSIC_WO_CHAIN()
4216 return DAG.getNode(NewOpc, SDLoc(Op), Op.getValueType(), in LowerINTRINSIC_WO_CHAIN()
4221 return DAG.getNode(NewOpc, SDLoc(Op), Op.getValueType(), in LowerINTRINSIC_WO_CHAIN()
4225 return DAG.getNode(ARMISD::VTBL1, SDLoc(Op), Op.getValueType(), in LowerINTRINSIC_WO_CHAIN()
4228 return DAG.getNode(ARMISD::VTBL2, SDLoc(Op), Op.getValueType(), in LowerINTRINSIC_WO_CHAIN()
4232 return DAG.getNode(ARMISD::PREDICATE_CAST, SDLoc(Op), Op.getValueType(), in LowerINTRINSIC_WO_CHAIN()
4235 return DAG.getNode(ARMISD::VECTOR_REG_CAST, SDLoc(Op), Op.getValueType(), in LowerINTRINSIC_WO_CHAIN()
4238 return DAG.getNode(ARMISD::LSLL, SDLoc(Op), Op->getVTList(), in LowerINTRINSIC_WO_CHAIN()
4241 return DAG.getNode(ARMISD::ASRL, SDLoc(Op), Op->getVTList(), in LowerINTRINSIC_WO_CHAIN()
4259 return DAG.getNode(ARMISD::MEMBARRIER_MCR, dl, MVT::Other, Op.getOperand(0), in LowerATOMIC_FENCE()
4277 return DAG.getNode(ISD::INTRINSIC_VOID, dl, MVT::Other, Op.getOperand(0), in LowerATOMIC_FENCE()
4304 return DAG.getNode(ARMISD::PRELOAD, dl, MVT::Other, Op.getOperand(0), in LowerPREFETCH()
4357 return DAG.getNode(ARMISD::VMOVDRR, dl, MVT::f64, ArgValue, ArgValue2); in GetF64FormalArgument()
4413 FIN = DAG.getNode(ISD::ADD, dl, PtrVT, FIN, DAG.getConstant(4, dl, PtrVT)); in StoreByValRegs()
4417 Chain = DAG.getNode(ISD::TokenFactor, dl, MVT::Other, MemOps); in StoreByValRegs()
4448 Val = DAG.getNode(ISD::BITCAST, DL, MVT::getIntegerVT(ValueBits), Val); in splitValueIntoRegisterParts()
4449 Val = DAG.getNode(ISD::ANY_EXTEND, DL, MVT::getIntegerVT(PartBits), Val); in splitValueIntoRegisterParts()
4450 Val = DAG.getNode(ISD::BITCAST, DL, PartVT, Val); in splitValueIntoRegisterParts()
4465 Val = DAG.getNode(ISD::BITCAST, DL, MVT::getIntegerVT(PartBits), Val); in joinRegisterPartsIntoValue()
4466 Val = DAG.getNode(ISD::TRUNCATE, DL, MVT::getIntegerVT(ValueBits), Val); in joinRegisterPartsIntoValue()
4467 Val = DAG.getNode(ISD::BITCAST, DL, ValueVT, Val); in joinRegisterPartsIntoValue()
4561 ArgValue = DAG.getNode(ISD::UNDEF, dl, MVT::v2f64); in LowerFormalArguments()
4562 ArgValue = DAG.getNode(ISD::INSERT_VECTOR_ELT, dl, MVT::v2f64, ArgValue, in LowerFormalArguments()
4564 ArgValue = DAG.getNode(ISD::INSERT_VECTOR_ELT, dl, MVT::v2f64, ArgValue, in LowerFormalArguments()
4605 ArgValue = DAG.getNode(ISD::BITCAST, dl, VA.getValVT(), ArgValue); in LowerFormalArguments()
4608 ArgValue = DAG.getNode(ISD::AssertSext, dl, RegVT, ArgValue, in LowerFormalArguments()
4610 ArgValue = DAG.getNode(ISD::TRUNCATE, dl, VA.getValVT(), ArgValue); in LowerFormalArguments()
4613 ArgValue = DAG.getNode(ISD::AssertZext, dl, RegVT, ArgValue, in LowerFormalArguments()
4615 ArgValue = DAG.getNode(ISD::TRUNCATE, dl, VA.getValVT(), ArgValue); in LowerFormalArguments()
4708 else if (ISD::isEXTLoad(Op.getNode()) || ISD::isNON_EXTLoad(Op.getNode())) { in isFloatingPointZero()
4733 if (ConstantSDNode *RHSC = dyn_cast<ConstantSDNode>(RHS.getNode())) { in getARMCmp()
4803 auto *RHSC = cast<ConstantSDNode>(RHS.getNode()); in getARMCmp()
4809 LHS = DAG.getNode(ISD::SHL, dl, MVT::i32, LHS.getOperand(0), ShiftAmt); in getARMCmp()
4826 SDValue Shift = DAG.getNode(ARMISD::LSLS, dl, in getARMCmp()
4865 return DAG.getNode(CompareType, dl, MVT::Glue, LHS, RHS); in getARMCmp()
4875 Cmp = DAG.getNode(Signaling ? ARMISD::CMPFPE : ARMISD::CMPFP, in getVFPCmp()
4878 Cmp = DAG.getNode(Signaling ? ARMISD::CMPFPEw0 : ARMISD::CMPFPw0, in getVFPCmp()
4880 return DAG.getNode(ARMISD::FMSTAT, dl, MVT::Glue, Cmp); in getVFPCmp()
4890 return DAG.getNode(Opc, DL, MVT::Glue, Cmp.getOperand(0),Cmp.getOperand(1)); in duplicateCmp()
4896 Cmp = DAG.getNode(Opc, DL, MVT::Glue, Cmp.getOperand(0),Cmp.getOperand(1)); in duplicateCmp()
4899 Cmp = DAG.getNode(Opc, DL, MVT::Glue, Cmp.getOperand(0)); in duplicateCmp()
4901 return DAG.getNode(ARMISD::FMSTAT, DL, MVT::Glue, Cmp); in duplicateCmp()
4928 Value = DAG.getNode(ISD::ADD, dl, Op.getValueType(), LHS, RHS); in getARMXALUOOp()
4929 OverflowCmp = DAG.getNode(ARMISD::CMP, dl, MVT::Glue, Value, LHS); in getARMXALUOOp()
4935 Value = DAG.getNode(ARMISD::ADDC, dl, in getARMXALUOOp()
4938 OverflowCmp = DAG.getNode(ARMISD::CMP, dl, MVT::Glue, Value, LHS); in getARMXALUOOp()
4942 Value = DAG.getNode(ISD::SUB, dl, Op.getValueType(), LHS, RHS); in getARMXALUOOp()
4943 OverflowCmp = DAG.getNode(ARMISD::CMP, dl, MVT::Glue, LHS, RHS); in getARMXALUOOp()
4947 Value = DAG.getNode(ISD::SUB, dl, Op.getValueType(), LHS, RHS); in getARMXALUOOp()
4948 OverflowCmp = DAG.getNode(ARMISD::CMP, dl, MVT::Glue, LHS, RHS); in getARMXALUOOp()
4953 Value = DAG.getNode(ISD::UMUL_LOHI, dl, in getARMXALUOOp()
4956 OverflowCmp = DAG.getNode(ARMISD::CMP, dl, MVT::Glue, Value.getValue(1), in getARMXALUOOp()
4964 Value = DAG.getNode(ISD::SMUL_LOHI, dl, in getARMXALUOOp()
4967 OverflowCmp = DAG.getNode(ARMISD::CMP, dl, MVT::Glue, Value.getValue(1), in getARMXALUOOp()
4968 DAG.getNode(ISD::SRA, dl, Op.getValueType(), in getARMXALUOOp()
4994 SDValue Overflow = DAG.getNode(ARMISD::CMOV, dl, VT, TVal, FVal, in LowerSignedALUO()
4998 return DAG.getNode(ISD::MERGE_VALUES, dl, VTs, Value, Overflow); in LowerSignedALUO()
5008 SDValue Carry = DAG.getNode(ARMISD::SUBC, DL, in ConvertBooleanCarryToCarryFlag()
5020 return DAG.getNode(ARMISD::ADDE, DL, DAG.getVTList(VT, MVT::i32), in ConvertCarryFlagToBooleanCarry()
5043 Value = DAG.getNode(ARMISD::ADDC, dl, VTs, LHS, RHS); in LowerUnsignedALUO()
5048 Value = DAG.getNode(ARMISD::SUBC, dl, VTs, LHS, RHS); in LowerUnsignedALUO()
5053 Overflow = DAG.getNode(ISD::SUB, dl, MVT::i32, in LowerUnsignedALUO()
5059 return DAG.getNode(ISD::MERGE_VALUES, dl, VTs, Value, Overflow); in LowerUnsignedALUO()
5110 DAG.getNode(NewOpcode, dl, MVT::i32, in LowerADDSUBSAT()
5113 return DAG.getNode(ISD::TRUNCATE, dl, VT, Add); in LowerADDSUBSAT()
5164 if (True.getNode() && False.getNode()) { in LowerSELECT()
5177 Cond = DAG.getNode(ISD::AND, dl, Cond.getValueType(), Cond, in LowerSELECT()
5239 FalseVal = DAG.getNode(ARMISD::VMOVRRD, dl, in getCMOV()
5241 TrueVal = DAG.getNode(ARMISD::VMOVRRD, dl, in getCMOV()
5249 SDValue Low = DAG.getNode(ARMISD::CMOV, dl, MVT::i32, FalseLow, TrueLow, in getCMOV()
5251 SDValue High = DAG.getNode(ARMISD::CMOV, dl, MVT::i32, FalseHigh, TrueHigh, in getCMOV()
5254 return DAG.getNode(ARMISD::VMOVDRR, dl, MVT::f64, Low, High); in getCMOV()
5256 return DAG.getNode(ARMISD::CMOV, dl, VT, FalseVal, TrueVal, ARMcc, CCR, in getCMOV()
5350 return DAG.getNode(ARMISD::SSAT, dl, VT, V2Tmp, in LowerSaturatingConditional()
5353 return DAG.getNode(ARMISD::USAT, dl, VT, V2Tmp, in LowerSaturatingConditional()
5430 SDValue ShiftV = DAG.getNode(ISD::SRA, dl, VT, SatValue, in LowerSELECT_CC()
5433 SDValue NotShiftV = DAG.getNode(ISD::XOR, dl, VT, ShiftV, in LowerSELECT_CC()
5435 return DAG.getNode(ISD::AND, dl, VT, SatValue, NotShiftV); in LowerSELECT_CC()
5437 return DAG.getNode(ISD::OR, dl, VT, SatValue, ShiftV); in LowerSELECT_CC()
5492 return DAG.getNode(Opcode, dl, VT, TrueVal, FalseVal, ARMcc, Cmp); in LowerSELECT_CC()
5502 if (!RHS.getNode()) { in LowerSELECT_CC()
5581 SDNode *N = Op.getNode(); in canChangeToInt()
5629 SDValue NewPtr = DAG.getNode(ISD::ADD, dl, in expandf64Toi32()
5668 LHS = DAG.getNode(ISD::AND, dl, MVT::i32, in OptimizeVFPBrcond()
5670 RHS = DAG.getNode(ISD::AND, dl, MVT::i32, in OptimizeVFPBrcond()
5674 return DAG.getNode(ARMISD::BRCOND, dl, MVT::Other, in OptimizeVFPBrcond()
5682 LHS2 = DAG.getNode(ISD::AND, dl, MVT::i32, LHS2, Mask); in OptimizeVFPBrcond()
5683 RHS2 = DAG.getNode(ISD::AND, dl, MVT::i32, RHS2, Mask); in OptimizeVFPBrcond()
5688 return DAG.getNode(ARMISD::BCC_i64, dl, VTList, Ops); in OptimizeVFPBrcond()
5724 return DAG.getNode(ARMISD::BRCOND, dl, MVT::Other, Chain, Dest, ARMcc, CCR, in LowerBRCOND()
5745 if (!RHS.getNode()) { in LowerBR_CC()
5778 return DAG.getNode(ARMISD::BRCOND, dl, MVT::Other, Chain, Dest, ARMcc, CCR, in LowerBR_CC()
5786 return DAG.getNode(ARMISD::BRCOND, dl, MVT::Other, in LowerBR_CC()
5805 SDValue Res = DAG.getNode(ARMISD::BRCOND, dl, VTList, Ops); in LowerBR_CC()
5809 Res = DAG.getNode(ARMISD::BRCOND, dl, VTList, Ops); in LowerBR_CC()
5823 Table = DAG.getNode(ARMISD::WrapperJT, dl, MVT::i32, JTI); in LowerBR_JT()
5824 Index = DAG.getNode(ISD::MUL, dl, PTy, Index, DAG.getConstant(4, dl, PTy)); in LowerBR_JT()
5825 SDValue Addr = DAG.getNode(ISD::ADD, dl, PTy, Table, Index); in LowerBR_JT()
5831 return DAG.getNode(ARMISD::BR2_JT, dl, MVT::Other, Chain, in LowerBR_JT()
5839 Addr = DAG.getNode(ISD::ADD, dl, PTy, Table, Addr); in LowerBR_JT()
5840 return DAG.getNode(ARMISD::BR_JT, dl, MVT::Other, Chain, Addr, JTI); in LowerBR_JT()
5846 return DAG.getNode(ARMISD::BR_JT, dl, MVT::Other, Chain, Addr, JTI); in LowerBR_JT()
5857 return DAG.UnrollVectorOp(Op.getNode()); in LowerVectorFP_TO_INT()
5874 return DAG.UnrollVectorOp(Op.getNode()); in LowerVectorFP_TO_INT()
5876 Op = DAG.getNode(Op.getOpcode(), dl, NewTy, Op.getOperand(0)); in LowerVectorFP_TO_INT()
5877 return DAG.getNode(ISD::TRUNCATE, dl, VT, Op); in LowerVectorFP_TO_INT()
5910 DAG.getNode(Op.getOpcode() == ISD::STRICT_FP_TO_SINT ? ISD::FP_TO_SINT in LowerFP_TO_INT()
5946 SDValue CVT = DAG.getNode(Op.getOpcode(), DL, VT, Op.getOperand(0), in LowerFP_TO_INT_SAT()
5948 SDValue Max = DAG.getNode(IsSigned ? ISD::SMIN : ISD::UMIN, DL, VT, CVT, in LowerFP_TO_INT_SAT()
5951 Max = DAG.getNode(ISD::SMAX, DL, VT, Max, in LowerFP_TO_INT_SAT()
5963 return DAG.UnrollVectorOp(Op.getNode()); in LowerVectorINT_TO_FP()
5980 return DAG.UnrollVectorOp(Op.getNode()); in LowerVectorINT_TO_FP()
5996 Op = DAG.getNode(CastOpc, dl, DestVecType, Op.getOperand(0)); in LowerVectorINT_TO_FP()
5997 return DAG.getNode(Opc, dl, VT, Op); in LowerVectorINT_TO_FP()
6034 SDValue Mask = DAG.getNode(ARMISD::VMOVIMM, dl, MVT::v2i32, in LowerFCOPYSIGN()
6038 Mask = DAG.getNode(ARMISD::VSHLIMM, dl, OpVT, in LowerFCOPYSIGN()
6039 DAG.getNode(ISD::BITCAST, dl, OpVT, Mask), in LowerFCOPYSIGN()
6042 Tmp0 = DAG.getNode(ISD::SCALAR_TO_VECTOR, dl, MVT::v2f32, Tmp0); in LowerFCOPYSIGN()
6044 Tmp1 = DAG.getNode(ISD::SCALAR_TO_VECTOR, dl, MVT::v2f32, Tmp1); in LowerFCOPYSIGN()
6046 Tmp1 = DAG.getNode(ARMISD::VSHLIMM, dl, OpVT, in LowerFCOPYSIGN()
6047 DAG.getNode(ISD::BITCAST, dl, OpVT, Tmp1), in LowerFCOPYSIGN()
6050 Tmp1 = DAG.getNode(ARMISD::VSHRuIMM, dl, MVT::v1i64, in LowerFCOPYSIGN()
6051 DAG.getNode(ISD::BITCAST, dl, MVT::v1i64, Tmp1), in LowerFCOPYSIGN()
6053 Tmp0 = DAG.getNode(ISD::BITCAST, dl, OpVT, Tmp0); in LowerFCOPYSIGN()
6054 Tmp1 = DAG.getNode(ISD::BITCAST, dl, OpVT, Tmp1); in LowerFCOPYSIGN()
6058 AllOnes = DAG.getNode(ARMISD::VMOVIMM, dl, MVT::v8i8, AllOnes); in LowerFCOPYSIGN()
6059 SDValue MaskNot = DAG.getNode(ISD::XOR, dl, OpVT, Mask, in LowerFCOPYSIGN()
6060 DAG.getNode(ISD::BITCAST, dl, OpVT, AllOnes)); in LowerFCOPYSIGN()
6062 SDValue Res = DAG.getNode(ISD::OR, dl, OpVT, in LowerFCOPYSIGN()
6063 DAG.getNode(ISD::AND, dl, OpVT, Tmp1, Mask), in LowerFCOPYSIGN()
6064 DAG.getNode(ISD::AND, dl, OpVT, Tmp0, MaskNot)); in LowerFCOPYSIGN()
6066 Res = DAG.getNode(ISD::BITCAST, dl, MVT::v2f32, Res); in LowerFCOPYSIGN()
6067 Res = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, MVT::f32, Res, in LowerFCOPYSIGN()
6070 Res = DAG.getNode(ISD::BITCAST, dl, MVT::f64, Res); in LowerFCOPYSIGN()
6078 Tmp1 = DAG.getNode(ARMISD::VMOVRRD, dl, DAG.getVTList(MVT::i32, MVT::i32), in LowerFCOPYSIGN()
6080 Tmp1 = DAG.getNode(ISD::BITCAST, dl, MVT::i32, Tmp1); in LowerFCOPYSIGN()
6085 Tmp1 = DAG.getNode(ISD::AND, dl, MVT::i32, Tmp1, Mask1); in LowerFCOPYSIGN()
6087 Tmp0 = DAG.getNode(ISD::AND, dl, MVT::i32, in LowerFCOPYSIGN()
6088 DAG.getNode(ISD::BITCAST, dl, MVT::i32, Tmp0), Mask2); in LowerFCOPYSIGN()
6089 return DAG.getNode(ISD::BITCAST, dl, MVT::f32, in LowerFCOPYSIGN()
6090 DAG.getNode(ISD::OR, dl, MVT::i32, Tmp0, Tmp1)); in LowerFCOPYSIGN()
6094 Tmp0 = DAG.getNode(ARMISD::VMOVRRD, dl, DAG.getVTList(MVT::i32, MVT::i32), in LowerFCOPYSIGN()
6097 SDValue Hi = DAG.getNode(ISD::AND, dl, MVT::i32, Tmp0.getValue(1), Mask2); in LowerFCOPYSIGN()
6098 Hi = DAG.getNode(ISD::OR, dl, MVT::i32, Hi, Tmp1); in LowerFCOPYSIGN()
6099 return DAG.getNode(ARMISD::VMOVDRR, dl, MVT::f64, Lo, Hi); in LowerFCOPYSIGN()
6117 DAG.getNode(ISD::ADD, dl, VT, FrameAddr, Offset), in LowerRETURNADDR()
6167 SDValue Read = DAG.getNode(ISD::READ_REGISTER, DL, in ExpandREAD_REGISTER()
6172 Results.push_back(DAG.getNode(ISD::BUILD_PAIR, DL, MVT::i64, Read.getValue(0), in ExpandREAD_REGISTER()
6222 SDValue BitCast = DAG.getNode(ISD::BITCAST, dl, VecVT, ExtractSrc); in CombineVMOVDRRCandidateWithVecOp()
6223 return DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, DstVT, BitCast, in CombineVMOVDRRCandidateWithVecOp()
6246 DAG.getNode(ISD::ZERO_EXTEND, SDLoc(N), MVT::i32, Op)); in ExpandBITCAST()
6250 return DAG.getNode( in ExpandBITCAST()
6265 return DAG.getNode(ISD::BITCAST, dl, DstVT, in ExpandBITCAST()
6266 DAG.getNode(ARMISD::VMOVDRR, dl, MVT::f64, Lo, Hi)); in ExpandBITCAST()
6274 Cvt = DAG.getNode(ARMISD::VMOVRRD, dl, in ExpandBITCAST()
6276 DAG.getNode(ARMISD::VREV64, dl, SrcVT, Op)); in ExpandBITCAST()
6278 Cvt = DAG.getNode(ARMISD::VMOVRRD, dl, in ExpandBITCAST()
6281 return DAG.getNode(ISD::BUILD_PAIR, dl, MVT::i64, Cvt, Cvt.getValue(1)); in ExpandBITCAST()
6298 SDValue Vmov = DAG.getNode(ARMISD::VMOVIMM, dl, VmovVT, EncodedVal); in getZeroVector()
6299 return DAG.getNode(ISD::BITCAST, dl, VT, Vmov); in getZeroVector()
6319 SDValue RevShAmt = DAG.getNode(ISD::SUB, dl, MVT::i32, in LowerShiftRightParts()
6321 SDValue Tmp1 = DAG.getNode(ISD::SRL, dl, VT, ShOpLo, ShAmt); in LowerShiftRightParts()
6322 SDValue ExtraShAmt = DAG.getNode(ISD::SUB, dl, MVT::i32, ShAmt, in LowerShiftRightParts()
6324 SDValue Tmp2 = DAG.getNode(ISD::SHL, dl, VT, ShOpHi, RevShAmt); in LowerShiftRightParts()
6325 SDValue LoSmallShift = DAG.getNode(ISD::OR, dl, VT, Tmp1, Tmp2); in LowerShiftRightParts()
6326 SDValue LoBigShift = DAG.getNode(Opc, dl, VT, ShOpHi, ExtraShAmt); in LowerShiftRightParts()
6329 SDValue Lo = DAG.getNode(ARMISD::CMOV, dl, VT, LoSmallShift, LoBigShift, in LowerShiftRightParts()
6332 SDValue HiSmallShift = DAG.getNode(Opc, dl, VT, ShOpHi, ShAmt); in LowerShiftRightParts()
6334 ? DAG.getNode(Opc, dl, VT, ShOpHi, in LowerShiftRightParts()
6339 SDValue Hi = DAG.getNode(ARMISD::CMOV, dl, VT, HiSmallShift, HiBigShift, in LowerShiftRightParts()
6361 SDValue RevShAmt = DAG.getNode(ISD::SUB, dl, MVT::i32, in LowerShiftLeftParts()
6363 SDValue Tmp1 = DAG.getNode(ISD::SRL, dl, VT, ShOpLo, RevShAmt); in LowerShiftLeftParts()
6364 SDValue Tmp2 = DAG.getNode(ISD::SHL, dl, VT, ShOpHi, ShAmt); in LowerShiftLeftParts()
6365 SDValue HiSmallShift = DAG.getNode(ISD::OR, dl, VT, Tmp1, Tmp2); in LowerShiftLeftParts()
6367 SDValue ExtraShAmt = DAG.getNode(ISD::SUB, dl, MVT::i32, ShAmt, in LowerShiftLeftParts()
6369 SDValue HiBigShift = DAG.getNode(ISD::SHL, dl, VT, ShOpLo, ExtraShAmt); in LowerShiftLeftParts()
6372 SDValue Hi = DAG.getNode(ARMISD::CMOV, dl, VT, HiSmallShift, HiBigShift, in LowerShiftLeftParts()
6377 SDValue LoSmallShift = DAG.getNode(ISD::SHL, dl, VT, ShOpLo, ShAmt); in LowerShiftLeftParts()
6378 SDValue Lo = DAG.getNode(ARMISD::CMOV, dl, VT, LoSmallShift, in LowerShiftLeftParts()
6397 DAG.getNode(ISD::INTRINSIC_W_CHAIN, dl, {MVT::i32, MVT::Other}, Ops); in LowerGET_ROUNDING()
6399 SDValue FltRounds = DAG.getNode(ISD::ADD, dl, MVT::i32, FPSCR, in LowerGET_ROUNDING()
6401 SDValue RMODE = DAG.getNode(ISD::SRL, dl, MVT::i32, FltRounds, in LowerGET_ROUNDING()
6403 SDValue And = DAG.getNode(ISD::AND, dl, MVT::i32, RMODE, in LowerGET_ROUNDING()
6425 RMValue = DAG.getNode(ISD::SUB, DL, MVT::i32, RMValue, in LowerSET_ROUNDING()
6427 RMValue = DAG.getNode(ISD::AND, DL, MVT::i32, RMValue, in LowerSET_ROUNDING()
6429 RMValue = DAG.getNode(ISD::SHL, DL, MVT::i32, RMValue, in LowerSET_ROUNDING()
6436 DAG.getNode(ISD::INTRINSIC_W_CHAIN, DL, {MVT::i32, MVT::Other}, Ops); in LowerSET_ROUNDING()
6442 FPSCR = DAG.getNode(ISD::AND, DL, MVT::i32, FPSCR, in LowerSET_ROUNDING()
6444 FPSCR = DAG.getNode(ISD::OR, DL, MVT::i32, FPSCR, RMValue); in LowerSET_ROUNDING()
6447 return DAG.getNode(ISD::INTRINSIC_VOID, DL, MVT::Other, Ops2); in LowerSET_ROUNDING()
6461 DAG.getNode(ISD::INTRINSIC_W_CHAIN, DL, {MVT::i32, MVT::Other}, Ops); in LowerSET_FPMODE()
6466 DAG.getNode(ISD::AND, DL, MVT::i32, FPSCR, in LowerSET_FPMODE()
6469 DAG.getNode(ISD::AND, DL, MVT::i32, Mode, in LowerSET_FPMODE()
6471 FPSCR = DAG.getNode(ISD::OR, DL, MVT::i32, FPSCRMasked, InputMasked); in LowerSET_FPMODE()
6475 return DAG.getNode(ISD::INTRINSIC_VOID, DL, MVT::Other, Ops2); in LowerSET_FPMODE()
6488 DAG.getNode(ISD::INTRINSIC_W_CHAIN, DL, {MVT::i32, MVT::Other}, Ops); in LowerRESET_FPMODE()
6492 SDValue FPSCRMasked = DAG.getNode( in LowerRESET_FPMODE()
6498 return DAG.getNode(ISD::INTRINSIC_VOID, DL, MVT::Other, Ops2); in LowerRESET_FPMODE()
6509 SDValue NX = DAG.getNode(ISD::SUB, dl, VT, getZeroVector(VT, DAG, dl), X); in LowerCTTZ()
6510 SDValue LSB = DAG.getNode(ISD::AND, dl, VT, X, NX); in LowerCTTZ()
6516 SDValue One = DAG.getNode(ARMISD::VMOVIMM, dl, VT, in LowerCTTZ()
6518 SDValue Bits = DAG.getNode(ISD::SUB, dl, VT, LSB, One); in LowerCTTZ()
6519 return DAG.getNode(ISD::CTPOP, dl, VT, Bits); in LowerCTTZ()
6527 DAG.getNode(ARMISD::VMOVIMM, dl, VT, in LowerCTTZ()
6529 SDValue CTLZ = DAG.getNode(ISD::CTLZ, dl, VT, LSB); in LowerCTTZ()
6530 return DAG.getNode(ISD::SUB, dl, VT, WidthMinus1, CTLZ); in LowerCTTZ()
6539 SDValue FF = DAG.getNode(ARMISD::VMOVIMM, dl, VT, in LowerCTTZ()
6541 Bits = DAG.getNode(ISD::ADD, dl, VT, LSB, FF); in LowerCTTZ()
6543 SDValue One = DAG.getNode(ARMISD::VMOVIMM, dl, VT, in LowerCTTZ()
6545 Bits = DAG.getNode(ISD::SUB, dl, VT, LSB, One); in LowerCTTZ()
6547 return DAG.getNode(ISD::CTPOP, dl, VT, Bits); in LowerCTTZ()
6553 SDValue rbit = DAG.getNode(ISD::BITREVERSE, dl, VT, N->getOperand(0)); in LowerCTTZ()
6554 return DAG.getNode(ISD::CTLZ, dl, VT, rbit); in LowerCTTZ()
6570 Res = DAG.getNode(ISD::CTPOP, DL, VT8Bit, Res); in LowerCTPOP()
6584 Res = DAG.getNode(ISD::INTRINSIC_WO_CHAIN, DL, WidenVT, Ops); in LowerCTPOP()
6597 BuildVectorSDNode *BVN = dyn_cast<BuildVectorSDNode>(Op.getNode()); in getVShiftImm()
6660 return DAG.getNode(ARMISD::VSHLIMM, dl, VT, N->getOperand(0), in LowerShift()
6662 return DAG.getNode(ARMISD::VSHLu, dl, VT, N->getOperand(0), in LowerShift()
6672 return DAG.getNode(VShiftOpc, dl, VT, N->getOperand(0), in LowerShift()
6679 SDValue NegatedCount = DAG.getNode( in LowerShift()
6683 return DAG.getNode(VShiftOpc, dl, VT, N->getOperand(0), NegatedCount); in LowerShift()
6719 ShAmt = DAG.getNode(ISD::SUB, dl, MVT::i32, in Expand64BitShift()
6732 Lo = DAG.getNode(ShPartsOpc, dl, DAG.getVTList(MVT::i32, MVT::i32), Lo, Hi, in Expand64BitShift()
6735 Hi = SDValue(Lo.getNode(), 1); in Expand64BitShift()
6736 return DAG.getNode(ISD::BUILD_PAIR, dl, MVT::i64, Lo, Hi); in Expand64BitShift()
6754 Hi = DAG.getNode(Opc, dl, DAG.getVTList(MVT::i32, MVT::Glue), Hi); in Expand64BitShift()
6757 Lo = DAG.getNode(ARMISD::RRX, dl, MVT::i32, Lo, Hi.getValue(1)); in Expand64BitShift()
6760 return DAG.getNode(ISD::BUILD_PAIR, dl, MVT::i64, Lo, Hi); in Expand64BitShift()
6800 SDValue CastOp0 = DAG.getNode(ISD::BITCAST, dl, SplitVT, Op0); in LowerVSETCC()
6801 SDValue CastOp1 = DAG.getNode(ISD::BITCAST, dl, SplitVT, Op1); in LowerVSETCC()
6802 SDValue Cmp = DAG.getNode(ISD::SETCC, dl, SplitVT, CastOp0, CastOp1, in LowerVSETCC()
6804 SDValue Reversed = DAG.getNode(ARMISD::VREV64, dl, SplitVT, Cmp); in LowerVSETCC()
6805 SDValue Merged = DAG.getNode(ISD::AND, dl, SplitVT, Cmp, Reversed); in LowerVSETCC()
6806 Merged = DAG.getNode(ISD::BITCAST, dl, CmpVT, Merged); in LowerVSETCC()
6844 SDValue TmpOp0 = DAG.getNode(ARMISD::VCMP, dl, CmpVT, Op1, Op0, in LowerVSETCC()
6846 SDValue TmpOp1 = DAG.getNode(ARMISD::VCMP, dl, CmpVT, Op0, Op1, in LowerVSETCC()
6848 SDValue Result = DAG.getNode(ISD::OR, dl, CmpVT, TmpOp0, TmpOp1); in LowerVSETCC()
6856 SDValue TmpOp0 = DAG.getNode(ARMISD::VCMP, dl, CmpVT, Op1, Op0, in LowerVSETCC()
6858 SDValue TmpOp1 = DAG.getNode(ARMISD::VCMP, dl, CmpVT, Op0, Op1, in LowerVSETCC()
6860 SDValue Result = DAG.getNode(ISD::OR, dl, CmpVT, TmpOp0, TmpOp1); in LowerVSETCC()
6890 if (ISD::isBuildVectorAllZeros(Op1.getNode())) in LowerVSETCC()
6892 else if (ISD::isBuildVectorAllZeros(Op0.getNode())) in LowerVSETCC()
6896 if (AndOp.getNode() && AndOp.getOpcode() == ISD::BITCAST) in LowerVSETCC()
6899 if (AndOp.getNode() && AndOp.getOpcode() == ISD::AND) { in LowerVSETCC()
6900 Op0 = DAG.getNode(ISD::BITCAST, dl, CmpVT, AndOp.getOperand(0)); in LowerVSETCC()
6901 Op1 = DAG.getNode(ISD::BITCAST, dl, CmpVT, AndOp.getOperand(1)); in LowerVSETCC()
6902 SDValue Result = DAG.getNode(ARMISD::VTST, dl, CmpVT, Op0, Op1); in LowerVSETCC()
6915 if (ISD::isBuildVectorAllZeros(Op0.getNode()) && in LowerVSETCC()
6926 if (ISD::isBuildVectorAllZeros(Op1.getNode()) && in LowerVSETCC()
6929 Result = DAG.getNode(ARMISD::VCMPZ, dl, CmpVT, Op0, in LowerVSETCC()
6932 Result = DAG.getNode(ARMISD::VCMP, dl, CmpVT, Op0, Op1, in LowerVSETCC()
6954 Carry = DAG.getNode(ISD::SUB, DL, MVT::i32, in LowerSETCCCARRY()
6960 SDValue Cmp = DAG.getNode(ARMISD::SUBE, DL, VTs, LHS, RHS, Carry); in LowerSETCCCARRY()
6969 return DAG.getNode(ARMISD::CMOV, DL, Op.getValueType(), FVal, TVal, ARMcc, in LowerSETCCCARRY()
7151 return DAG.getNode(ARMISD::VMOVDRR, DL, MVT::f64, Lo, Hi); in LowerConstantFP()
7154 return DAG.getNode(ARMISD::VMOVSR, DL, VT, in LowerConstantFP()
7181 SDValue VecConstant = DAG.getNode(ARMISD::VMOVFPIMM, DL, MVT::v2f32, in LowerConstantFP()
7183 return DAG.getNode(ISD::EXTRACT_VECTOR_ELT, DL, MVT::f32, VecConstant, in LowerConstantFP()
7206 SDValue VecConstant = DAG.getNode(ARMISD::VMOVIMM, DL, VMovVT, in LowerConstantFP()
7209 return DAG.getNode(ISD::BITCAST, DL, MVT::f64, VecConstant); in LowerConstantFP()
7212 SDValue VecFConstant = DAG.getNode(ISD::BITCAST, DL, MVT::v2f32, in LowerConstantFP()
7214 return DAG.getNode(ISD::EXTRACT_VECTOR_ELT, DL, MVT::f32, VecFConstant, in LowerConstantFP()
7223 SDValue VecConstant = DAG.getNode(ARMISD::VMVNIMM, DL, VMovVT, NewVal); in LowerConstantFP()
7226 return DAG.getNode(ISD::BITCAST, DL, MVT::f64, VecConstant); in LowerConstantFP()
7229 SDValue VecFConstant = DAG.getNode(ISD::BITCAST, DL, MVT::v2f32, in LowerConstantFP()
7231 return DAG.getNode(ISD::EXTRACT_VECTOR_ELT, DL, MVT::f32, VecFConstant, in LowerConstantFP()
7692 SDValue N1 = DAG.getNode(ARMISD::VCVTN, dl, VT, DAG.getUNDEF(VT), Op0, in LowerBuildVectorOfFPTrunc()
7694 return DAG.getNode(ARMISD::VCVTN, dl, VT, N1, Op1, in LowerBuildVectorOfFPTrunc()
7738 return DAG.getNode(ARMISD::VCVTL, dl, VT, Op0, in LowerBuildVectorOfFPExt()
7794 SDValue Ext = DAG.getNode(ISD::SIGN_EXTEND_INREG, dl, MVT::i32, FirstOp, in LowerBUILD_VECTOR_i1()
7796 return DAG.getNode(ARMISD::PREDICATE_CAST, dl, Op.getValueType(), Ext); in LowerBUILD_VECTOR_i1()
7811 SDValue Base = DAG.getNode(ARMISD::PREDICATE_CAST, dl, VT, in LowerBUILD_VECTOR_i1()
7817 Base = DAG.getNode(ISD::INSERT_VECTOR_ELT, dl, VT, Base, V, in LowerBUILD_VECTOR_i1()
7853 return DAG.getNode(ARMISD::VIDUP, DL, DAG.getVTList(VT, MVT::i32), Op0, in LowerBUILD_VECTORToVIDUP()
7869 return N->getOperand(1).getNode() == Op; in IsQRMVEInstruction()
7888 return N->getOperand(2).getNode() == Op; in IsQRMVEInstruction()
7901 BuildVectorSDNode *BVN = cast<BuildVectorSDNode>(Op.getNode()); in LowerBUILD_VECTOR()
7928 SDValue VDup = DAG.getNode(ARMISD::VDUP, dl, DupVT, Const); in LowerBUILD_VECTOR()
7929 return DAG.getNode(ARMISD::VECTOR_REG_CAST, dl, VT, VDup); in LowerBUILD_VECTOR()
7940 if (Val.getNode()) { in LowerBUILD_VECTOR()
7941 SDValue Vmov = DAG.getNode(ARMISD::VMOVIMM, dl, VmovVT, Val); in LowerBUILD_VECTOR()
7942 return DAG.getNode(ISD::BITCAST, dl, VT, Vmov); in LowerBUILD_VECTOR()
7950 if (Val.getNode()) { in LowerBUILD_VECTOR()
7951 SDValue Vmov = DAG.getNode(ARMISD::VMVNIMM, dl, VmovVT, Val); in LowerBUILD_VECTOR()
7952 return DAG.getNode(ISD::BITCAST, dl, VT, Vmov); in LowerBUILD_VECTOR()
7960 return DAG.getNode(ARMISD::VMOVFPIMM, dl, VT, Val); in LowerBUILD_VECTOR()
7972 SDValue VDup = DAG.getNode(ARMISD::VDUP, dl, DupVT, Const); in LowerBUILD_VECTOR()
7973 return DAG.getNode(ARMISD::VECTOR_REG_CAST, dl, VT, VDup); in LowerBUILD_VECTOR()
8015 if (!Value.getNode() && !ValueCounts.empty()) in LowerBUILD_VECTOR()
8023 if (isOnlyLowElement && !ISD::isNormalLoad(Value.getNode())) in LowerBUILD_VECTOR()
8024 return DAG.getNode(ISD::SCALAR_TO_VECTOR, dl, VT, Value); in LowerBUILD_VECTOR()
8049 N = DAG.getNode(ARMISD::VDUPLANE, dl, VT, in LowerBUILD_VECTOR()
8050 DAG.getNode(ISD::INSERT_VECTOR_ELT, dl, VT, DAG.getUNDEF(VT), in LowerBUILD_VECTOR()
8054 N = DAG.getNode(ARMISD::VDUPLANE, dl, VT, in LowerBUILD_VECTOR()
8057 N = DAG.getNode(ARMISD::VDUP, dl, VT, Value); in LowerBUILD_VECTOR()
8069 N = DAG.getNode(ISD::INSERT_VECTOR_ELT, dl, VT, Ops); in LowerBUILD_VECTOR()
8080 Ops.push_back(DAG.getNode(ISD::BITCAST, dl, IVT, in LowerBUILD_VECTOR()
8085 if (Val.getNode()) in LowerBUILD_VECTOR()
8086 return DAG.getNode(ISD::BITCAST, dl, VT, Val); in LowerBUILD_VECTOR()
8090 if (isConstant && Val.getNode()) in LowerBUILD_VECTOR()
8091 return DAG.getNode(ARMISD::VDUP, dl, VT, Val); in LowerBUILD_VECTOR()
8129 return DAG.getNode(ISD::CONCAT_VECTORS, dl, VT, Lower, Upper); in LowerBUILD_VECTOR()
8142 Ops.push_back(DAG.getNode(ISD::BITCAST, dl, EltVT, Op.getOperand(i))); in LowerBUILD_VECTOR()
8143 SDValue Val = DAG.getNode(ARMISD::BUILD_VECTOR, dl, VecVT, Ops); in LowerBUILD_VECTOR()
8144 return DAG.getNode(ISD::BITCAST, dl, VT, Val); in LowerBUILD_VECTOR()
8160 Vec = DAG.getNode(ISD::INSERT_VECTOR_ELT, dl, VT, Vec, V, LaneIdx); in LowerBUILD_VECTOR()
8267 DAG.getNode(ISD::CONCAT_VECTORS, dl, DestVT, Src.ShuffleVec, in ReconstructShuffle()
8283 DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, DestVT, Src.ShuffleVec, in ReconstructShuffle()
8289 DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, DestVT, Src.ShuffleVec, in ReconstructShuffle()
8294 DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, DestVT, Src.ShuffleVec, in ReconstructShuffle()
8297 DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, DestVT, Src.ShuffleVec, in ReconstructShuffle()
8300 Src.ShuffleVec = DAG.getNode(ARMISD::VEXT, dl, DestVT, VEXTSrc1, in ReconstructShuffle()
8315 Src.ShuffleVec = DAG.getNode(ARMISD::VECTOR_REG_CAST, dl, ShuffleVT, Src.ShuffleVec); in ReconstructShuffle()
8367 return DAG.getNode(ARMISD::VECTOR_REG_CAST, dl, VT, Shuffle); in ReconstructShuffle()
8484 return DAG.getNode(ARMISD::VREV64, dl, VT, OpLHS); in GeneratePerfectShuffle()
8487 return DAG.getNode(ARMISD::VREV32, dl, VT, OpLHS); in GeneratePerfectShuffle()
8490 return DAG.getNode(ARMISD::VREV16, dl, VT, OpLHS); in GeneratePerfectShuffle()
8495 return DAG.getNode(ARMISD::VDUPLANE, dl, VT, in GeneratePerfectShuffle()
8500 return DAG.getNode(ARMISD::VEXT, dl, VT, in GeneratePerfectShuffle()
8505 return DAG.getNode(ARMISD::VUZP, dl, DAG.getVTList(VT, VT), in GeneratePerfectShuffle()
8509 return DAG.getNode(ARMISD::VZIP, dl, DAG.getVTList(VT, VT), in GeneratePerfectShuffle()
8513 return DAG.getNode(ARMISD::VTRN, dl, DAG.getVTList(VT, VT), in GeneratePerfectShuffle()
8530 if (V2.getNode()->isUndef()) in LowerVECTOR_SHUFFLEv8i8()
8531 return DAG.getNode(ARMISD::VTBL1, DL, MVT::v8i8, V1, in LowerVECTOR_SHUFFLEv8i8()
8534 return DAG.getNode(ARMISD::VTBL2, DL, MVT::v8i8, V1, V2, in LowerVECTOR_SHUFFLEv8i8()
8544 SDValue OpLHS = DAG.getNode(ARMISD::VREV64, DL, VT, Op.getOperand(0)); in LowerReverse_VECTOR_SHUFFLE()
8579 AllOnes = DAG.getNode(ARMISD::VMOVIMM, dl, MVT::v16i8, AllOnes); in PromoteMVEPredVector()
8583 AllZeroes = DAG.getNode(ARMISD::VMOVIMM, dl, MVT::v16i8, AllZeroes); in PromoteMVEPredVector()
8594 RecastV1 = DAG.getNode(ARMISD::PREDICATE_CAST, dl, MVT::v16i1, Pred); in PromoteMVEPredVector()
8600 DAG.getNode(ISD::VSELECT, dl, MVT::v16i8, RecastV1, AllOnes, AllZeroes); in PromoteMVEPredVector()
8604 return DAG.getNode(ISD::BITCAST, dl, NewVT, PredAsVector); in PromoteMVEPredVector()
8610 ShuffleVectorSDNode *SVN = cast<ShuffleVectorSDNode>(Op.getNode()); in LowerVECTOR_SHUFFLE_i1()
8620 SDValue cast = DAG.getNode(ARMISD::PREDICATE_CAST, dl, MVT::i32, V1); in LowerVECTOR_SHUFFLE_i1()
8621 SDValue rbit = DAG.getNode(ISD::BITREVERSE, dl, MVT::i32, cast); in LowerVECTOR_SHUFFLE_i1()
8622 SDValue srl = DAG.getNode(ISD::SRL, dl, MVT::i32, rbit, in LowerVECTOR_SHUFFLE_i1()
8624 return DAG.getNode(ARMISD::PREDICATE_CAST, dl, VT, srl); in LowerVECTOR_SHUFFLE_i1()
8650 SDValue BC = DAG.getNode(ARMISD::VECTOR_REG_CAST, dl, MVT::v4i32, Shuffled); in LowerVECTOR_SHUFFLE_i1()
8651 SDValue Cmp = DAG.getNode(ARMISD::VCMPZ, dl, MVT::v4i1, BC, in LowerVECTOR_SHUFFLE_i1()
8653 return DAG.getNode(ARMISD::PREDICATE_CAST, dl, MVT::v2i1, Cmp); in LowerVECTOR_SHUFFLE_i1()
8655 return DAG.getNode(ARMISD::VCMPZ, dl, VT, Shuffled, in LowerVECTOR_SHUFFLE_i1()
8713 Parts[Part] = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, MVT::f32, BitCast, in LowerVECTOR_SHUFFLEUsingMovs()
8736 Parts[Part] = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, MVT::f32, in LowerVECTOR_SHUFFLEUsingMovs()
8741 SDValue NewVec = DAG.getNode(ARMISD::BUILD_VECTOR, dl, MVT::v4f32, Parts); in LowerVECTOR_SHUFFLEUsingMovs()
8788 SDValue Elt = DAG.getNode( in LowerVECTOR_SHUFFLEUsingOneOff()
8792 return DAG.getNode(ISD::INSERT_VECTOR_ELT, dl, VT, VInput, Elt, in LowerVECTOR_SHUFFLEUsingOneOff()
8802 ShuffleVectorSDNode *SVN = cast<ShuffleVectorSDNode>(Op.getNode()); in LowerVECTOR_SHUFFLE()
8824 return DAG.getNode(ARMISD::VDUP, dl, VT, V1.getOperand(0)); in LowerVECTOR_SHUFFLE()
8838 return DAG.getNode(ARMISD::VDUP, dl, VT, V1.getOperand(0)); in LowerVECTOR_SHUFFLE()
8840 return DAG.getNode(ARMISD::VDUPLANE, dl, VT, V1, in LowerVECTOR_SHUFFLE()
8849 return DAG.getNode(ARMISD::VEXT, dl, VT, V1, V2, in LowerVECTOR_SHUFFLE()
8854 return DAG.getNode(ARMISD::VREV64, dl, VT, V1); in LowerVECTOR_SHUFFLE()
8856 return DAG.getNode(ARMISD::VREV32, dl, VT, V1); in LowerVECTOR_SHUFFLE()
8858 return DAG.getNode(ARMISD::VREV16, dl, VT, V1); in LowerVECTOR_SHUFFLE()
8861 return DAG.getNode(ARMISD::VEXT, dl, VT, V1, V1, in LowerVECTOR_SHUFFLE()
8877 return DAG.getNode(ShuffleOpc, dl, DAG.getVTList(VT, VT), V1, V2) in LowerVECTOR_SHUFFLE()
8883 return DAG.getNode(ARMISD::VMOVN, dl, VT, V2, V1, in LowerVECTOR_SHUFFLE()
8886 return DAG.getNode(ARMISD::VMOVN, dl, VT, V1, V2, in LowerVECTOR_SHUFFLE()
8889 return DAG.getNode(ARMISD::VMOVN, dl, VT, V1, V1, in LowerVECTOR_SHUFFLE()
8924 SDValue Res = DAG.getNode(ShuffleOpc, dl, DAG.getVTList(SubVT, SubVT), in LowerVECTOR_SHUFFLE()
8926 return DAG.getNode(ISD::CONCAT_VECTORS, dl, VT, Res.getValue(0), in LowerVECTOR_SHUFFLE()
8941 SDValue Lo = DAG.getNode(ARMISD::VECTOR_REG_CAST, dl, FromVT, V1); in LowerVECTOR_SHUFFLE()
8942 SDValue Hi = DAG.getNode(ARMISD::VECTOR_REG_CAST, dl, FromVT, in LowerVECTOR_SHUFFLE()
8946 Lo = DAG.getNode(ISD::SRL, dl, FromVT, Lo, Amt); in LowerVECTOR_SHUFFLE()
8947 Hi = DAG.getNode(ISD::SRL, dl, FromVT, Hi, Amt); in LowerVECTOR_SHUFFLE()
8949 return DAG.getNode(ARMISD::MVETRUNC, dl, VT, Lo, Hi); in LowerVECTOR_SHUFFLE()
8993 V1 = DAG.getNode(ISD::BITCAST, dl, VecVT, V1); in LowerVECTOR_SHUFFLE()
8994 V2 = DAG.getNode(ISD::BITCAST, dl, VecVT, V2); in LowerVECTOR_SHUFFLE()
9000 Ops.push_back(DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, EltVT, in LowerVECTOR_SHUFFLE()
9005 SDValue Val = DAG.getNode(ARMISD::BUILD_VECTOR, dl, VecVT, Ops); in LowerVECTOR_SHUFFLE()
9006 return DAG.getNode(ISD::BITCAST, dl, VT, Val); in LowerVECTOR_SHUFFLE()
9033 DAG.getNode(ARMISD::PREDICATE_CAST, dl, MVT::i32, Op->getOperand(0)); in LowerINSERT_VECTOR_ELT_i1()
9038 SDValue Ext = DAG.getNode(ISD::SIGN_EXTEND_INREG, dl, MVT::i32, in LowerINSERT_VECTOR_ELT_i1()
9040 SDValue BFI = DAG.getNode(ARMISD::BFI, dl, MVT::i32, Conv, Ext, in LowerINSERT_VECTOR_ELT_i1()
9042 return DAG.getNode(ARMISD::PREDICATE_CAST, dl, Op.getValueType(), BFI); in LowerINSERT_VECTOR_ELT_i1()
9077 SDValue IElt = DAG.getNode(ISD::BITCAST, dl, IEltVT, Elt); in LowerINSERT_VECTOR_ELT()
9078 SDValue IVecIn = DAG.getNode(ISD::BITCAST, dl, IVecVT, VecIn); in LowerINSERT_VECTOR_ELT()
9079 SDValue IVecOut = DAG.getNode(ISD::INSERT_VECTOR_ELT, dl, IVecVT, in LowerINSERT_VECTOR_ELT()
9081 return DAG.getNode(ISD::BITCAST, dl, VecVT, IVecOut); in LowerINSERT_VECTOR_ELT()
9096 DAG.getNode(ARMISD::PREDICATE_CAST, dl, MVT::i32, Op->getOperand(0)); in LowerEXTRACT_VECTOR_ELT_i1()
9100 SDValue Shift = DAG.getNode(ISD::SRL, dl, MVT::i32, Conv, in LowerEXTRACT_VECTOR_ELT_i1()
9120 return DAG.getNode(ARMISD::VGETLANEu, dl, MVT::i32, Vec, Lane); in LowerEXTRACT_VECTOR_ELT()
9158 DAG.getNode(ARMISD::MVETRUNC, dl, ConcatVT, NewV1, NewV2); in LowerCONCAT_VECTORS_i1()
9159 return DAG.getNode(ARMISD::VCMPZ, dl, VT, ConVec, in LowerCONCAT_VECTORS_i1()
9173 NewV = DAG.getNode(ARMISD::VECTOR_REG_CAST, dl, MVT::v4i32, NewV); in LowerCONCAT_VECTORS_i1()
9177 SDValue Elt = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, MVT::i32, NewV, in LowerCONCAT_VECTORS_i1()
9179 ConVec = DAG.getNode(ISD::INSERT_VECTOR_ELT, dl, ConcatVT, ConVec, Elt, in LowerCONCAT_VECTORS_i1()
9185 SDValue ConVec = DAG.getNode(ISD::UNDEF, dl, ConcatVT); in LowerCONCAT_VECTORS_i1()
9191 return DAG.getNode(ARMISD::VCMPZ, dl, VT, ConVec, in LowerCONCAT_VECTORS_i1()
9223 Val = DAG.getNode(ISD::INSERT_VECTOR_ELT, dl, MVT::v2f64, Val, in LowerCONCAT_VECTORS()
9224 DAG.getNode(ISD::BITCAST, dl, MVT::f64, Op0), in LowerCONCAT_VECTORS()
9227 Val = DAG.getNode(ISD::INSERT_VECTOR_ELT, dl, MVT::v2f64, Val, in LowerCONCAT_VECTORS()
9228 DAG.getNode(ISD::BITCAST, dl, MVT::f64, Op1), in LowerCONCAT_VECTORS()
9230 return DAG.getNode(ISD::BITCAST, dl, Op.getValueType(), Val); in LowerCONCAT_VECTORS()
9257 SDValue SubVec = DAG.getNode(ISD::UNDEF, dl, SubVT); in LowerEXTRACT_SUBVECTOR()
9259 SDValue Elt = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, MVT::i32, NewV1, in LowerEXTRACT_SUBVECTOR()
9261 SubVec = DAG.getNode(ISD::INSERT_VECTOR_ELT, dl, SubVT, SubVec, Elt, in LowerEXTRACT_SUBVECTOR()
9263 SubVec = DAG.getNode(ISD::INSERT_VECTOR_ELT, dl, SubVT, SubVec, Elt, in LowerEXTRACT_SUBVECTOR()
9266 SDValue Cmp = DAG.getNode(ARMISD::VCMPZ, dl, MVT::v4i1, SubVec, in LowerEXTRACT_SUBVECTOR()
9268 return DAG.getNode(ARMISD::PREDICATE_CAST, dl, MVT::v2i1, Cmp); in LowerEXTRACT_SUBVECTOR()
9272 SDValue SubVec = DAG.getNode(ISD::UNDEF, dl, SubVT); in LowerEXTRACT_SUBVECTOR()
9274 SDValue Elt = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, MVT::i32, NewV1, in LowerEXTRACT_SUBVECTOR()
9276 SubVec = DAG.getNode(ISD::INSERT_VECTOR_ELT, dl, SubVT, SubVec, Elt, in LowerEXTRACT_SUBVECTOR()
9282 return DAG.getNode(ARMISD::VCMPZ, dl, VT, SubVec, in LowerEXTRACT_SUBVECTOR()
9298 DAG.getNode(ISD::AND, DL, FromVT, Op, DAG.getConstant(1, DL, FromVT)); in LowerTruncatei1()
9299 return DAG.getNode(ISD::SETCC, DL, VT, And, DAG.getConstant(0, DL, FromVT), in LowerTruncatei1()
9360 return DAG.getNode(ARMISD::MVETRUNC, DL, ToVT, Lo, Hi); in LowerTruncate()
9385 SDValue Ext = DAG.getNode(Opcode, DL, DAG.getVTList(ExtVT, ExtVT), Op); in LowerVectorExtend()
9389 Ext = DAG.getNode(N->getOpcode(), DL, MVT::v8i32, Ext); in LowerVectorExtend()
9390 Ext1 = DAG.getNode(N->getOpcode(), DL, MVT::v8i32, Ext1); in LowerVectorExtend()
9393 return DAG.getNode(ISD::CONCAT_VECTORS, DL, ToVT, Ext, Ext1); in LowerVectorExtend()
9404 SDNode *BVN = N->getOperand(0).getNode(); in isExtendedBUILD_VECTOR()
9431 SDNode *Elt = N->getOperand(i).getNode(); in isExtendedBUILD_VECTOR()
9505 return DAG.getNode(ExtOpcode, SDLoc(N), NewVT, N); in AddRequiredExtensionForVMULL()
9553 DAG.getNode(Opcode, SDLoc(newLoad), LD->getValueType(0), newLoad); in SkipExtensionForVMULL()
9562 SDNode *BVN = N->getOperand(0).getNode(); in SkipExtensionForVMULL()
9590 SDNode *N0 = N->getOperand(0).getNode(); in isAddSubSExt()
9591 SDNode *N1 = N->getOperand(1).getNode(); in isAddSubSExt()
9601 SDNode *N0 = N->getOperand(0).getNode(); in isAddSubZExt()
9602 SDNode *N1 = N->getOperand(1).getNode(); in isAddSubZExt()
9615 SDNode *N0 = Op.getOperand(0).getNode(); in LowerMUL()
9616 SDNode *N1 = Op.getOperand(1).getNode(); in LowerMUL()
9663 return DAG.getNode(NewOpc, DL, VT, Op0, Op1); in LowerMUL()
9674 SDValue N00 = SkipExtensionForVMULL(N0->getOperand(0).getNode(), DAG); in LowerMUL()
9675 SDValue N01 = SkipExtensionForVMULL(N0->getOperand(1).getNode(), DAG); in LowerMUL()
9677 return DAG.getNode(N0->getOpcode(), DL, VT, in LowerMUL()
9678 DAG.getNode(NewOpc, DL, VT, in LowerMUL()
9679 DAG.getNode(ISD::BITCAST, DL, Op1VT, N00), Op1), in LowerMUL()
9680 DAG.getNode(NewOpc, DL, VT, in LowerMUL()
9681 DAG.getNode(ISD::BITCAST, DL, Op1VT, N01), Op1)); in LowerMUL()
9691 X = DAG.getNode(ISD::SIGN_EXTEND, dl, MVT::v4i32, X); in LowerSDIV_v4i8()
9692 Y = DAG.getNode(ISD::SIGN_EXTEND, dl, MVT::v4i32, Y); in LowerSDIV_v4i8()
9693 X = DAG.getNode(ISD::SINT_TO_FP, dl, MVT::v4f32, X); in LowerSDIV_v4i8()
9694 Y = DAG.getNode(ISD::SINT_TO_FP, dl, MVT::v4f32, Y); in LowerSDIV_v4i8()
9697 Y = DAG.getNode(ISD::INTRINSIC_WO_CHAIN, dl, MVT::v4f32, in LowerSDIV_v4i8()
9704 X = DAG.getNode(ISD::FMUL, dl, MVT::v4f32, X, Y); in LowerSDIV_v4i8()
9705 X = DAG.getNode(ISD::BITCAST, dl, MVT::v4i32, X); in LowerSDIV_v4i8()
9707 X = DAG.getNode(ISD::ADD, dl, MVT::v4i32, X, Y); in LowerSDIV_v4i8()
9708 X = DAG.getNode(ISD::BITCAST, dl, MVT::v4f32, X); in LowerSDIV_v4i8()
9710 X = DAG.getNode(ISD::FP_TO_SINT, dl, MVT::v4i32, X); in LowerSDIV_v4i8()
9711 X = DAG.getNode(ISD::TRUNCATE, dl, MVT::v4i16, X); in LowerSDIV_v4i8()
9723 N0 = DAG.getNode(ISD::SIGN_EXTEND, dl, MVT::v4i32, N0); in LowerSDIV_v4i16()
9724 N1 = DAG.getNode(ISD::SIGN_EXTEND, dl, MVT::v4i32, N1); in LowerSDIV_v4i16()
9725 N0 = DAG.getNode(ISD::SINT_TO_FP, dl, MVT::v4f32, N0); in LowerSDIV_v4i16()
9726 N1 = DAG.getNode(ISD::SINT_TO_FP, dl, MVT::v4f32, N1); in LowerSDIV_v4i16()
9731 N2 = DAG.getNode(ISD::INTRINSIC_WO_CHAIN, dl, MVT::v4f32, in LowerSDIV_v4i16()
9734 N1 = DAG.getNode(ISD::INTRINSIC_WO_CHAIN, dl, MVT::v4f32, in LowerSDIV_v4i16()
9737 N2 = DAG.getNode(ISD::FMUL, dl, MVT::v4f32, N1, N2); in LowerSDIV_v4i16()
9742 N0 = DAG.getNode(ISD::FMUL, dl, MVT::v4f32, N0, N2); in LowerSDIV_v4i16()
9743 N0 = DAG.getNode(ISD::BITCAST, dl, MVT::v4i32, N0); in LowerSDIV_v4i16()
9745 N0 = DAG.getNode(ISD::ADD, dl, MVT::v4i32, N0, N1); in LowerSDIV_v4i16()
9746 N0 = DAG.getNode(ISD::BITCAST, dl, MVT::v4f32, N0); in LowerSDIV_v4i16()
9749 N0 = DAG.getNode(ISD::FP_TO_SINT, dl, MVT::v4i32, N0); in LowerSDIV_v4i16()
9750 N0 = DAG.getNode(ISD::TRUNCATE, dl, MVT::v4i16, N0); in LowerSDIV_v4i16()
9766 N0 = DAG.getNode(ISD::SIGN_EXTEND, dl, MVT::v8i16, N0); in LowerSDIV()
9767 N1 = DAG.getNode(ISD::SIGN_EXTEND, dl, MVT::v8i16, N1); in LowerSDIV()
9769 N2 = DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, MVT::v4i16, N0, in LowerSDIV()
9771 N3 = DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, MVT::v4i16, N1, in LowerSDIV()
9773 N0 = DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, MVT::v4i16, N0, in LowerSDIV()
9775 N1 = DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, MVT::v4i16, N1, in LowerSDIV()
9781 N0 = DAG.getNode(ISD::CONCAT_VECTORS, dl, MVT::v8i16, N0, N2); in LowerSDIV()
9784 N0 = DAG.getNode(ISD::TRUNCATE, dl, MVT::v8i8, N0); in LowerSDIV()
9803 N0 = DAG.getNode(ISD::ZERO_EXTEND, dl, MVT::v8i16, N0); in LowerUDIV()
9804 N1 = DAG.getNode(ISD::ZERO_EXTEND, dl, MVT::v8i16, N1); in LowerUDIV()
9806 N2 = DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, MVT::v4i16, N0, in LowerUDIV()
9808 N3 = DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, MVT::v4i16, N1, in LowerUDIV()
9810 N0 = DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, MVT::v4i16, N0, in LowerUDIV()
9812 N1 = DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, MVT::v4i16, N1, in LowerUDIV()
9818 N0 = DAG.getNode(ISD::CONCAT_VECTORS, dl, MVT::v8i16, N0, N2); in LowerUDIV()
9821 N0 = DAG.getNode(ISD::INTRINSIC_WO_CHAIN, dl, MVT::v8i8, in LowerUDIV()
9831 N0 = DAG.getNode(ISD::ZERO_EXTEND, dl, MVT::v4i32, N0); in LowerUDIV()
9832 N1 = DAG.getNode(ISD::ZERO_EXTEND, dl, MVT::v4i32, N1); in LowerUDIV()
9833 N0 = DAG.getNode(ISD::SINT_TO_FP, dl, MVT::v4f32, N0); in LowerUDIV()
9834 SDValue BN1 = DAG.getNode(ISD::SINT_TO_FP, dl, MVT::v4f32, N1); in LowerUDIV()
9840 N2 = DAG.getNode(ISD::INTRINSIC_WO_CHAIN, dl, MVT::v4f32, in LowerUDIV()
9843 N1 = DAG.getNode(ISD::INTRINSIC_WO_CHAIN, dl, MVT::v4f32, in LowerUDIV()
9846 N2 = DAG.getNode(ISD::FMUL, dl, MVT::v4f32, N1, N2); in LowerUDIV()
9847 N1 = DAG.getNode(ISD::INTRINSIC_WO_CHAIN, dl, MVT::v4f32, in LowerUDIV()
9850 N2 = DAG.getNode(ISD::FMUL, dl, MVT::v4f32, N1, N2); in LowerUDIV()
9855 N0 = DAG.getNode(ISD::FMUL, dl, MVT::v4f32, N0, N2); in LowerUDIV()
9856 N0 = DAG.getNode(ISD::BITCAST, dl, MVT::v4i32, N0); in LowerUDIV()
9858 N0 = DAG.getNode(ISD::ADD, dl, MVT::v4i32, N0, N1); in LowerUDIV()
9859 N0 = DAG.getNode(ISD::BITCAST, dl, MVT::v4f32, N0); in LowerUDIV()
9862 N0 = DAG.getNode(ISD::FP_TO_SINT, dl, MVT::v4i32, N0); in LowerUDIV()
9863 N0 = DAG.getNode(ISD::TRUNCATE, dl, MVT::v4i16, N0); in LowerUDIV()
9868 SDNode *N = Op.getNode(); in LowerUADDSUBO_CARRY()
9882 Result = DAG.getNode(ARMISD::ADDE, DL, VTs, Op.getOperand(0), in LowerUADDSUBO_CARRY()
9890 Carry = DAG.getNode(ISD::SUB, DL, MVT::i32, in LowerUADDSUBO_CARRY()
9896 Result = DAG.getNode(ARMISD::SUBE, DL, VTs, Op.getOperand(0), in LowerUADDSUBO_CARRY()
9903 Carry = DAG.getNode(ISD::SUB, DL, MVT::i32, in LowerUADDSUBO_CARRY()
9908 return DAG.getNode(ISD::MERGE_VALUES, DL, N->getVTList(), Result, Carry); in LowerUADDSUBO_CARRY()
9976 SDValue Add = DAG.getNode(ISD::ADD, dl, PtrVT, SRet, in LowerFSINCOS()
9982 return DAG.getNode(ISD::MERGE_VALUES, dl, Tys, in LowerFSINCOS()
10072 SDValue DBZCHK = DAG.getNode(ARMISD::WIN__DBZCHK, dl, MVT::Other, in LowerDIV_Windows()
10082 return DAG.getNode(ARMISD::WIN__DBZCHK, DL, MVT::Other, InChain, Op); in WinDBZCheckDenominator()
10085 return DAG.getNode(ARMISD::WIN__DBZCHK, DL, MVT::Other, InChain, in WinDBZCheckDenominator()
10086 DAG.getNode(ISD::OR, DL, MVT::i32, Lo, Hi)); in WinDBZCheckDenominator()
10099 SDValue DBZCHK = WinDBZCheckDenominator(DAG, Op.getNode(), DAG.getEntryNode()); in ExpandDIV_Windows()
10103 SDValue Lower = DAG.getNode(ISD::TRUNCATE, dl, MVT::i32, Result); in ExpandDIV_Windows()
10104 SDValue Upper = DAG.getNode(ISD::SRL, dl, MVT::i64, Result, in ExpandDIV_Windows()
10106 Upper = DAG.getNode(ISD::TRUNCATE, dl, MVT::i32, Upper); in ExpandDIV_Windows()
10108 Results.push_back(DAG.getNode(ISD::BUILD_PAIR, dl, MVT::i64, Lower, Upper)); in ExpandDIV_Windows()
10112 LoadSDNode *LD = cast<LoadSDNode>(Op.getNode()); in LowerPredicateLoad()
10139 Val = DAG.getNode(ISD::SRL, dl, MVT::i32, in LowerPredicateLoad()
10140 DAG.getNode(ISD::BITREVERSE, dl, MVT::i32, Load), in LowerPredicateLoad()
10142 SDValue Pred = DAG.getNode(ARMISD::PREDICATE_CAST, dl, MVT::v16i1, Val); in LowerPredicateLoad()
10144 Pred = DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, MemVT, Pred, in LowerPredicateLoad()
10164 SDValue Pair = DAG.getNode(ISD::BUILD_PAIR, dl, MVT::i64, Lo, Hi); in LowerLOAD()
10170 StoreSDNode *ST = cast<StoreSDNode>(Op.getNode()); in LowerPredicateStore()
10189 Ops.push_back(DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, MVT::i32, Build, in LowerPredicateStore()
10194 Build = DAG.getNode(ISD::BUILD_VECTOR, dl, MVT::v16i1, Ops); in LowerPredicateStore()
10196 SDValue GRP = DAG.getNode(ARMISD::PREDICATE_CAST, dl, MVT::i32, Build); in LowerPredicateStore()
10198 GRP = DAG.getNode(ISD::SRL, dl, MVT::i32, in LowerPredicateStore()
10199 DAG.getNode(ISD::BITREVERSE, dl, MVT::i32, GRP), in LowerPredicateStore()
10209 StoreSDNode *ST = cast<StoreSDNode>(Op.getNode()); in LowerSTORE()
10216 SDNode *N = Op.getNode(); in LowerSTORE()
10219 SDValue Lo = DAG.getNode( in LowerSTORE()
10223 SDValue Hi = DAG.getNode( in LowerSTORE()
10241 return (ISD::isBuildVectorAllZeros(N.getNode()) || in isZeroVector()
10247 MaskedLoadSDNode *N = cast<MaskedLoadSDNode>(Op.getNode()); in LowerMLOAD()
10258 SDValue ZeroVec = DAG.getNode(ARMISD::VMOVIMM, dl, VT, in LowerMLOAD()
10269 Combo = DAG.getNode(ISD::VSELECT, dl, VT, Mask, NewLoad, PassThru); in LowerMLOAD()
10306 SDValue Rev = DAG.getNode(RevOpcode, dl, VT, Op0); in LowerVecReduce()
10307 Op0 = DAG.getNode(BaseOpcode, dl, VT, Op0, Rev); in LowerVecReduce()
10314 SDValue Ext0 = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, EltVT, Op0, in LowerVecReduce()
10316 SDValue Ext1 = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, EltVT, Op0, in LowerVecReduce()
10318 SDValue Ext2 = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, EltVT, Op0, in LowerVecReduce()
10320 SDValue Ext3 = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, EltVT, Op0, in LowerVecReduce()
10322 SDValue Res0 = DAG.getNode(BaseOpcode, dl, EltVT, Ext0, Ext1, Op->getFlags()); in LowerVecReduce()
10323 SDValue Res1 = DAG.getNode(BaseOpcode, dl, EltVT, Ext2, Ext3, Op->getFlags()); in LowerVecReduce()
10324 Res = DAG.getNode(BaseOpcode, dl, EltVT, Res0, Res1, Op->getFlags()); in LowerVecReduce()
10326 SDValue Ext0 = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, EltVT, Op0, in LowerVecReduce()
10328 SDValue Ext1 = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, EltVT, Op0, in LowerVecReduce()
10330 Res = DAG.getNode(BaseOpcode, dl, EltVT, Ext0, Ext1, Op->getFlags()); in LowerVecReduce()
10335 Res = DAG.getNode(ISD::ANY_EXTEND, dl, Op->getValueType(0), Res); in LowerVecReduce()
10387 Op0 = DAG.getNode(ISD::INTRINSIC_WO_CHAIN, dl, VT, {PairwiseOp, Lo, Hi}); in LowerVecReduceMinMax()
10393 Op0 = DAG.getNode(ISD::INTRINSIC_WO_CHAIN, dl, VT, {PairwiseOp, Op0, Op0}); in LowerVecReduceMinMax()
10397 SDValue Res = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, EltVT, Op0, in LowerVecReduceMinMax()
10415 Res = DAG.getNode(Extend, dl, Op.getValueType(), Res); in LowerVecReduceMinMax()
10446 SDValue Cycles32 = DAG.getNode(ISD::INTRINSIC_W_CHAIN, DL, in ReplaceREADCYCLECOUNTER()
10448 Results.push_back(DAG.getNode(ISD::BUILD_PAIR, DL, MVT::i64, Cycles32, in ReplaceREADCYCLECOUNTER()
10454 SDLoc dl(V.getNode()); in createGPRPairNode()
10492 Results.push_back(DAG.getNode(ISD::BUILD_PAIR, SDLoc(N), MVT::i64, Lo, Hi)); in ReplaceCMP_SWAP_64Results()
10510 if (!RHS.getNode()) { in LowerFSETCC()
10514 SDValue Result = DAG.getNode(ISD::SETCC, dl, VT, LHS, RHS, in LowerFSETCC()
10584 case ISD::BITCAST: return ExpandBITCAST(Op.getNode(), DAG, Subtarget); in LowerOperation()
10587 case ISD::SRA: return LowerShift(Op.getNode(), DAG, Subtarget); in LowerOperation()
10588 case ISD::SREM: return LowerREM(Op.getNode(), DAG); in LowerOperation()
10589 case ISD::UREM: return LowerREM(Op.getNode(), DAG); in LowerOperation()
10594 case ISD::CTTZ_ZERO_UNDEF: return LowerCTTZ(Op.getNode(), DAG, Subtarget); in LowerOperation()
10595 case ISD::CTPOP: return LowerCTPOP(Op.getNode(), DAG, Subtarget); in LowerOperation()
10605 case ISD::TRUNCATE: return LowerTruncate(Op.getNode(), DAG, Subtarget); in LowerOperation()
10607 case ISD::ZERO_EXTEND: return LowerVectorExtend(Op.getNode(), DAG, Subtarget); in LowerOperation()
10698 SDValue LongMul = DAG.getNode(Opc, dl, in ReplaceLongIntrinsic()
10702 Results.push_back(DAG.getNode(ISD::BUILD_PAIR, dl, MVT::i64, in ReplaceLongIntrinsic()
10771 if (Res.getNode()) in ReplaceNodeResults()
12582 if (!isConditionalZeroOrAllOnes(Slct.getNode(), AllOnes, CCOp, SwapSelectOps, in combineSelectAndUse()
12588 SDValue FalseVal = DAG.getNode(N->getOpcode(), SDLoc(N), VT, in combineSelectAndUse()
12594 return DAG.getNode(ISD::SELECT, SDLoc(N), VT, in combineSelectAndUse()
12604 if (N0.getNode()->hasOneUse()) in combineSelectAndUseCommutative()
12607 if (N1.getNode()->hasOneUse()) in combineSelectAndUseCommutative()
12629 if (!IsVUZPShuffleNode(N0.getNode()) || N0.getNode() != N1.getNode() || in AddCombineToVPADD()
12641 SDNode *Unzip = N0.getNode(); in AddCombineToVPADD()
12650 return DAG.getNode(ISD::INTRINSIC_WO_CHAIN, dl, VT, Ops); in AddCombineToVPADD()
12667 if (!IsVUZPShuffleNode(N00.getNode()) || N00.getNode() != N10.getNode() || in AddCombineVUZPToVPADDL()
12695 SDValue Concat = DAG.getNode(ISD::CONCAT_VECTORS, SDLoc(N), ConcatVT, in AddCombineVUZPToVPADDL()
12699 return DAG.getNode(ISD::INTRINSIC_WO_CHAIN, dl, VT, Ops); in AddCombineVUZPToVPADDL()
12731 SDNode *V = Vec.getNode(); in AddCombineBUILD_VECTORToVPADDL()
12745 if (V != ExtVec0->getOperand(0).getNode() || in AddCombineBUILD_VECTORToVPADDL()
12746 V != ExtVec1->getOperand(0).getNode()) in AddCombineBUILD_VECTORToVPADDL()
12798 SDValue tmp = DAG.getNode(ISD::INTRINSIC_WO_CHAIN, dl, widenType, Ops); in AddCombineBUILD_VECTORToVPADDL()
12800 return DAG.getNode(ExtOp, dl, VT, tmp); in AddCombineBUILD_VECTORToVPADDL()
12873 SDValue SMLAL = DAG.getNode(Opcode, dl, DAG.getVTList(MVT::i32, MVT::i32), in AddCombineTo64BitSMLAL16()
12876 SDValue HiMLALResult(SMLAL.getNode(), 1); in AddCombineTo64BitSMLAL16()
12877 SDValue LoMLALResult(SMLAL.getNode(), 0); in AddCombineTo64BitSMLAL16()
12919 SDNode *AddcSubcNode = AddeSubeNode->getOperand(2).getNode(); in AddCombineTo64bitMLAL()
12930 if (AddcSubcOp0.getNode() == AddcSubcOp1.getNode()) in AddCombineTo64bitMLAL()
12951 if (AddeSubeOp0.getNode() == AddeSubeOp1.getNode()) in AddCombineTo64bitMLAL()
12999 if (AddcSubcNode == HiAddSub->getNode() || in AddCombineTo64bitMLAL()
13000 AddcSubcNode->isPredecessorOf(HiAddSub->getNode())) in AddCombineTo64bitMLAL()
13017 LowAddSub->getNode()->getOpcode() == ISD::Constant && in AddCombineTo64bitMLAL()
13018 static_cast<ConstantSDNode *>(LowAddSub->getNode())->getZExtValue() == in AddCombineTo64bitMLAL()
13026 SDValue NewNode = DAG.getNode(FinalOpc, SDLoc(AddcSubcNode), MVT::i32, Ops); in AddCombineTo64bitMLAL()
13039 SDValue MLALNode = DAG.getNode(FinalOpc, SDLoc(AddcSubcNode), in AddCombineTo64bitMLAL()
13043 SDValue HiMLALResult(MLALNode.getNode(), 1); in AddCombineTo64bitMLAL()
13046 SDValue LoMLALResult(MLALNode.getNode(), 0); in AddCombineTo64bitMLAL()
13066 SDNode* AddcNode = AddeNode->getOperand(2).getNode(); in AddCombineTo64bitUMAAL()
13074 UmlalNode = AddcNode->getOperand(0).getNode(); in AddCombineTo64bitUMAAL()
13077 UmlalNode = AddcNode->getOperand(1).getNode(); in AddCombineTo64bitUMAAL()
13089 AddeNode->getOperand(1).getNode() == UmlalNode) || in AddCombineTo64bitUMAAL()
13090 (AddeNode->getOperand(0).getNode() == UmlalNode && in AddCombineTo64bitUMAAL()
13095 SDValue UMAAL = DAG.getNode(ARMISD::UMAAL, SDLoc(AddcNode), in AddCombineTo64bitUMAAL()
13099 DAG.ReplaceAllUsesOfValueWith(SDValue(AddeNode, 0), SDValue(UMAAL.getNode(), 1)); in AddCombineTo64bitUMAAL()
13100 DAG.ReplaceAllUsesOfValueWith(SDValue(AddcNode, 0), SDValue(UMAAL.getNode(), 0)); in AddCombineTo64bitUMAAL()
13115 SDNode* AddcNode = N->getOperand(2).getNode(); in PerformUMLALCombine()
13116 SDNode* AddeNode = N->getOperand(3).getNode(); in PerformUMLALCombine()
13121 (AddeNode->getOperand(2).getNode() == AddcNode)) in PerformUMLALCombine()
13122 return DAG.getNode(ARMISD::UMAAL, SDLoc(N), in PerformUMLALCombine()
13155 return DAG.getNode(Opcode, DL, N->getVTList(), N->getOperand(0), RHS); in PerformAddcSubcCombine()
13181 return DAG.getNode(Opcode, DL, N->getVTList(), in PerformAddeSubeCombine()
13283 LHS = DCI.DAG.getNode(ISD::ANY_EXTEND, dl, MVT::i32, LHS); in PerformSELECTCombine()
13287 DCI.DAG.getNode(Opcode, dl, MVT::i32, LHS, RHS->getOperand(0)); in PerformSELECTCombine()
13291 Reduction = DCI.DAG.getNode(ISD::TRUNCATE, dl, VectorScalarType, Reduction); in PerformSELECTCombine()
13381 DAG.getNode(ISD::ANY_EXTEND, DL, ExtVecVT, Ext0.getOperand(0)); in PerformVQDMULHCombine()
13383 DAG.getNode(ISD::ANY_EXTEND, DL, ExtVecVT, Ext1.getOperand(0)); in PerformVQDMULHCombine()
13384 Inp0 = DAG.getNode(ARMISD::VECTOR_REG_CAST, DL, LegalVecVT, Inp0); in PerformVQDMULHCombine()
13385 Inp1 = DAG.getNode(ARMISD::VECTOR_REG_CAST, DL, LegalVecVT, Inp1); in PerformVQDMULHCombine()
13386 SDValue VQDMULH = DAG.getNode(ARMISD::VQDMULH, DL, LegalVecVT, Inp0, Inp1); in PerformVQDMULHCombine()
13387 SDValue Trunc = DAG.getNode(ARMISD::VECTOR_REG_CAST, DL, ExtVecVT, VQDMULH); in PerformVQDMULHCombine()
13388 Trunc = DAG.getNode(ISD::TRUNCATE, DL, VecVT, Trunc); in PerformVQDMULHCombine()
13389 return DAG.getNode(ISD::SIGN_EXTEND, DL, VT, Trunc); in PerformVQDMULHCombine()
13398 DAG.getNode(ISD::EXTRACT_SUBVECTOR, DL, LegalVecVT, Ext0.getOperand(0), in PerformVQDMULHCombine()
13401 DAG.getNode(ISD::EXTRACT_SUBVECTOR, DL, LegalVecVT, Ext1.getOperand(0), in PerformVQDMULHCombine()
13403 SDValue VQDMULH = DAG.getNode(ARMISD::VQDMULH, DL, LegalVecVT, Inp0, Inp1); in PerformVQDMULHCombine()
13406 return DAG.getNode(ISD::SIGN_EXTEND, DL, VT, in PerformVQDMULHCombine()
13407 DAG.getNode(ISD::CONCAT_VECTORS, DL, VecVT, Parts)); in PerformVQDMULHCombine()
13446 return DCI.DAG.getNode(ISD::VSELECT, SDLoc(N), Type, Cond, RHS, LHS); in PerformVSELECTCombine()
13503 return DCI.DAG.getNode(ISD::INTRINSIC_WO_CHAIN, DL, VT, in PerformVSetCCToVCTPCombine()
13555 if (N0.getNode()->hasOneUse()) in PerformADDCombineWithOperands()
13586 SDValue Add0 = DAG.getNode(ISD::ADD, dl, VT, N0, N1.getOperand(0)); in TryDistrubutionADDVecReduce()
13587 return DAG.getNode(ISD::ADD, dl, VT, Add0, N1.getOperand(1)); in TryDistrubutionADDVecReduce()
13606 SDValue Add0 = DAG.getNode(ISD::ADD, dl, VT, N0.getOperand(1 - N0RedOp), in TryDistrubutionADDVecReduce()
13609 DAG.getNode(ISD::ADD, dl, VT, Add0, N0.getOperand(N0RedOp)); in TryDistrubutionADDVecReduce()
13610 return DAG.getNode(ISD::ADD, dl, VT, Add1, N1.getOperand(N1RedOp)); in TryDistrubutionADDVecReduce()
13685 return DAG.getNode(ISD::ADD, dl, VT, N1, N0); in TryDistrubutionADDVecReduce()
13696 SDValue Add0 = DAG.getNode(ISD::ADD, dl, VT, X, N1); in TryDistrubutionADDVecReduce()
13697 return DAG.getNode(ISD::ADD, dl, VT, Add0, N0); in TryDistrubutionADDVecReduce()
13737 NB->getOperand(1) != SDValue(VecRed.getNode(), 1)) in PerformADDVecReduce()
13742 SDValue Inp = DAG.getNode(ISD::BUILD_PAIR, dl, MVT::i64, in PerformADDVecReduce()
13744 NA = DAG.getNode(ISD::ADD, dl, MVT::i64, Inp, NA); in PerformADDVecReduce()
13754 DAG.getNode(OpcodeA, dl, DAG.getVTList({MVT::i32, MVT::i32}), Ops); in PerformADDVecReduce()
13755 return DAG.getNode(ISD::BUILD_PAIR, dl, MVT::i64, Red, in PerformADDVecReduce()
13756 SDValue(Red.getNode(), 1)); in PerformADDVecReduce()
14003 SDValue BinOp = DAG.getNode(N->getOpcode(), dl, MVT::i32, X, in PerformSHLSimplify()
14006 SDValue Res = DAG.getNode(ISD::SHL, dl, MVT::i32, BinOp, SHL.getOperand(1)); in PerformSHLSimplify()
14051 return DAG.getNode(ARMISD::CSINV, SDLoc(N), MVT::i32, in PerformSubCSINCCombine()
14052 DAG.getNode(ISD::SUB, SDLoc(N), MVT::i32, N->getOperand(0), in PerformSubCSINCCombine()
14067 if (N1.getNode()->hasOneUse()) in PerformSUBCombine()
14092 SDValue Negate = DCI.DAG.getNode(ISD::SUB, dl, MVT::i32, in PerformSUBCombine()
14095 return DCI.DAG.getNode(ARMISD::VDUP, dl, N->getValueType(0), Negate); in PerformSUBCombine()
14139 return DAG.getNode(Opcode, DL, VT, in PerformVMULCombine()
14140 DAG.getNode(ISD::MUL, DL, VT, N00, N1), in PerformVMULCombine()
14141 DAG.getNode(ISD::MUL, DL, VT, N01, N1)); in PerformVMULCombine()
14193 SDValue New0a = DAG.getNode(ARMISD::VECTOR_REG_CAST, dl, MVT::v4i32, Op0); in PerformMVEVMULLCombine()
14194 SDValue New1a = DAG.getNode(ARMISD::VECTOR_REG_CAST, dl, MVT::v4i32, Op1); in PerformMVEVMULLCombine()
14195 return DAG.getNode(ARMISD::VMULLs, dl, VT, New0a, New1a); in PerformMVEVMULLCombine()
14200 SDValue New0a = DAG.getNode(ARMISD::VECTOR_REG_CAST, dl, MVT::v4i32, Op0); in PerformMVEVMULLCombine()
14201 SDValue New1a = DAG.getNode(ARMISD::VECTOR_REG_CAST, dl, MVT::v4i32, Op1); in PerformMVEVMULLCombine()
14202 return DAG.getNode(ARMISD::VMULLu, dl, VT, New0a, New1a); in PerformMVEVMULLCombine()
14246 Res = DAG.getNode(ISD::ADD, DL, VT, in PerformMULCombine()
14248 DAG.getNode(ISD::SHL, DL, VT, in PerformMULCombine()
14254 Res = DAG.getNode(ISD::SUB, DL, VT, in PerformMULCombine()
14255 DAG.getNode(ISD::SHL, DL, VT, in PerformMULCombine()
14266 Res = DAG.getNode(ISD::SUB, DL, VT, in PerformMULCombine()
14268 DAG.getNode(ISD::SHL, DL, VT, in PerformMULCombine()
14274 Res = DAG.getNode(ISD::ADD, DL, VT, in PerformMULCombine()
14276 DAG.getNode(ISD::SHL, DL, VT, in PerformMULCombine()
14280 Res = DAG.getNode(ISD::SUB, DL, VT, in PerformMULCombine()
14287 Res = DAG.getNode(ISD::SHL, DL, VT, in PerformMULCombine()
14314 SDNode *N0 = N->getOperand(0).getNode(); in CombineANDShift()
14349 SDValue SHL = DAG.getNode(ISD::SHL, DL, MVT::i32, N0->getOperand(0), in CombineANDShift()
14351 return DAG.getNode(ISD::SRL, DL, MVT::i32, SHL, in CombineANDShift()
14360 SDValue SHL = DAG.getNode(ISD::SRL, DL, MVT::i32, N0->getOperand(0), in CombineANDShift()
14362 return DAG.getNode(ISD::SHL, DL, MVT::i32, SHL, in CombineANDShift()
14373 SDValue SHL = DAG.getNode(ISD::SHL, DL, MVT::i32, N0->getOperand(0), in CombineANDShift()
14375 return DAG.getNode(ISD::SRL, DL, MVT::i32, SHL, in CombineANDShift()
14386 SDValue SHL = DAG.getNode(ISD::SRL, DL, MVT::i32, N0->getOperand(0), in CombineANDShift()
14388 return DAG.getNode(ISD::SHL, DL, MVT::i32, SHL, in CombineANDShift()
14423 if (Val.getNode()) { in PerformANDCombine()
14425 DAG.getNode(ISD::BITCAST, dl, VbicVT, N->getOperand(0)); in PerformANDCombine()
14426 SDValue Vbic = DAG.getNode(ARMISD::VBICIMM, dl, VbicVT, Input, Val); in PerformANDCombine()
14427 return DAG.getNode(ISD::BITCAST, dl, VT, Vbic); in PerformANDCombine()
14469 if ((SRL.getOperand(0).getNode() != SHL.getOperand(0).getNode()) || in PerformORCombineToSMULWBT()
14473 SDNode *SMULLOHI = SRL.getOperand(0).getNode(); in PerformORCombineToSMULWBT()
14504 SDValue Res = DAG.getNode(Opcode, dl, MVT::i32, OpS32, OpS16); in PerformORCombineToSMULWBT()
14557 Res = DAG.getNode(ARMISD::BFI, DL, VT, N00, in PerformORCombineToBFI()
14584 Res = DAG.getNode(ISD::SRL, DL, VT, N1.getOperand(0), in PerformORCombineToBFI()
14586 Res = DAG.getNode(ARMISD::BFI, DL, VT, N00, Res, in PerformORCombineToBFI()
14601 Res = DAG.getNode(ISD::SRL, DL, VT, N00, in PerformORCombineToBFI()
14603 Res = DAG.getNode(ARMISD::BFI, DL, VT, N1.getOperand(0), Res, in PerformORCombineToBFI()
14623 Res = DAG.getNode(ARMISD::BFI, DL, VT, N1, N00.getOperand(0), in PerformORCombineToBFI()
14687 SDValue And = DAG.getNode(ISD::AND, DL, VT, NewN0, NewN1); in PerformORCombine_i1()
14719 if (Val.getNode()) { in PerformORCombine()
14721 DAG.getNode(ISD::BITCAST, dl, VorrVT, N->getOperand(0)); in PerformORCombine()
14722 SDValue Vorr = DAG.getNode(ARMISD::VORRIMM, dl, VorrVT, Input, Val); in PerformORCombine()
14723 return DAG.getNode(ISD::BITCAST, dl, VT, Vorr); in PerformORCombine()
14769 SDValue Result = DAG.getNode(ARMISD::VBSP, dl, CanonicalVT, in PerformORCombine()
14773 return DAG.getNode(ISD::BITCAST, dl, VT, Result); in PerformORCombine()
14826 return DAG.getNode(N0->getOpcode(), DL, N0->getValueType(0), Ops); in PerformXORCombine()
14877 SDValue NewFrom = ParseBFI(V.getNode(), NewToMask, NewFromMask); in FindBFIToCombineWith()
14916 return DAG.getNode(ARMISD::BFI, SDLoc(N), N->getValueType(0), in PerformBFICombine()
14928 SDValue From2 = ParseBFI(CombineBFI.getNode(), ToMask2, FromMask2); in PerformBFICombine()
14940 From1 = DAG.getNode(ISD::SRL, dl, VT, From1, in PerformBFICombine()
14942 return DAG.getNode(ARMISD::BFI, dl, VT, CombineBFI.getOperand(0), From1, in PerformBFICombine()
14960 SDValue BFI1 = DAG.getNode(ARMISD::BFI, dl, VT, N0.getOperand(0), in PerformBFICombine()
14962 return DAG.getNode(ARMISD::BFI, dl, VT, BFI1, N0.getOperand(1), in PerformBFICombine()
15024 if (SDValue C = IsCMPZCSINC(N->getOperand(3).getNode(), Cond)) { in PerformCSETCombine()
15026 return DAG.getNode(N->getOpcode(), SDLoc(N), MVT::i32, N->getOperand(0), in PerformCSETCombine()
15030 return DAG.getNode( in PerformCSETCombine()
15049 SDNode *InNode = InDouble.getNode(); in PerformVMOVRRDCombine()
15064 SDValue OffsetPtr = DAG.getNode(ISD::ADD, DL, MVT::i32, BasePtr, in PerformVMOVRRDCombine()
15141 Op0.getNode() == Op1.getNode() && in PerformVMOVDRRCombine()
15143 return DAG.getNode(ISD::BITCAST, SDLoc(N), in PerformVMOVDRRCombine()
15173 DCI.DAG.getNode(ISD::CopyFromReg, SDLoc(N), in PerformVMOVhrCombine()
15221 if (ISD::isNormalLoad(N0.getNode()) && N0.hasOneUse()) { in PerformVMOVrhCombine()
15235 return DAG.getNode(ARMISD::VGETLANEu, SDLoc(N), VT, N0->getOperand(0), in PerformVMOVrhCombine()
15248 SDNode *Elt = N->getOperand(i).getNode(); in hasNormalLoadOperand()
15278 SDValue V = DAG.getNode(ISD::BITCAST, dl, MVT::f64, N->getOperand(i)); in PerformBUILD_VECTORCombine()
15281 DCI.AddToWorklist(V.getNode()); in PerformBUILD_VECTORCombine()
15285 return DAG.getNode(ISD::BITCAST, dl, VT, BV); in PerformBUILD_VECTORCombine()
15367 V = DAG.getNode(ISD::BITCAST, SDLoc(V), MVT::i32, V); in PerformARMBUILD_VECTORCombine()
15369 DCI.AddToWorklist(V.getNode()); in PerformARMBUILD_VECTORCombine()
15372 Vec = DAG.getNode(ISD::INSERT_VECTOR_ELT, dl, VecVT, Vec, V, LaneIdx); in PerformARMBUILD_VECTORCombine()
15374 Vec = DAG.getNode(ISD::BITCAST, dl, VT, Vec); in PerformARMBUILD_VECTORCombine()
15376 DCI.AddToWorklist(Vec.getNode()); in PerformARMBUILD_VECTORCombine()
15391 return DCI.DAG.getNode(ARMISD::PREDICATE_CAST, dl, VT, Op->getOperand(0)); in PerformPREDICATE_CASTCombine()
15398 DCI.DAG.getNode(ARMISD::PREDICATE_CAST, dl, VT, Op->getOperand(0)); in PerformPREDICATE_CASTCombine()
15399 SDValue C = DCI.DAG.getNode(ARMISD::PREDICATE_CAST, dl, VT, in PerformPREDICATE_CASTCombine()
15401 return DCI.DAG.getNode(ISD::XOR, dl, VT, X, C); in PerformPREDICATE_CASTCombine()
15422 return DAG.getNode(ISD::BITCAST, dl, VT, Op); in PerformVECTOR_REG_CASTCombine()
15433 return DAG.getNode(ARMISD::VECTOR_REG_CAST, dl, VT, Op->getOperand(0)); in PerformVECTOR_REG_CASTCombine()
15452 return DAG.getNode(ARMISD::VCMPZ, dl, VT, Op0, N->getOperand(2)); in PerformVCMPCombine()
15458 return DAG.getNode(ARMISD::VCMPZ, dl, VT, Op1, in PerformVCMPCombine()
15462 return DAG.getNode(ARMISD::VCMP, dl, VT, Op1, Op0, in PerformVCMPCombine()
15476 SDNode *Elt = N->getOperand(1).getNode(); in PerformInsertEltCombine()
15485 SDValue Vec = DAG.getNode(ISD::BITCAST, dl, FloatVT, N->getOperand(0)); in PerformInsertEltCombine()
15486 SDValue V = DAG.getNode(ISD::BITCAST, dl, MVT::f64, N->getOperand(1)); in PerformInsertEltCombine()
15488 DCI.AddToWorklist(Vec.getNode()); in PerformInsertEltCombine()
15489 DCI.AddToWorklist(V.getNode()); in PerformInsertEltCombine()
15490 SDValue InsElt = DAG.getNode(ISD::INSERT_VECTOR_ELT, dl, FloatVT, in PerformInsertEltCombine()
15492 return DAG.getNode(ISD::BITCAST, dl, VT, InsElt); in PerformInsertEltCombine()
15550 SDValue F64 = DCI.DAG.getNode( in PerformExtractEltToVMOVRRD()
15552 DCI.DAG.getNode(ARMISD::VECTOR_REG_CAST, dl, MVT::v2f64, Op0), in PerformExtractEltToVMOVRRD()
15555 DCI.DAG.getNode(ARMISD::VMOVRRD, dl, {MVT::i32, MVT::i32}, F64); in PerformExtractEltToVMOVRRD()
15557 DCI.CombineTo(OtherExt.getNode(), SDValue(VMOVRRD.getNode(), 1)); in PerformExtractEltToVMOVRRD()
15572 return DCI.DAG.getNode(ARMISD::VMOVhr, dl, VT, X); in PerformExtractEltCombine()
15574 return DCI.DAG.getNode(ARMISD::VMOVrh, dl, VT, X); in PerformExtractEltCombine()
15576 return DCI.DAG.getNode(ISD::BITCAST, dl, VT, X); in PerformExtractEltCombine()
15615 return DCI.DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, VT, Op0.getOperand(Vec), in PerformExtractEltCombine()
15630 return DAG.getNode(ARMISD::VGETLANEs, SDLoc(N), VT, Op.getOperand(0), in PerformSignExtendInregCombine()
15667 Hi = DCI.DAG.getNode(ISD::EXTRACT_SUBVECTOR, DL, SubVT, Vec, in PerformInsertSubvectorCombine()
15670 Lo = DCI.DAG.getNode(ISD::EXTRACT_SUBVECTOR, DL, SubVT, Vec, in PerformInsertSubvectorCombine()
15674 return DCI.DAG.getNode(ISD::CONCAT_VECTORS, DL, VecVT, Lo, Hi); in PerformInsertSubvectorCombine()
15687 return DAG.getNode( in PerformShuffleVMOVNCombine()
15689 DAG.getNode(ARMISD::VECTOR_REG_CAST, DL, VT, Trunc.getOperand(0)), in PerformShuffleVMOVNCombine()
15690 DAG.getNode(ARMISD::VECTOR_REG_CAST, DL, VT, Trunc.getOperand(1)), in PerformShuffleVMOVNCombine()
15693 return DAG.getNode( in PerformShuffleVMOVNCombine()
15695 DAG.getNode(ARMISD::VECTOR_REG_CAST, DL, VT, Trunc.getOperand(1)), in PerformShuffleVMOVNCombine()
15696 DAG.getNode(ARMISD::VECTOR_REG_CAST, DL, VT, Trunc.getOperand(0)), in PerformShuffleVMOVNCombine()
15736 SDValue NewConcat = DAG.getNode(ISD::CONCAT_VECTORS, SDLoc(N), VT, in PerformVECTOR_SHUFFLECombine()
16049 StVal = DAG.getNode(ISD::BITCAST, dl, AlignedVecTy, StVal); in TryCombineBaseUpdate()
16059 NewResults.push_back(SDValue(UpdN.getNode(), i)); in TryCombineBaseUpdate()
16065 LdVal = DAG.getNode(ISD::BITCAST, dl, VecTy, LdVal); in TryCombineBaseUpdate()
16068 NewResults.push_back(SDValue(UpdN.getNode(), NumResultVecs + 1)); // chain in TryCombineBaseUpdate()
16070 DCI.CombineTo(User.N, SDValue(UpdN.getNode(), NumResultVecs)); in TryCombineBaseUpdate()
16079 ConstantSDNode *CInc = dyn_cast<ConstantSDNode>(Inc.getNode()); in getPointerConstIncrement()
16156 for (SDNode::use_iterator UI = Addr.getNode()->use_begin(), in CombineBaseUpdate()
16157 UE = Addr.getNode()->use_end(); UI != UE; ++UI) { in CombineBaseUpdate()
16175 if (findPointerConstIncrement(Addr.getNode(), &Base, &CInc)) { in CombineBaseUpdate()
16182 if (UI.getUse().getResNo() != Base.getResNo() || User == Addr.getNode() || in CombineBaseUpdate()
16259 for (SDNode::use_iterator UI = Addr.getNode()->use_begin(), in PerformMVEVLDCombine()
16260 UE = Addr.getNode()->use_end(); in PerformMVEVLDCombine()
16272 Visited.insert(Addr.getNode()); in PerformMVEVLDCombine()
16318 ConstantSDNode *CInc = dyn_cast<ConstantSDNode>(Inc.getNode()); in PerformMVEVLDCombine()
16348 NewResults.push_back(SDValue(UpdN.getNode(), i)); in PerformMVEVLDCombine()
16350 NewResults.push_back(SDValue(UpdN.getNode(), NumResultVecs + 1)); // chain in PerformMVEVLDCombine()
16352 DCI.CombineTo(User, SDValue(UpdN.getNode(), NumResultVecs)); in PerformMVEVLDCombine()
16372 SDNode *VLD = N->getOperand(0).getNode(); in CombineVLDDUP()
16426 DCI.CombineTo(User, SDValue(VLDDup.getNode(), ResNo)); in CombineVLDDUP()
16433 VLDDupResults.push_back(SDValue(VLDDup.getNode(), n)); in CombineVLDDUP()
16434 VLDDupResults.push_back(SDValue(VLDDup.getNode(), NumVecs)); in CombineVLDDUP()
16454 SDValue Extract = DCI.DAG.getNode(ISD::EXTRACT_VECTOR_ELT, SDLoc(N), ExtractVT, in PerformVDUPLANECombine()
16456 return DCI.DAG.getNode(ARMISD::VDUP, SDLoc(N), VT, Extract); in PerformVDUPLANECombine()
16481 return DCI.DAG.getNode(ISD::BITCAST, SDLoc(N), VT, Op); in PerformVDUPLANECombine()
16494 return DAG.getNode(ARMISD::VDUP, dl, N->getValueType(0), in PerformVDUPCombine()
16495 DAG.getNode(ISD::BITCAST, dl, MVT::i32, Op)); in PerformVDUPCombine()
16497 return DAG.getNode(ARMISD::VDUP, dl, N->getValueType(0), in PerformVDUPCombine()
16498 DAG.getNode(ARMISD::VMOVrh, dl, MVT::i32, Op)); in PerformVDUPCombine()
16507 LoadSDNode *LD = dyn_cast<LoadSDNode>(Op.getNode()); in PerformVDUPCombine()
16570 SDValue WideVec = DAG.getNode(ISD::BITCAST, DL, WideVecVT, StVal); in PerformTruncatingStoreCombine()
16600 SDValue ShuffWide = DAG.getNode(ISD::BITCAST, DL, StoreVecVT, Shuff); in PerformTruncatingStoreCombine()
16609 SDValue SubVec = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, DL, StoreType, in PerformTruncatingStoreCombine()
16615 DAG.getNode(ISD::ADD, DL, BasePtr.getValueType(), BasePtr, Increment); in PerformTruncatingStoreCombine()
16618 return DAG.getNode(ISD::TokenFactor, DL, MVT::Other, Chains); in PerformTruncatingStoreCombine()
16698 DAG.getNode(ISD::EXTRACT_SUBVECTOR, DL, NewFromVT, Trunc.getOperand(0), in PerformSplittingToNarrowingStores()
16702 DAG.getNode(ARMISD::VCVTN, DL, MVT::v8f16, DAG.getUNDEF(MVT::v8f16), in PerformSplittingToNarrowingStores()
16704 Extract = DAG.getNode(ARMISD::VECTOR_REG_CAST, DL, MVT::v4i32, FPTrunc); in PerformSplittingToNarrowingStores()
16711 return DAG.getNode(ISD::TokenFactor, DL, MVT::Other, Stores); in PerformSplittingToNarrowingStores()
16752 return DAG.getNode(ISD::TokenFactor, DL, MVT::Other, Stores); in PerformSplittingMVETruncToNarrowingStores()
16821 if (StVal.getNode()->getOpcode() == ARMISD::VMOVDRR && in PerformSTORECombine()
16822 StVal.getNode()->hasOneUse()) { in PerformSTORECombine()
16828 St->getChain(), DL, StVal.getNode()->getOperand(isBigEndian ? 1 : 0), in PerformSTORECombine()
16832 SDValue OffsetPtr = DAG.getNode(ISD::ADD, DL, MVT::i32, BasePtr, in PerformSTORECombine()
16835 StVal.getNode()->getOperand(isBigEndian ? 0 : 1), in PerformSTORECombine()
16842 StVal.getNode()->getOpcode() == ISD::EXTRACT_VECTOR_ELT) { in PerformSTORECombine()
16851 SDValue Vec = DAG.getNode(ISD::BITCAST, dl, FloatVT, IntVec); in PerformSTORECombine()
16852 SDValue ExtElt = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, MVT::f64, in PerformSTORECombine()
16855 SDValue V = DAG.getNode(ISD::BITCAST, dl, MVT::i64, ExtElt); in PerformSTORECombine()
16857 DCI.AddToWorklist(Vec.getNode()); in PerformSTORECombine()
16858 DCI.AddToWorklist(ExtElt.getNode()); in PerformSTORECombine()
16859 DCI.AddToWorklist(V.getNode()); in PerformSTORECombine()
16919 SDValue FixConv = DAG.getNode( in PerformVCVTCombine()
16925 FixConv = DAG.getNode(ISD::TRUNCATE, dl, N->getValueType(0), FixConv); in PerformVCVTCombine()
16969 DAG.getNode(ISD::FADD, DL, VT, Op0, Op1.getOperand(1), FaddFlags); in PerformFAddVSelectCombine()
16970 return DAG.getNode(ISD::VSELECT, DL, VT, Op1.getOperand(0), FAdd, Op0, FaddFlags); in PerformFAddVSelectCombine()
16989 SDValue VCMLA = DAG.getNode( in PerformFADDVCMLACombine()
16991 DAG.getNode(ISD::FADD, DL, VT, A.getOperand(2), B, N->getFlags()), in PerformFADDVCMLACombine()
17028 unsigned OpOpcode = Op.getNode()->getOpcode(); in PerformVDIVCombine()
17060 ConvInput = DAG.getNode(isSigned ? ISD::SIGN_EXTEND : ISD::ZERO_EXTEND, in PerformVDIVCombine()
17066 return DAG.getNode(ISD::INTRINSIC_WO_CHAIN, dl, in PerformVDIVCombine()
17086 SDValue Red0 = DAG.getNode(ISD::VECREDUCE_ADD, dl, ResVT, N0.getOperand(0)); in PerformVECREDUCE_ADDCombine()
17087 SDValue Red1 = DAG.getNode(ISD::VECREDUCE_ADD, dl, ResVT, N0.getOperand(1)); in PerformVECREDUCE_ADDCombine()
17088 return DAG.getNode(ISD::ADD, dl, ResVT, Red0, Red1); in PerformVECREDUCE_ADDCombine()
17115 A = DAG.getNode(ExtendCode, dl, in PerformVECREDUCE_ADDCombine()
17132 !ISD::isBuildVectorAllZeros(N0->getOperand(2).getNode())) in PerformVECREDUCE_ADDCombine()
17184 !ISD::isBuildVectorAllZeros(N0->getOperand(2).getNode())) in PerformVECREDUCE_ADDCombine()
17220 DAG.getNode(IsUnsigned ? ARMISD::MVEZEXT : ARMISD::MVESEXT, dl, in PerformVECREDUCE_ADDCombine()
17223 DAG.getNode(IsUnsigned ? ARMISD::MVEZEXT : ARMISD::MVESEXT, dl, in PerformVECREDUCE_ADDCombine()
17226 SDValue MLA0 = DAG.getNode(Opcode, dl, DAG.getVTList(MVT::i32, MVT::i32), in PerformVECREDUCE_ADDCombine()
17229 DAG.getNode(IsUnsigned ? ARMISD::VMLALVAu : ARMISD::VMLALVAs, dl, in PerformVECREDUCE_ADDCombine()
17232 return DAG.getNode(ISD::BUILD_PAIR, dl, MVT::i64, MLA1, MLA1.getValue(1)); in PerformVECREDUCE_ADDCombine()
17234 SDValue Node = DAG.getNode(Opcode, dl, {MVT::i32, MVT::i32}, Ops); in PerformVECREDUCE_ADDCombine()
17235 return DAG.getNode(ISD::BUILD_PAIR, dl, MVT::i64, Node, in PerformVECREDUCE_ADDCombine()
17236 SDValue(Node.getNode(), 1)); in PerformVECREDUCE_ADDCombine()
17242 return DAG.getNode(ARMISD::VMLAVs, dl, ResVT, A, B); in PerformVECREDUCE_ADDCombine()
17244 return DAG.getNode(ARMISD::VMLAVu, dl, ResVT, A, B); in PerformVECREDUCE_ADDCombine()
17252 return DAG.getNode(ISD::TRUNCATE, dl, ResVT, in PerformVECREDUCE_ADDCombine()
17253 DAG.getNode(ARMISD::VMLAVs, dl, MVT::i32, A, B)); in PerformVECREDUCE_ADDCombine()
17255 return DAG.getNode(ISD::TRUNCATE, dl, ResVT, in PerformVECREDUCE_ADDCombine()
17256 DAG.getNode(ARMISD::VMLAVu, dl, MVT::i32, A, B)); in PerformVECREDUCE_ADDCombine()
17260 return DAG.getNode(ARMISD::VMLAVps, dl, ResVT, A, B, Mask); in PerformVECREDUCE_ADDCombine()
17263 return DAG.getNode(ARMISD::VMLAVpu, dl, ResVT, A, B, Mask); in PerformVECREDUCE_ADDCombine()
17271 return DAG.getNode(ISD::TRUNCATE, dl, ResVT, in PerformVECREDUCE_ADDCombine()
17272 DAG.getNode(ARMISD::VMLAVps, dl, MVT::i32, A, B, Mask)); in PerformVECREDUCE_ADDCombine()
17274 return DAG.getNode(ISD::TRUNCATE, dl, ResVT, in PerformVECREDUCE_ADDCombine()
17275 DAG.getNode(ARMISD::VMLAVpu, dl, MVT::i32, A, B, Mask)); in PerformVECREDUCE_ADDCombine()
17278 return DAG.getNode(ARMISD::VADDVs, dl, ResVT, A); in PerformVECREDUCE_ADDCombine()
17280 return DAG.getNode(ARMISD::VADDVu, dl, ResVT, A); in PerformVECREDUCE_ADDCombine()
17286 return DAG.getNode(ISD::TRUNCATE, dl, ResVT, in PerformVECREDUCE_ADDCombine()
17287 DAG.getNode(ARMISD::VADDVs, dl, MVT::i32, A)); in PerformVECREDUCE_ADDCombine()
17289 return DAG.getNode(ISD::TRUNCATE, dl, ResVT, in PerformVECREDUCE_ADDCombine()
17290 DAG.getNode(ARMISD::VADDVu, dl, MVT::i32, A)); in PerformVECREDUCE_ADDCombine()
17293 return DAG.getNode(ARMISD::VADDVps, dl, ResVT, A, Mask); in PerformVECREDUCE_ADDCombine()
17295 return DAG.getNode(ARMISD::VADDVpu, dl, ResVT, A, Mask); in PerformVECREDUCE_ADDCombine()
17301 return DAG.getNode(ISD::TRUNCATE, dl, ResVT, in PerformVECREDUCE_ADDCombine()
17302 DAG.getNode(ARMISD::VADDVps, dl, MVT::i32, A, Mask)); in PerformVECREDUCE_ADDCombine()
17304 return DAG.getNode(ISD::TRUNCATE, dl, ResVT, in PerformVECREDUCE_ADDCombine()
17305 DAG.getNode(ARMISD::VADDVpu, dl, MVT::i32, A, Mask)); in PerformVECREDUCE_ADDCombine()
17318 SDValue Ext = DAG.getNode(ISD::SIGN_EXTEND, dl, N0->getValueType(0), Mul); in PerformVECREDUCE_ADDCombine()
17320 Ext = DAG.getNode(ISD::VSELECT, dl, N0->getValueType(0), in PerformVECREDUCE_ADDCombine()
17322 return DAG.getNode(ISD::VECREDUCE_ADD, dl, ResVT, Ext); in PerformVECREDUCE_ADDCombine()
17362 return DAG.getNode(N->getOpcode(), SDLoc(N), N->getVTList(), Ops); in PerformReduceShuffleCombine()
17384 return DCI.DAG.getNode(Op1->getOpcode(), SDLoc(Op1), N->getValueType(0), in PerformVMOVNCombine()
17434 SDValue NewBinOp = DCI.DAG.getNode(N->getOpcode(), DL, VT, in PerformVQDMULHCombine()
17453 DAG.ReplaceAllUsesWith(N, Merge.getNode()); in PerformLongShiftCombine()
17460 SDValue NewShift = DAG.getNode(NewOpcode, DL, N->getVTList(), Op0, Op1, in PerformLongShiftCombine()
17462 DAG.ReplaceAllUsesWith(N, NewShift.getNode()); in PerformLongShiftCombine()
17595 return DAG.getNode(VShiftOpc, dl, N->getValueType(0), in PerformIntrinsicCombine()
17613 return DAG.getNode(VShiftOpc, dl, N->getValueType(0), in PerformIntrinsicCombine()
17666 return DAG.getNode(Opc, SDLoc(N), N->getVTList(), N->getOperand(1)); in PerformIntrinsicCombine()
17684 SDValue val = DAG.getNode(Opc, dl, {MVT::i32, MVT::i32}, Ops); in PerformIntrinsicCombine()
17685 return DAG.getNode(ISD::BUILD_PAIR, dl, MVT::i64, val.getValue(0), in PerformIntrinsicCombine()
17729 SDValue SHL = DAG.getNode(ISD::SHL, DL, MVT::i32, N0->getOperand(0), in PerformShiftCombine()
17731 return DAG.getNode( in PerformShiftCombine()
17753 return DAG.getNode(ARMISD::VSHLIMM, dl, VT, N->getOperand(0), in PerformShiftCombine()
17764 return DAG.getNode(VShiftOpc, dl, VT, N->getOperand(0), in PerformShiftCombine()
17779 LoadSDNode *LD = cast<LoadSDNode>(N0.getNode()); in PerformSplittingToWideningLoad()
17831 Chains.push_back(SDValue(NewLoad.getNode(), 1)); in PerformSplittingToWideningLoad()
17840 DAG.getNode(ARMISD::VECTOR_REG_CAST, DL, MVT::v8f16, Loads[i]); in PerformSplittingToWideningLoad()
17841 SDValue FPExt = DAG.getNode(ARMISD::VCVTL, DL, MVT::v4f32, LoadBC, in PerformSplittingToWideningLoad()
17849 SDValue NewChain = DAG.getNode(ISD::TokenFactor, DL, MVT::Other, Chains); in PerformSplittingToWideningLoad()
17851 return DAG.getNode(ISD::CONCAT_VECTORS, DL, ToVT, Loads); in PerformSplittingToWideningLoad()
17888 return DAG.getNode(Opc, SDLoc(N), VT, Vec, Lane); in PerformExtendCombine()
17940 return DAG.getNode(ARMISD::SSAT, DL, VT, Input, in PerformMinMaxToSatCombine()
17943 return DAG.getNode(ARMISD::USAT, DL, VT, Input, in PerformMinMaxToSatCombine()
17982 if (!ISD::isConstantSplatVector(Min->getOperand(1).getNode(), MinC) || in PerformMinMaxCombine()
17985 if (!ISD::isConstantSplatVector(Max->getOperand(1).getNode(), MaxC) || in PerformMinMaxCombine()
17991 if (IsSignedSaturate(N, N0.getNode())) { in PerformMinMaxCombine()
18006 DAG.getNode(ARMISD::VQMOVNs, DL, HalfVT, DAG.getUNDEF(HalfVT), in PerformMinMaxCombine()
18008 SDValue Bitcast = DAG.getNode(ARMISD::VECTOR_REG_CAST, DL, VT, VQMOVN); in PerformMinMaxCombine()
18009 return DAG.getNode(ISD::SIGN_EXTEND_INREG, DL, VT, Bitcast, in PerformMinMaxCombine()
18025 if (!ISD::isConstantSplatVector(Min->getOperand(1).getNode(), MinC) || in PerformMinMaxCombine()
18047 DAG.getNode(ARMISD::VQMOVNu, DL, HalfVT, DAG.getUNDEF(HalfVT), N0, in PerformMinMaxCombine()
18049 SDValue Bitcast = DAG.getNode(ARMISD::VECTOR_REG_CAST, DL, VT, VQMOVN); in PerformMinMaxCombine()
18050 return DAG.getNode(ISD::AND, DL, VT, Bitcast, in PerformMinMaxCombine()
18136 X = DAG.getNode(ISD::SRL, dl, VT, X, in PerformCMOVToBFICombine()
18146 V = DAG.getNode(ARMISD::BFI, dl, VT, V, X, in PerformCMOVToBFICombine()
18274 SDValue NewBr = DAG.getNode(ISD::BR, SDLoc(Br), MVT::Other, NewBrOps); in PerformHWLoopCombine()
18280 SDValue Setup = DAG.getNode(ARMISD::WLSSETUP, dl, MVT::i32, Elements); in PerformHWLoopCombine()
18284 Res = DAG.getNode(ARMISD::WLS, dl, MVT::Other, Ops); in PerformHWLoopCombine()
18291 Res = DAG.getNode(ARMISD::WLS, dl, MVT::Other, Ops); in PerformHWLoopCombine()
18302 SDValue LoopDec = DAG.getNode(ARMISD::LOOP_DEC, dl, in PerformHWLoopCombine()
18304 DAG.ReplaceAllUsesWith(Int.getNode(), LoopDec.getNode()); in PerformHWLoopCombine()
18314 Chain = DAG.getNode(ISD::TokenFactor, dl, MVT::Other, in PerformHWLoopCombine()
18315 SDValue(LoopDec.getNode(), 1), Chain); in PerformHWLoopCombine()
18317 SDValue EndArgs[] = { Chain, SDValue(LoopDec.getNode(), 0), Target }; in PerformHWLoopCombine()
18318 return DAG.getNode(ARMISD::LE, dl, MVT::Other, EndArgs); in PerformHWLoopCombine()
18348 return DAG.getNode( in PerformBRCONDCombine()
18399 Res = DAG.getNode(ARMISD::CMOV, dl, VT, LHS, TrueVal, ARMcc, in PerformCMOVCombine()
18404 Res = DAG.getNode(ARMISD::CMOV, dl, VT, LHS, FalseVal, ARMcc, in PerformCMOVCombine()
18413 return DAG.getNode(ARMISD::CMOV, dl, VT, FalseVal, TrueVal, in PerformCMOVCombine()
18428 if (SDValue C = IsCMPZCSINC(N->getOperand(4).getNode(), Cond)) { in PerformCMOVCombine()
18431 return DAG.getNode(N->getOpcode(), SDLoc(N), MVT::i32, N->getOperand(0), in PerformCMOVCombine()
18445 SDValue Sub = DAG.getNode(ISD::SUB, dl, VT, LHS, RHS); in PerformCMOVCombine()
18446 Res = DAG.getNode(ISD::SRL, dl, VT, DAG.getNode(ISD::CTLZ, dl, VT, Sub), in PerformCMOVCombine()
18458 SDValue Sub = DAG.getNode(ISD::SUB, dl, VT, LHS, RHS); in PerformCMOVCombine()
18460 SDValue Neg = DAG.getNode(ISD::USUBO, dl, VTs, FalseVal, Sub); in PerformCMOVCombine()
18464 DAG.getNode(ISD::SUB, dl, MVT::i32, in PerformCMOVCombine()
18466 Res = DAG.getNode(ISD::UADDO_CARRY, dl, VTs, Sub, Neg, Carry); in PerformCMOVCombine()
18473 DAG.getNode(ARMISD::SUBS, dl, DAG.getVTList(VT, MVT::i32), LHS, RHS); in PerformCMOVCombine()
18476 Res = DAG.getNode(ARMISD::CMOV, dl, VT, Sub, TrueVal, ARMcc, in PerformCMOVCombine()
18487 DAG.getNode(ARMISD::SUBS, dl, DAG.getVTList(VT, MVT::i32), LHS, RHS); in PerformCMOVCombine()
18490 Res = DAG.getNode(ARMISD::CMOV, dl, VT, Sub, FalseVal, in PerformCMOVCombine()
18520 SDValue Subc = DAG.getNode(ISD::USUBO, dl, VTs, FalseVal, TrueVal); in PerformCMOVCombine()
18521 Res = DAG.getNode(ISD::USUBO_CARRY, dl, VTs, FalseVal, Subc, in PerformCMOVCombine()
18525 Res = DAG.getNode(ISD::SHL, dl, VT, Res, in PerformCMOVCombine()
18529 if (Res.getNode()) { in PerformCMOVCombine()
18533 Res = DAG.getNode(ISD::AssertZext, dl, MVT::i32, Res, in PerformCMOVCombine()
18536 Res = DAG.getNode(ISD::AssertZext, dl, MVT::i32, Res, in PerformCMOVCombine()
18539 Res = DAG.getNode(ISD::AssertZext, dl, MVT::i32, Res, in PerformCMOVCombine()
18557 return DAG.getNode(ARMISD::VDUP, SDLoc(N), DstVT, Src.getOperand(0)); in PerformBITCASTCombine()
18573 return DAG.getNode(ARMISD::VECTOR_REG_CAST, SDLoc(N), DstVT, Src); in PerformBITCASTCombine()
18598 return DAG.getNode(ARMISD::MVETRUNC, DL, VT, N->getOperand(0).getOperand(0), in PerformMVETruncCombine()
18607 auto *S0 = cast<ShuffleVectorSDNode>(N->getOperand(0).getNode()); in PerformMVETruncCombine()
18608 auto *S1 = cast<ShuffleVectorSDNode>(N->getOperand(1).getNode()); in PerformMVETruncCombine()
18617 return DAG.getNode( in PerformMVETruncCombine()
18619 DAG.getNode(ARMISD::VECTOR_REG_CAST, DL, VT, S0->getOperand(0)), in PerformMVETruncCombine()
18620 DAG.getNode(ARMISD::VECTOR_REG_CAST, DL, VT, S0->getOperand(1)), in PerformMVETruncCombine()
18623 return DAG.getNode( in PerformMVETruncCombine()
18625 DAG.getNode(ARMISD::VECTOR_REG_CAST, DL, VT, S0->getOperand(1)), in PerformMVETruncCombine()
18626 DAG.getNode(ARMISD::VECTOR_REG_CAST, DL, VT, S0->getOperand(0)), in PerformMVETruncCombine()
18643 SDValue Ext = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, DL, MVT::i32, O, in PerformMVETruncCombine()
18659 int SPFI = cast<FrameIndexSDNode>(StackPtr.getNode())->getIndex(); in PerformMVETruncCombine()
18669 SDValue Ptr = DAG.getNode( in PerformMVETruncCombine()
18679 SDValue Chain = DAG.getNode(ISD::TokenFactor, DL, MVT::Other, Chains); in PerformMVETruncCombine()
18689 LoadSDNode *LD = dyn_cast<LoadSDNode>(N0.getNode()); in PerformSplittingMVEEXTToWideningLoad()
18742 Chains.push_back(SDValue(NewLoad.getNode(), 1)); in PerformSplittingMVEEXTToWideningLoad()
18745 SDValue NewChain = DAG.getNode(ISD::TokenFactor, DL, MVT::Other, Chains); in PerformSplittingMVEEXTToWideningLoad()
18764 SDValue VVT = DAG.getNode(ARMISD::VECTOR_REG_CAST, DL, VT, V); in PerformMVEExtCombine()
18766 ? DAG.getNode(ISD::SIGN_EXTEND_INREG, DL, VT, VVT, in PerformMVEExtCombine()
18797 V0 = Extend(DAG.getNode(Rev, DL, SVN->getValueType(0), Op0)); in PerformMVEExtCombine()
18801 V0 = Extend(DAG.getNode(Rev, DL, SVN->getValueType(0), Op1)); in PerformMVEExtCombine()
18806 V1 = Extend(DAG.getNode(Rev, DL, SVN->getValueType(0), Op1)); in PerformMVEExtCombine()
18810 V1 = Extend(DAG.getNode(Rev, DL, SVN->getValueType(0), Op0)); in PerformMVEExtCombine()
18812 if (V0.getNode() != N || V1.getNode() != N) in PerformMVEExtCombine()
18827 int SPFI = cast<FrameIndexSDNode>(StackPtr.getNode())->getIndex(); in PerformMVEExtCombine()
18843 SDValue Ptr = DAG.getNode( in PerformMVEExtCombine()
19417 !ExtVal->use_begin()->isOnlyUserOf(ExtVal.getNode())) in isVectorLoadExtDesirable()
19944 Ptr.getNode(), VT, Alignment, isSEXTLoad, IsMasked, in getPreIndexedAddressParts()
19948 isLegal = getT2IndexedAddressParts(Ptr.getNode(), VT, isSEXTLoad, Base, in getPreIndexedAddressParts()
19951 isLegal = getARMIndexedAddressParts(Ptr.getNode(), VT, isSEXTLoad, Base, in getPreIndexedAddressParts()
20120 ConstantSDNode *Pos = cast<ConstantSDNode>(Op.getOperand(1).getNode()); in computeKnownBitsForTargetNode()
20222 SDValue NewOp = TLO.DAG.getNode(ISD::AND, DL, VT, Op.getOperand(0), NewC); in targetShrinkDemandedConstant()
20272 Op, TLO.DAG.getNode( in SimplifyDemandedBitsForTargetNode()
20647 if (Result.getNode()) { in LowerAsmOperandForConstraint()
20709 if (expandDIVREMByConstant(Op.getNode(), Result, MVT::i32, DAG)) { in LowerDivRem()
20711 DAG.getNode(ISD::BUILD_PAIR, dl, VT, Result[0], Result[1]); in LowerDivRem()
20713 DAG.getNode(ISD::BUILD_PAIR, dl, VT, Result[2], Result[3]); in LowerDivRem()
20714 return DAG.getNode(ISD::MERGE_VALUES, dl, Op->getVTList(), in LowerDivRem()
20733 SDValue Div = DAG.getNode(DivOpcode, dl, VT, Dividend, Divisor); in LowerDivRem()
20734 SDValue Mul = DAG.getNode(ISD::MUL, dl, VT, Div, Divisor); in LowerDivRem()
20735 SDValue Rem = DAG.getNode(ISD::SUB, dl, VT, Dividend, Mul); in LowerDivRem()
20738 return DAG.getNode(ISD::MERGE_VALUES, dl, DAG.getVTList(VT, VT), Values); in LowerDivRem()
20741 RTLIB::Libcall LC = getDivRemLibcall(Op.getNode(), in LowerDivRem()
20745 TargetLowering::ArgListTy Args = getDivRemArgList(Op.getNode(), in LowerDivRem()
20755 InChain = WinDBZCheckDenominator(DAG, Op.getNode(), InChain); in LowerDivRem()
20774 return DAG.getNode(ISD::BUILD_PAIR, SDLoc(N), N->getValueType(0), in LowerREM()
20815 SDNode *ResNode = CallResult.first.getNode(); in LowerREM()
20835 SP = DAG.getNode(ISD::SUB, DL, MVT::i32, SP, Size); in LowerDYNAMIC_STACKALLOC()
20838 DAG.getNode(ISD::AND, DL, MVT::i32, SP.getValue(0), in LowerDYNAMIC_STACKALLOC()
20845 SDValue Words = DAG.getNode(ISD::SRL, DL, MVT::i32, Size, in LowerDYNAMIC_STACKALLOC()
20853 Chain = DAG.getNode(ARMISD::WIN__CHKSTK, DL, NodeTys, Chain, Glue); in LowerDYNAMIC_STACKALLOC()
20881 SDValue Result = DAG.getNode(ISD::FP_EXTEND, in LowerFP_EXTEND()
20903 SrcVal = DAG.getNode(ISD::STRICT_FP_EXTEND, Loc, in LowerFP_EXTEND()
20907 SrcVal = DAG.getNode(ISD::FP_EXTEND, Loc, DstVT, SrcVal); in LowerFP_EXTEND()