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Searched refs:X86 (Results 1 – 25 of 226) sorted by relevance

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/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/X86/MCTargetDesc/
H A DX86InstPrinterCommon.cpp137 case X86::VPCMPBZrmi: case X86::VPCMPBZrri: in printVPCMPMnemonic()
145 case X86::VPCMPDZrmi: case X86::VPCMPDZrri: in printVPCMPMnemonic()
156 case X86::VPCMPQZrmi: case X86::VPCMPQZrri: in printVPCMPMnemonic()
222 case X86::CMPPDrmi: case X86::CMPPDrri: in printCMPMnemonic()
223 case X86::VCMPPDrmi: case X86::VCMPPDrri: in printCMPMnemonic()
237 case X86::CMPPSrmi: case X86::CMPPSrri: in printCMPMnemonic()
238 case X86::VCMPPSrmi: case X86::VCMPPSrri: in printCMPMnemonic()
252 case X86::CMPSDrm: case X86::CMPSDrr: in printCMPMnemonic()
254 case X86::VCMPSDrm: case X86::VCMPSDrr: in printCMPMnemonic()
262 case X86::CMPSSrm: case X86::CMPSSrr: in printCMPMnemonic()
[all …]
H A DX86ATTInstPrinter.cpp92 case X86::CMPPDrmi: case X86::CMPPDrri: in printVecCompareInstr()
93 case X86::CMPPSrmi: case X86::CMPPSrri: in printVecCompareInstr()
94 case X86::CMPSDrm: case X86::CMPSDrr: in printVecCompareInstr()
96 case X86::CMPSSrm: case X86::CMPSSrr: in printVecCompareInstr()
241 case X86::VPCOMBmi: case X86::VPCOMBri: in printVecCompareInstr()
242 case X86::VPCOMDmi: case X86::VPCOMDri: in printVecCompareInstr()
243 case X86::VPCOMQmi: case X86::VPCOMQri: in printVecCompareInstr()
244 case X86::VPCOMUBmi: case X86::VPCOMUBri: in printVecCompareInstr()
245 case X86::VPCOMUDmi: case X86::VPCOMUDri: in printVecCompareInstr()
246 case X86::VPCOMUQmi: case X86::VPCOMUQri: in printVecCompareInstr()
[all …]
H A DX86IntelInstPrinter.cpp72 case X86::CMPPDrmi: case X86::CMPPDrri: in printVecCompareInstr()
73 case X86::CMPPSrmi: case X86::CMPPSrri: in printVecCompareInstr()
74 case X86::CMPSDrm: case X86::CMPSDrr: in printVecCompareInstr()
76 case X86::CMPSSrm: case X86::CMPSSrr: in printVecCompareInstr()
220 case X86::VPCOMBmi: case X86::VPCOMBri: in printVecCompareInstr()
221 case X86::VPCOMDmi: case X86::VPCOMDri: in printVecCompareInstr()
222 case X86::VPCOMQmi: case X86::VPCOMQri: in printVecCompareInstr()
223 case X86::VPCOMUBmi: case X86::VPCOMUBri: in printVecCompareInstr()
224 case X86::VPCOMUDmi: case X86::VPCOMUDri: in printVecCompareInstr()
225 case X86::VPCOMUQmi: case X86::VPCOMUQri: in printVecCompareInstr()
[all …]
H A DX86BaseInfo.h25 namespace X86 {
1157 assert(X86::XMM15 - X86::XMM0 == 15 && in isXMMReg()
1159 assert(X86::XMM31 - X86::XMM16 == 15 && in isXMMReg()
1167 assert(X86::YMM15 - X86::YMM0 == 15 && in isYMMReg()
1169 assert(X86::YMM31 - X86::YMM16 == 15 && in isYMMReg()
1178 return RegNo >= X86::ZMM0 && RegNo <= X86::ZMM31; in isZMMReg()
1184 return RegNo >= X86::R16 && RegNo <= X86::R31WH; in isApxExtendedReg()
1190 if ((RegNo >= X86::XMM8 && RegNo <= X86::XMM15) || in isX86_64ExtendedReg()
1192 (RegNo >= X86::YMM8 && RegNo <= X86::YMM15) || in isX86_64ExtendedReg()
1194 (RegNo >= X86::ZMM8 && RegNo <= X86::ZMM31)) in isX86_64ExtendedReg()
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H A DX86MCTargetDesc.cpp132 assert(((siReg == X86::SI && MI.getOperand(0).getReg() == X86::DI) || in needsAddressSizeOverride()
133 (siReg == X86::ESI && MI.getOperand(0).getReg() == X86::EDI) || in needsAddressSizeOverride()
134 (siReg == X86::RSI && MI.getOperand(0).getReg() == X86::RDI)) && in needsAddressSizeOverride()
155 if (STI.hasFeature(X86::Is64Bit)) { in needsAddressSizeOverride()
159 if (STI.hasFeature(X86::Is32Bit)) { in needsAddressSizeOverride()
170 for (unsigned Reg = X86::NoRegister + 1; Reg < X86::NUM_TARGET_REGS; ++Reg) { in initLLVMToSEHAndCVRegMapping()
468 unsigned StackPtr = is64Bit ? X86::RSP : X86::ESP; in createX86MCAsmInfo()
474 unsigned InstPtr = is64Bit ? X86::RIP : X86::EIP; in createX86MCAsmInfo()
674 if (BaseReg.getReg() == X86::RIP) in evaluateMemoryOperandAddress()
764 return X86::NoRegister; in getX86SubSuperRegister()
[all …]
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/X86/
H A DX86InstrInfo.cpp89 X86::CATCHRET, (STI.is64Bit() ? X86::RET64 : X86::RET32)), in X86InstrInfo()
1144 RC = Opc != X86::LEA32r ? &X86::GR64RegClass : &X86::GR32RegClass; in classifyLEAReg()
1146 RC = Opc != X86::LEA32r ? &X86::GR64_NOSPRegClass : &X86::GR32_NOSPRegClass; in classifyLEAReg()
2349 get(X86::PFSUBRrr == Opc ? X86::PFSUBrr : X86::PFSUBRrr)); in commuteInstructionImpl()
3129 if (!(X86::isJCC(Opcode) || X86::isSETCC(Opcode) || X86::isCMOVCC(Opcode))) in getCondSrcNoFromDesc()
3162 X86::CondCode X86::GetOppositeBranchCondition(X86::CondCode CC) { in GetOppositeBranchCondition()
3236 X86::CondCode CC = X86::COND_INVALID; in getX86ConditionCode()
5191 X86::CondCode NewCC = X86::COND_INVALID; in optimizeCompareInstr()
5983 MIB->getOpcode() == X86::XOR64_FP ? X86::XOR64rr : X86::XOR32rr; in expandXorFP()
7561 if ((Opc == X86::MOVSSrm || Opc == X86::VMOVSSrm || Opc == X86::VMOVSSZrm || in isNonFoldablePartialRegisterLoad()
[all …]
H A DX86FixupInstTuning.cpp300 return ProcessUNPCKLPDrr(X86::PUNPCKLQDQrr, X86::SHUFPDrri); in processInstruction()
303 return ProcessUNPCKLPDrr(X86::VPUNPCKLQDQrr, X86::VSHUFPDrri); in processInstruction()
305 return ProcessUNPCKLPDrr(X86::VPUNPCKLQDQYrr, X86::VSHUFPDYrri); in processInstruction()
313 return ProcessUNPCKLPDrr(X86::VPUNPCKLQDQZrr, X86::VSHUFPDZrri); in processInstruction()
319 return ProcessUNPCKLPDrr(X86::VPUNPCKLQDQZrrk, X86::VSHUFPDZrrik); in processInstruction()
325 return ProcessUNPCKLPDrr(X86::VPUNPCKLQDQZrrkz, X86::VSHUFPDZrrikz); in processInstruction()
327 return ProcessUNPCKHPDrr(X86::PUNPCKHQDQrr, X86::SHUFPDrri); in processInstruction()
329 return ProcessUNPCKHPDrr(X86::VPUNPCKHQDQrr, X86::VSHUFPDrri); in processInstruction()
331 return ProcessUNPCKHPDrr(X86::VPUNPCKHQDQYrr, X86::VSHUFPDYrri); in processInstruction()
337 return ProcessUNPCKHPDrr(X86::VPUNPCKHQDQZrr, X86::VSHUFPDZrri); in processInstruction()
[all …]
H A DX86FloatingPoint.cpp469 if (Reg >= X86::FP0 && Reg <= X86::FP6 && isLive(Reg-X86::FP0)) { in processBasicBlock()
1277 { X86::ADD_Fp32 , X86::ADD_FST0r },
1278 { X86::ADD_Fp64 , X86::ADD_FST0r },
1279 { X86::ADD_Fp80 , X86::ADD_FST0r },
1280 { X86::DIV_Fp32 , X86::DIV_FST0r },
1281 { X86::DIV_Fp64 , X86::DIV_FST0r },
1282 { X86::DIV_Fp80 , X86::DIV_FST0r },
1283 { X86::MUL_Fp32 , X86::MUL_FST0r },
1284 { X86::MUL_Fp64 , X86::MUL_FST0r },
1285 { X86::MUL_Fp80 , X86::MUL_FST0r },
[all …]
H A DX86InstrFoldTables.cpp30 { X86::VANDNPDZ128rr, X86::VANDNPSZ128rmb, TB_BCAST_SS },
31 { X86::VANDNPDZ256rr, X86::VANDNPSZ256rmb, TB_BCAST_SS },
32 { X86::VANDNPDZrr, X86::VANDNPSZrmb, TB_BCAST_SS },
33 { X86::VANDNPSZ128rr, X86::VANDNPDZ128rmb, TB_BCAST_SD },
34 { X86::VANDNPSZ256rr, X86::VANDNPDZ256rmb, TB_BCAST_SD },
35 { X86::VANDNPSZrr, X86::VANDNPDZrmb, TB_BCAST_SD },
36 { X86::VANDPDZ128rr, X86::VANDPSZ128rmb, TB_BCAST_SS },
37 { X86::VANDPDZ256rr, X86::VANDPSZ256rmb, TB_BCAST_SS },
38 { X86::VANDPDZrr, X86::VANDPSZrmb, TB_BCAST_SS },
39 { X86::VANDPSZ128rr, X86::VANDPDZ128rmb, TB_BCAST_SD },
[all …]
H A DX86FixupVectorConstants.cpp269 case X86::MOVAPDrm: in processInstruction()
270 case X86::MOVAPSrm: in processInstruction()
271 case X86::MOVUPDrm: in processInstruction()
272 case X86::MOVUPSrm: in processInstruction()
311 0, 0, HasAVX2 ? X86::VPBROADCASTQrm : X86::VMOVDDUPrm, in processInstruction()
312 HasAVX2 ? X86::VPBROADCASTDrm : X86::VBROADCASTSSrm, in processInstruction()
318 0, HasAVX2 ? X86::VBROADCASTI128rm : X86::VBROADCASTF128rm, in processInstruction()
319 HasAVX2 ? X86::VPBROADCASTQYrm : X86::VBROADCASTSDYrm, in processInstruction()
320 HasAVX2 ? X86::VPBROADCASTDYrm : X86::VBROADCASTSSYrm, in processInstruction()
344 X86::VPBROADCASTQZrm, X86::VPBROADCASTDZrm, in processInstruction()
[all …]
H A DX86AvoidStoreForwardingBlocks.cpp134 return Opcode == X86::MOVUPSrm || Opcode == X86::MOVAPSrm || in isXMMLoadOpcode()
135 Opcode == X86::VMOVUPSrm || Opcode == X86::VMOVAPSrm || in isXMMLoadOpcode()
136 Opcode == X86::VMOVUPDrm || Opcode == X86::VMOVAPDrm || in isXMMLoadOpcode()
137 Opcode == X86::VMOVDQUrm || Opcode == X86::VMOVDQArm || in isXMMLoadOpcode()
144 return Opcode == X86::VMOVUPSYrm || Opcode == X86::VMOVAPSYrm || in isYMMLoadOpcode()
145 Opcode == X86::VMOVUPDYrm || Opcode == X86::VMOVAPDYrm || in isYMMLoadOpcode()
146 Opcode == X86::VMOVDQUYrm || Opcode == X86::VMOVDQAYrm || in isYMMLoadOpcode()
211 PBlock |= Opcode == X86::MOV64mr || Opcode == X86::MOV64mi32 || in isPotentialBlockingStoreInst()
212 Opcode == X86::MOV32mr || Opcode == X86::MOV32mi || in isPotentialBlockingStoreInst()
213 Opcode == X86::MOV16mr || Opcode == X86::MOV16mi || in isPotentialBlockingStoreInst()
[all …]
H A DX86MCInstLower.cpp325 return Subtarget.is64Bit() ? X86::RET64 : X86::RET32; in getRetOpcode()
432 case X86::MULX32Hrr: NewOpc = X86::MULX32rr; break; in Lower()
433 case X86::MULX32Hrm: NewOpc = X86::MULX32rm; break; in Lower()
434 case X86::MULX64Hrr: NewOpc = X86::MULX64rr; break; in Lower()
435 case X86::MULX64Hrm: NewOpc = X86::MULX64rm; break; in Lower()
466 unsigned ReturnReg = In64BitMode ? X86::RAX : X86::EAX; in Lower()
891 unsigned TempReg = AddrReg == X86::R10 ? X86::R11D : X86::R10D; in LowerKCFI_CHECK()
982 MCInstBuilder(X86::MOV32rr_REV).addReg(X86::EDI).addReg(X86::EDI), in LowerPATCHABLE_OP()
1108 const Register DestRegs[] = {X86::RDI, X86::RSI}; in LowerPATCHABLE_EVENT_CALL()
1206 const Register DestRegs[] = {X86::RDI, X86::RSI, X86::RDX}; in LowerPATCHABLE_TYPED_EVENT_CALL()
[all …]
H A DX86RegisterInfo.cpp70 BasePtr = Use64BitReg ? X86::RBX : X86::EBX; in X86RegisterInfo()
631 {X86::SIL, X86::DIL, X86::BPL, X86::SPL, in getReservedRegs()
632 X86::SIH, X86::DIH, X86::BPH, X86::SPH})); in getReservedRegs()
648 assert((X86::R15WH + 1 == X86 ::YMM0) && (X86::YMM15 + 1 == X86::K0) && in getNumSupportedRegs()
649 (X86::K6_K7 + 1 == X86::TMMCFG) && (X86::TMM7 + 1 == X86::R16) && in getNumSupportedRegs()
675 SmallVector<MCRegister>{X86::EAX, X86::ECX, X86::EDX}, in isArgumentRegister()
685 SmallVector<MCRegister>{X86::RDX, X86::RCX, X86::R8, X86::R9}, in isArgumentRegister()
695 llvm::any_of(SmallVector<MCRegister>{X86::XMM0, X86::XMM1, X86::XMM2, in isArgumentRegister()
696 X86::XMM3, X86::XMM4, X86::XMM5, in isArgumentRegister()
737 for (auto Reg : {X86::EFLAGS, X86::RIP, X86::EIP, X86::IP}) in adjustStackMapLiveOutMask()
[all …]
H A DX86ExpandPseudo.cpp107 BuildMI(*MBB, MBBI, DL, TII->get(X86::LEA64r), X86::R11) in INITIALIZE_PASS()
338 if (Op == X86::TAILJMPd_CC || Op == X86::TAILJMPd64_CC) { in ExpandMI()
391 unsigned RetOp = STI->is64Bit() ? X86::IRET64 : X86::IRET32; in ExpandMI()
587 case X86::PTCMMIMFP16PSV: Opc = X86::TCMMIMFP16PS; break; in ExpandMI()
588 case X86::PTCMMRLFP16PSV: Opc = X86::TCMMRLFP16PS; break; in ExpandMI()
589 case X86::PTDPBSSDV: Opc = X86::TDPBSSD; break; in ExpandMI()
590 case X86::PTDPBSUDV: Opc = X86::TDPBSUD; break; in ExpandMI()
591 case X86::PTDPBUSDV: Opc = X86::TDPBUSD; break; in ExpandMI()
592 case X86::PTDPBUUDV: Opc = X86::TDPBUUD; break; in ExpandMI()
593 case X86::PTDPBF16PSV: Opc = X86::TDPBF16PS; break; in ExpandMI()
[all …]
H A DX86FlagsCopyLowering.cpp327 case X86::CMOVBE_Fp32: case X86::CMOVBE_Fp64: case X86::CMOVBE_Fp80: in getCondFromFCMOV()
329 case X86::CMOVB_Fp32: case X86::CMOVB_Fp64: case X86::CMOVB_Fp80: in getCondFromFCMOV()
331 case X86::CMOVE_Fp32: case X86::CMOVE_Fp64: case X86::CMOVE_Fp80: in getCondFromFCMOV()
333 case X86::CMOVNBE_Fp32: case X86::CMOVNBE_Fp64: case X86::CMOVNBE_Fp80: in getCondFromFCMOV()
335 case X86::CMOVNB_Fp32: case X86::CMOVNB_Fp64: case X86::CMOVNB_Fp80: in getCondFromFCMOV()
337 case X86::CMOVNE_Fp32: case X86::CMOVNE_Fp64: case X86::CMOVNE_Fp80: in getCondFromFCMOV()
339 case X86::CMOVNP_Fp32: case X86::CMOVNP_Fp64: case X86::CMOVNP_Fp80: in getCondFromFCMOV()
341 case X86::CMOVP_Fp32: case X86::CMOVP_Fp64: case X86::CMOVP_Fp80: in getCondFromFCMOV()
780 X86::CondCode Cond = X86::COND_INVALID; in rewriteArithmetic()
868 case X86::CMOVB_Fp32: case X86::CMOVNB_Fp32: in rewriteFCMov()
[all …]
H A DX86DomainReassignment.cpp648 createReplacer(X86::NOT16r, X86::KNOTWrr); in initConverters()
649 createReplacer(X86::OR16rr, X86::KORWrr); in initConverters()
650 createReplacer(X86::AND16rr, X86::KANDWrr); in initConverters()
651 createReplacer(X86::XOR16rr, X86::KXORWrr); in initConverters()
672 createReplacer(X86::NOT32r, X86::KNOTDrr); in initConverters()
673 createReplacer(X86::NOT64r, X86::KNOTQrr); in initConverters()
675 createReplacer(X86::OR32rr, X86::KORDrr); in initConverters()
676 createReplacer(X86::OR64rr, X86::KORQrr); in initConverters()
694 createReplacer(X86::ADD8rr, X86::KADDBrr); in initConverters()
703 createReplacer(X86::NOT8r, X86::KNOTBrr); in initConverters()
[all …]
H A DX86FastISel.cpp2246 { X86::CMPSSrr, X86::ANDPSrr, X86::ANDNPSrr, X86::ORPSrr }, in X86FastEmitSSESelect()
2247 { X86::CMPSDrr, X86::ANDPDrr, X86::ANDNPDrr, X86::ORPDrr } in X86FastEmitSSESelect()
2896 { X86::INC8r, X86::INC16r, X86::INC32r, X86::INC64r }, in fastLowerIntrinsicCall()
2897 { X86::DEC8r, X86::DEC16r, X86::DEC32r, X86::DEC64r } in fastLowerIntrinsicCall()
2924 { X86::MUL8r, X86::MUL16r, X86::MUL32r, X86::MUL64r }; in fastLowerIntrinsicCall()
3149 X86::EDI, X86::ESI, X86::EDX, X86::ECX, X86::R8D, X86::R9D in fastLowerArguments()
3152 X86::RDI, X86::RSI, X86::RDX, X86::RCX, X86::R8 , X86::R9 in fastLowerArguments()
3155 X86::XMM0, X86::XMM1, X86::XMM2, X86::XMM3, in fastLowerArguments()
3156 X86::XMM4, X86::XMM5, X86::XMM6, X86::XMM7 in fastLowerArguments()
3491 X86::XMM0, X86::XMM1, X86::XMM2, X86::XMM3, in fastLowerCall()
[all …]
H A DX86CompressEVEX.cpp97 if (Reg >= X86::XMM16 && Reg <= X86::XMM31) in usesExtendedRegister()
100 if (Reg >= X86::YMM16 && Reg <= X86::YMM31) in usesExtendedRegister()
129 case X86::VALIGNDZ128rri: in performCustomAdjustments()
133 assert((NewOpc == X86::VPALIGNRrri || NewOpc == X86::VPALIGNRrmi) && in performCustomAdjustments()
136 (Opc == X86::VALIGNQZ128rri || Opc == X86::VALIGNQZ128rmi) ? 8 : 4; in performCustomAdjustments()
149 assert((NewOpc == X86::VPERM2F128rr || NewOpc == X86::VPERM2I128rr || in performCustomAdjustments()
150 NewOpc == X86::VPERM2F128rm || NewOpc == X86::VPERM2I128rm) && in performCustomAdjustments()
166 case X86::VRNDSCALESDZr: in performCustomAdjustments()
167 case X86::VRNDSCALESDZm: in performCustomAdjustments()
168 case X86::VRNDSCALESSZr: in performCustomAdjustments()
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H A DX86InsertWait.cpp60 case X86::FNINIT: in isX87ControlInstruction()
64 case X86::FNSTSWm: in isX87ControlInstruction()
65 case X86::FNCLEX: in isX87ControlInstruction()
66 case X86::FLDENVm: in isX87ControlInstruction()
69 case X86::FSAVEm: in isX87ControlInstruction()
72 case X86::FFREE: in isX87ControlInstruction()
73 case X86::FFREEP: in isX87ControlInstruction()
74 case X86::FNOP: in isX87ControlInstruction()
75 case X86::WAIT: in isX87ControlInstruction()
85 case X86::FNINIT: in isX87NonWaitingControlInstruction()
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H A DX86TargetTransformInfo.h42 X86::FeatureX86_64,
45 X86::FeatureNOPL,
46 X86::FeatureCX16,
47 X86::FeatureLAHFSAHF64,
55 X86::TuningFastBEXTR,
57 X86::TuningFastLZCNT,
65 X86::TuningLEAForSP,
66 X86::TuningLEAUsesAG,
81 X86::TuningSlowLEA,
84 X86::TuningSlowSHLD,
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H A DX86SpeculativeLoadHardening.cpp661 if (X86::getCondFromBranch(MI) == X86::COND_INVALID) { in collectBlockCondInfo()
790 X86::CondCode Cond = X86::getCondFromBranch(*CondBr); in tracePredStateThroughCFG()
791 X86::CondCode InvCond = X86::GetOppositeBranchCondition(Cond); in tracePredStateThroughCFG()
1005 case X86::JMP16m: in tracePredStateThroughIndirectBranches()
1007 case X86::JMP32m: in tracePredStateThroughIndirectBranches()
1009 case X86::JMP64m: in tracePredStateThroughIndirectBranches()
1875 &X86::GR8_NOREXRegClass, &X86::GR16_NOREXRegClass, in canHardenRegister()
1876 &X86::GR32_NOREXRegClass, &X86::GR64_NOREXRegClass}; in canHardenRegister()
1881 &X86::GR8RegClass, &X86::GR16RegClass, &X86::GR32RegClass, in canHardenRegister()
1913 unsigned SubRegImms[] = {X86::sub_8bit, X86::sub_16bit, X86::sub_32bit}; in hardenValueInRegister()
[all …]
H A DX86DynAllocaExpander.cpp113 case X86::PUSH32r: in isPushPop()
114 case X86::PUSH32rmm: in isPushPop()
115 case X86::PUSH32rmr: in isPushPop()
116 case X86::PUSH32i: in isPushPop()
117 case X86::PUSH64r: in isPushPop()
118 case X86::PUSH64rmm: in isPushPop()
121 case X86::POP32r: in isPushPop()
122 case X86::POP64r: in isPushPop()
224 unsigned RegA = Is64Bit ? X86::RAX : X86::EAX; in lower()
238 unsigned RegA = Is64Bit ? X86::RAX : X86::EAX; in lower()
[all …]
H A DX86FrameLowering.cpp109 return IsLP64 ? X86::SUB64ri32 : X86::SUB32ri; in getSUBriOpcode()
113 return IsLP64 ? X86::ADD64ri32 : X86::ADD32ri; in getADDriOpcode()
117 return IsLP64 ? X86::SUB64rr : X86::SUB32rr; in getSUBrrOpcode()
121 return IsLP64 ? X86::ADD64rr : X86::ADD32rr; in getADDrrOpcode()
125 return IsLP64 ? X86::AND64ri32 : X86::AND32ri; in getANDriOpcode()
129 return IsLP64 ? X86::LEA64r : X86::LEA32r; in getLEArOpcode()
172 return ST.hasPPX() ? X86::POP2P : X86::POP2; in getPOP2Opcode()
179 if (Reg == X86::RAX || Reg == X86::EAX || Reg == X86::AX || in isEAXLiveIn()
180 Reg == X86::AH || Reg == X86::AL) in isEAXLiveIn()
2508 if (Opc == X86::POP32r || Opc == X86::POP64r || Opc == X86::POPP64r || in emitEpilogue()
[all …]
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/X86/GISel/
H A DX86InstructionSelector.cpp1004 {X86::COND_E, X86::COND_NP, X86::AND8rr}, in selectFCmp()
1005 {X86::COND_NE, X86::COND_P, X86::OR8rr}}; in selectFCmp()
1628 {X86::IDIV8r, 0, X86::MOVSX16rr8, X86::AL, S}, // SDiv in selectMulDivRem()
1629 {X86::IDIV8r, 0, X86::MOVSX16rr8, X86::AH, S}, // SRem in selectMulDivRem()
1630 {X86::DIV8r, 0, X86::MOVZX16rr8, X86::AL, U}, // UDiv in selectMulDivRem()
1631 {X86::DIV8r, 0, X86::MOVZX16rr8, X86::AH, U}, // URem in selectMulDivRem()
1632 {X86::IMUL8r, 0, X86::MOVSX16rr8, X86::AL, S}, // Mul in selectMulDivRem()
1633 {X86::IMUL8r, 0, X86::MOVSX16rr8, X86::AH, S}, // SMulH in selectMulDivRem()
1634 {X86::MUL8r, 0, X86::MOVZX16rr8, X86::AH, U}, // UMulH in selectMulDivRem()
1640 {X86::IDIV16r, X86::CWD, Copy, X86::AX, S}, // SDiv in selectMulDivRem()
[all …]
/freebsd-14.2/contrib/llvm-project/llvm/lib/TargetParser/
H A DHost.cpp714 *Type = X86::INTEL_CORE2; in getIntelProcessorTypeAndSubtype()
723 *Type = X86::INTEL_CORE2; in getIntelProcessorTypeAndSubtype()
732 *Type = X86::INTEL_COREI7; in getIntelProcessorTypeAndSubtype()
740 *Type = X86::INTEL_COREI7; in getIntelProcessorTypeAndSubtype()
963 *Type = X86::INTEL_KNL; in getIntelProcessorTypeAndSubtype()
967 *Type = X86::INTEL_KNM; in getIntelProcessorTypeAndSubtype()
1110 *Type = X86::AMD_BTVER1; in getAMDProcessorTypeAndSubtype()
1114 *Type = X86::AMDFAM15H; in getAMDProcessorTypeAndSubtype()
1137 *Type = X86::AMD_BTVER2; in getAMDProcessorTypeAndSubtype()
1141 *Type = X86::AMDFAM17H; in getAMDProcessorTypeAndSubtype()
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