Lines Matching refs:X86
325 return Subtarget.is64Bit() ? X86::RET64 : X86::RET32; in getRetOpcode()
365 case X86::TAILJMPr: in convertTailJumpOpcode()
366 Opcode = X86::JMP32r; in convertTailJumpOpcode()
368 case X86::TAILJMPm: in convertTailJumpOpcode()
369 Opcode = X86::JMP32m; in convertTailJumpOpcode()
371 case X86::TAILJMPr64: in convertTailJumpOpcode()
372 Opcode = X86::JMP64r; in convertTailJumpOpcode()
374 case X86::TAILJMPm64: in convertTailJumpOpcode()
375 Opcode = X86::JMP64m; in convertTailJumpOpcode()
377 case X86::TAILJMPr64_REX: in convertTailJumpOpcode()
378 Opcode = X86::JMP64r_REX; in convertTailJumpOpcode()
380 case X86::TAILJMPm64_REX: in convertTailJumpOpcode()
381 Opcode = X86::JMP64m_REX; in convertTailJumpOpcode()
383 case X86::TAILJMPd: in convertTailJumpOpcode()
384 case X86::TAILJMPd64: in convertTailJumpOpcode()
385 Opcode = X86::JMP_1; in convertTailJumpOpcode()
387 case X86::TAILJMPd_CC: in convertTailJumpOpcode()
388 case X86::TAILJMPd64_CC: in convertTailJumpOpcode()
389 Opcode = X86::JCC_1; in convertTailJumpOpcode()
404 if (X86::optimizeInstFromVEX3ToVEX2(OutMI, MI->getDesc()) || in Lower()
405 X86::optimizeShiftRotateWithImmediateOne(OutMI) || in Lower()
406 X86::optimizeVPCMPWithImmediateOneOrSix(OutMI) || in Lower()
407 X86::optimizeMOVSX(OutMI) || X86::optimizeINCDEC(OutMI, In64BitMode) || in Lower()
408 X86::optimizeMOV(OutMI, In64BitMode) || in Lower()
409 X86::optimizeToFixedRegisterOrShortImmediateForm(OutMI)) in Lower()
414 case X86::LEA64_32r: in Lower()
415 case X86::LEA64r: in Lower()
416 case X86::LEA16r: in Lower()
417 case X86::LEA32r: in Lower()
419 assert(OutMI.getNumOperands() == 1 + X86::AddrNumOperands && in Lower()
421 assert(OutMI.getOperand(1 + X86::AddrSegmentReg).getReg() == 0 && in Lower()
424 case X86::MULX32Hrr: in Lower()
425 case X86::MULX32Hrm: in Lower()
426 case X86::MULX64Hrr: in Lower()
427 case X86::MULX64Hrm: { in Lower()
432 case X86::MULX32Hrr: NewOpc = X86::MULX32rr; break; in Lower()
433 case X86::MULX32Hrm: NewOpc = X86::MULX32rm; break; in Lower()
434 case X86::MULX64Hrr: NewOpc = X86::MULX64rr; break; in Lower()
435 case X86::MULX64Hrm: NewOpc = X86::MULX64rm; break; in Lower()
447 case X86::CALL64r: in Lower()
448 case X86::CALL64pcrel32: in Lower()
451 case X86::EH_RETURN: in Lower()
452 case X86::EH_RETURN64: { in Lower()
457 case X86::CLEANUPRET: { in Lower()
463 case X86::CATCHRET: { in Lower()
466 unsigned ReturnReg = In64BitMode ? X86::RAX : X86::EAX; in Lower()
474 case X86::TAILJMPr: in Lower()
475 case X86::TAILJMPr64: in Lower()
476 case X86::TAILJMPr64_REX: in Lower()
477 case X86::TAILJMPd: in Lower()
478 case X86::TAILJMPd64: in Lower()
482 case X86::TAILJMPd_CC: in Lower()
483 case X86::TAILJMPd64_CC: in Lower()
487 case X86::TAILJMPm: in Lower()
488 case X86::TAILJMPm64: in Lower()
489 case X86::TAILJMPm64_REX: in Lower()
490 assert(OutMI.getNumOperands() == X86::AddrNumOperands && in Lower()
494 case X86::MASKMOVDQU: in Lower()
495 case X86::VMASKMOVDQU: in Lower()
497 OutMI.setFlags(X86::IP_HAS_AD_SIZE); in Lower()
499 case X86::BSF16rm: in Lower()
500 case X86::BSF16rr: in Lower()
501 case X86::BSF32rm: in Lower()
502 case X86::BSF32rr: in Lower()
503 case X86::BSF64rm: in Lower()
504 case X86::BSF64rr: { in Lower()
509 const MachineOperand *FlagDef = MI->findRegisterDefOperand(X86::EFLAGS); in Lower()
511 OutMI.setFlags(X86::IP_HAS_REPEAT); in Lower()
522 bool Is64Bits = MI.getOpcode() != X86::TLS_addr32 && in LowerTlsAddr()
523 MI.getOpcode() != X86::TLS_base_addr32; in LowerTlsAddr()
524 bool Is64BitsLP64 = MI.getOpcode() == X86::TLS_addr64 || in LowerTlsAddr()
525 MI.getOpcode() == X86::TLS_base_addr64; in LowerTlsAddr()
530 case X86::TLS_addr32: in LowerTlsAddr()
531 case X86::TLS_addr64: in LowerTlsAddr()
532 case X86::TLS_addrX32: in LowerTlsAddr()
535 case X86::TLS_base_addr32: in LowerTlsAddr()
538 case X86::TLS_base_addr64: in LowerTlsAddr()
539 case X86::TLS_base_addrX32: in LowerTlsAddr()
560 EmitAndCountInstruction(MCInstBuilder(X86::DATA16_PREFIX)); in LowerTlsAddr()
561 EmitAndCountInstruction(MCInstBuilder(X86::LEA64r) in LowerTlsAddr()
562 .addReg(X86::RDI) in LowerTlsAddr()
563 .addReg(X86::RIP) in LowerTlsAddr()
571 EmitAndCountInstruction(MCInstBuilder(X86::DATA16_PREFIX)); in LowerTlsAddr()
572 EmitAndCountInstruction(MCInstBuilder(X86::DATA16_PREFIX)); in LowerTlsAddr()
573 EmitAndCountInstruction(MCInstBuilder(X86::REX64_PREFIX)); in LowerTlsAddr()
578 EmitAndCountInstruction(MCInstBuilder(X86::CALL64m) in LowerTlsAddr()
579 .addReg(X86::RIP) in LowerTlsAddr()
586 MCInstBuilder(X86::CALL64pcrel32) in LowerTlsAddr()
592 EmitAndCountInstruction(MCInstBuilder(X86::LEA32r) in LowerTlsAddr()
593 .addReg(X86::EAX) in LowerTlsAddr()
596 .addReg(X86::EBX) in LowerTlsAddr()
600 EmitAndCountInstruction(MCInstBuilder(X86::LEA32r) in LowerTlsAddr()
601 .addReg(X86::EAX) in LowerTlsAddr()
602 .addReg(X86::EBX) in LowerTlsAddr()
613 EmitAndCountInstruction(MCInstBuilder(X86::CALL32m) in LowerTlsAddr()
614 .addReg(X86::EBX) in LowerTlsAddr()
621 MCInstBuilder(X86::CALLpcrel32) in LowerTlsAddr()
639 if (Subtarget->hasFeature(X86::TuningFast7ByteNOP)) in emitNop()
641 else if (Subtarget->hasFeature(X86::TuningFast15ByteNOP)) in emitNop()
643 else if (Subtarget->hasFeature(X86::TuningFast11ByteNOP)) in emitNop()
656 BaseReg = X86::RAX; in emitNop()
664 Opc = X86::NOOP; in emitNop()
668 Opc = X86::XCHG16ar; in emitNop()
672 Opc = X86::NOOPL; in emitNop()
676 Opc = X86::NOOPL; in emitNop()
681 Opc = X86::NOOPL; in emitNop()
683 IndexReg = X86::RAX; in emitNop()
687 Opc = X86::NOOPW; in emitNop()
689 IndexReg = X86::RAX; in emitNop()
693 Opc = X86::NOOPL; in emitNop()
698 Opc = X86::NOOPL; in emitNop()
700 IndexReg = X86::RAX; in emitNop()
704 Opc = X86::NOOPW; in emitNop()
706 IndexReg = X86::RAX; in emitNop()
710 Opc = X86::NOOPW; in emitNop()
712 IndexReg = X86::RAX; in emitNop()
713 SegmentReg = X86::CS; in emitNop()
724 case X86::NOOP: in emitNop()
727 case X86::XCHG16ar: in emitNop()
728 OS.emitInstruction(MCInstBuilder(Opc).addReg(X86::AX).addReg(X86::AX), in emitNop()
731 case X86::NOOPL: in emitNop()
732 case X86::NOOPW: in emitNop()
776 CallOpcode = X86::CALL64pcrel32; in LowerSTATEPOINT()
784 CallOpcode = X86::CALL64pcrel32; in LowerSTATEPOINT()
796 CallOpcode = X86::CALL64r; in LowerSTATEPOINT()
842 if (DefRegister != X86::NoRegister) in LowerFAULTING_OP()
863 MCInstBuilder(Is64Bits ? X86::CALL64pcrel32 : X86::CALLpcrel32) in LowerFENTRY_CALL()
891 unsigned TempReg = AddrReg == X86::R10 ? X86::R11D : X86::R10D; in LowerKCFI_CHECK()
893 MCInstBuilder(X86::MOV32ri).addReg(TempReg).addImm(-MaskKCFIType(Type))); in LowerKCFI_CHECK()
894 EmitAndCountInstruction(MCInstBuilder(X86::ADD32rm) in LowerKCFI_CHECK()
895 .addReg(X86::NoRegister) in LowerKCFI_CHECK()
899 .addReg(X86::NoRegister) in LowerKCFI_CHECK()
901 .addReg(X86::NoRegister)); in LowerKCFI_CHECK()
905 MCInstBuilder(X86::JCC_1) in LowerKCFI_CHECK()
907 .addImm(X86::COND_E)); in LowerKCFI_CHECK()
911 EmitAndCountInstruction(MCInstBuilder(X86::TRAP)); in LowerKCFI_CHECK()
944 MCInstBuilder(X86::CALL64pcrel32) in LowerASAN_CHECK_MEMACCESS()
982 MCInstBuilder(X86::MOV32rr_REV).addReg(X86::EDI).addReg(X86::EDI), in LowerPATCHABLE_OP()
1054 MCInstBuilder(X86::MOV64ri).addReg(ScratchReg).addOperand(CalleeMCOp)); in LowerPATCHPOINT()
1059 EmitAndCountInstruction(MCInstBuilder(X86::CALL64r).addReg(ScratchReg)); in LowerPATCHPOINT()
1108 const Register DestRegs[] = {X86::RDI, X86::RSI}; in LowerPATCHABLE_EVENT_CALL()
1126 MCInstBuilder(X86::PUSH64r).addReg(DestRegs[I])); in LowerPATCHABLE_EVENT_CALL()
1139 MCInstBuilder(X86::MOV64rr).addReg(DestRegs[I]).addReg(SrcRegs[I])); in LowerPATCHABLE_EVENT_CALL()
1149 EmitAndCountInstruction(MCInstBuilder(X86::CALL64pcrel32) in LowerPATCHABLE_EVENT_CALL()
1155 EmitAndCountInstruction(MCInstBuilder(X86::POP64r).addReg(DestRegs[I])); in LowerPATCHABLE_EVENT_CALL()
1206 const Register DestRegs[] = {X86::RDI, X86::RSI, X86::RDX}; in LowerPATCHABLE_TYPED_EVENT_CALL()
1225 MCInstBuilder(X86::PUSH64r).addReg(DestRegs[I])); in LowerPATCHABLE_TYPED_EVENT_CALL()
1243 MCInstBuilder(X86::MOV64rr).addReg(DestRegs[I]).addReg(SrcRegs[I])); in LowerPATCHABLE_TYPED_EVENT_CALL()
1253 EmitAndCountInstruction(MCInstBuilder(X86::CALL64pcrel32) in LowerPATCHABLE_TYPED_EVENT_CALL()
1259 EmitAndCountInstruction(MCInstBuilder(X86::POP64r).addReg(DestRegs[I])); in LowerPATCHABLE_TYPED_EVENT_CALL()
1552 if (auto *C = X86::getConstantFromPool(*MI, 1)) { in printZeroUpperMove()
1571 if (auto *C = X86::getConstantFromPool(*MI, 1)) { in printBroadcast()
1597 case X86::SEH_PushReg: in EmitSEHInstruction()
1600 case X86::SEH_StackAlloc: in EmitSEHInstruction()
1603 case X86::SEH_StackAlign: in EmitSEHInstruction()
1606 case X86::SEH_SetFrame: in EmitSEHInstruction()
1611 case X86::SEH_EndPrologue: in EmitSEHInstruction()
1614 case X86::SEH_SaveReg: in EmitSEHInstruction()
1615 case X86::SEH_SaveXMM: in EmitSEHInstruction()
1616 case X86::SEH_PushFrame: in EmitSEHInstruction()
1627 case X86::SEH_PushReg: in EmitSEHInstruction()
1631 case X86::SEH_SaveReg: in EmitSEHInstruction()
1636 case X86::SEH_SaveXMM: in EmitSEHInstruction()
1641 case X86::SEH_StackAlloc: in EmitSEHInstruction()
1645 case X86::SEH_SetFrame: in EmitSEHInstruction()
1650 case X86::SEH_PushFrame: in EmitSEHInstruction()
1654 case X86::SEH_EndPrologue: in EmitSEHInstruction()
1664 if (Info.RegClass == X86::VR128RegClassID || in getRegisterWidth()
1665 Info.RegClass == X86::VR128XRegClassID) in getRegisterWidth()
1667 if (Info.RegClass == X86::VR256RegClassID || in getRegisterWidth()
1668 Info.RegClass == X86::VR256XRegClassID) in getRegisterWidth()
1670 if (Info.RegClass == X86::VR512RegClassID) in getRegisterWidth()
1681 case X86::PSHUFBrm: in addConstantComments()
1682 case X86::VPSHUFBrm: in addConstantComments()
1683 case X86::VPSHUFBYrm: in addConstantComments()
1684 case X86::VPSHUFBZ128rm: in addConstantComments()
1685 case X86::VPSHUFBZ128rmk: in addConstantComments()
1686 case X86::VPSHUFBZ128rmkz: in addConstantComments()
1687 case X86::VPSHUFBZ256rm: in addConstantComments()
1688 case X86::VPSHUFBZ256rmk: in addConstantComments()
1689 case X86::VPSHUFBZ256rmkz: in addConstantComments()
1690 case X86::VPSHUFBZrm: in addConstantComments()
1691 case X86::VPSHUFBZrmk: in addConstantComments()
1692 case X86::VPSHUFBZrmkz: { in addConstantComments()
1703 if (auto *C = X86::getConstantFromPool(*MI, SrcIdx + 1)) { in addConstantComments()
1713 case X86::VPERMILPSrm: in addConstantComments()
1714 case X86::VPERMILPSYrm: in addConstantComments()
1715 case X86::VPERMILPSZ128rm: in addConstantComments()
1716 case X86::VPERMILPSZ128rmk: in addConstantComments()
1717 case X86::VPERMILPSZ128rmkz: in addConstantComments()
1718 case X86::VPERMILPSZ256rm: in addConstantComments()
1719 case X86::VPERMILPSZ256rmk: in addConstantComments()
1720 case X86::VPERMILPSZ256rmkz: in addConstantComments()
1721 case X86::VPERMILPSZrm: in addConstantComments()
1722 case X86::VPERMILPSZrmk: in addConstantComments()
1723 case X86::VPERMILPSZrmkz: in addConstantComments()
1724 case X86::VPERMILPDrm: in addConstantComments()
1725 case X86::VPERMILPDYrm: in addConstantComments()
1726 case X86::VPERMILPDZ128rm: in addConstantComments()
1727 case X86::VPERMILPDZ128rmk: in addConstantComments()
1728 case X86::VPERMILPDZ128rmkz: in addConstantComments()
1729 case X86::VPERMILPDZ256rm: in addConstantComments()
1730 case X86::VPERMILPDZ256rmk: in addConstantComments()
1731 case X86::VPERMILPDZ256rmkz: in addConstantComments()
1732 case X86::VPERMILPDZrm: in addConstantComments()
1733 case X86::VPERMILPDZrmk: in addConstantComments()
1734 case X86::VPERMILPDZrmkz: { in addConstantComments()
1738 case X86::VPERMILPSrm: in addConstantComments()
1739 case X86::VPERMILPSYrm: in addConstantComments()
1740 case X86::VPERMILPSZ128rm: in addConstantComments()
1741 case X86::VPERMILPSZ256rm: in addConstantComments()
1742 case X86::VPERMILPSZrm: in addConstantComments()
1743 case X86::VPERMILPSZ128rmkz: in addConstantComments()
1744 case X86::VPERMILPSZ256rmkz: in addConstantComments()
1745 case X86::VPERMILPSZrmkz: in addConstantComments()
1746 case X86::VPERMILPSZ128rmk: in addConstantComments()
1747 case X86::VPERMILPSZ256rmk: in addConstantComments()
1748 case X86::VPERMILPSZrmk: in addConstantComments()
1751 case X86::VPERMILPDrm: in addConstantComments()
1752 case X86::VPERMILPDYrm: in addConstantComments()
1753 case X86::VPERMILPDZ128rm: in addConstantComments()
1754 case X86::VPERMILPDZ256rm: in addConstantComments()
1755 case X86::VPERMILPDZrm: in addConstantComments()
1756 case X86::VPERMILPDZ128rmkz: in addConstantComments()
1757 case X86::VPERMILPDZ256rmkz: in addConstantComments()
1758 case X86::VPERMILPDZrmkz: in addConstantComments()
1759 case X86::VPERMILPDZ128rmk: in addConstantComments()
1760 case X86::VPERMILPDZ256rmk: in addConstantComments()
1761 case X86::VPERMILPDZrmk: in addConstantComments()
1776 if (auto *C = X86::getConstantFromPool(*MI, SrcIdx + 1)) { in addConstantComments()
1786 case X86::VPERMIL2PDrm: in addConstantComments()
1787 case X86::VPERMIL2PSrm: in addConstantComments()
1788 case X86::VPERMIL2PDYrm: in addConstantComments()
1789 case X86::VPERMIL2PSYrm: { in addConstantComments()
1790 assert(MI->getNumOperands() >= (3 + X86::AddrNumOperands + 1) && in addConstantComments()
1800 case X86::VPERMIL2PSrm: case X86::VPERMIL2PSYrm: ElSize = 32; break; in addConstantComments()
1801 case X86::VPERMIL2PDrm: case X86::VPERMIL2PDYrm: ElSize = 64; break; in addConstantComments()
1804 if (auto *C = X86::getConstantFromPool(*MI, 3)) { in addConstantComments()
1814 case X86::VPPERMrrm: { in addConstantComments()
1815 if (auto *C = X86::getConstantFromPool(*MI, 3)) { in addConstantComments()
1825 case X86::MMX_MOVQ64rm: { in addConstantComments()
1826 if (auto *C = X86::getConstantFromPool(*MI, 1)) { in addConstantComments()
1839 case X86::MOVSDrm: in addConstantComments()
1840 case X86::VMOVSDrm: in addConstantComments()
1841 case X86::VMOVSDZrm: in addConstantComments()
1842 case X86::MOVSDrm_alt: in addConstantComments()
1843 case X86::VMOVSDrm_alt: in addConstantComments()
1844 case X86::VMOVSDZrm_alt: in addConstantComments()
1845 case X86::MOVQI2PQIrm: in addConstantComments()
1846 case X86::VMOVQI2PQIrm: in addConstantComments()
1847 case X86::VMOVQI2PQIZrm: in addConstantComments()
1851 case X86::MOVSSrm: in addConstantComments()
1852 case X86::VMOVSSrm: in addConstantComments()
1853 case X86::VMOVSSZrm: in addConstantComments()
1854 case X86::MOVSSrm_alt: in addConstantComments()
1855 case X86::VMOVSSrm_alt: in addConstantComments()
1856 case X86::VMOVSSZrm_alt: in addConstantComments()
1857 case X86::MOVDI2PDIrm: in addConstantComments()
1858 case X86::VMOVDI2PDIrm: in addConstantComments()
1859 case X86::VMOVDI2PDIZrm: in addConstantComments()
1864 case X86::Prefix##MOVAPD##Suffix##rm: \ in addConstantComments()
1865 case X86::Prefix##MOVAPS##Suffix##rm: \ in addConstantComments()
1866 case X86::Prefix##MOVUPD##Suffix##rm: \ in addConstantComments()
1867 case X86::Prefix##MOVUPS##Suffix##rm: \ in addConstantComments()
1868 case X86::Prefix##MOVDQA##Suffix##rm: \ in addConstantComments()
1869 case X86::Prefix##MOVDQU##Suffix##rm: in addConstantComments()
1872 case X86::VMOVDQA64##Suffix##rm: \ in addConstantComments()
1873 case X86::VMOVDQA32##Suffix##rm: \ in addConstantComments()
1874 case X86::VMOVDQU64##Suffix##rm: \ in addConstantComments()
1875 case X86::VMOVDQU32##Suffix##rm: \ in addConstantComments()
1876 case X86::VMOVDQU16##Suffix##rm: \ in addConstantComments()
1877 case X86::VMOVDQU8##Suffix##rm: \ in addConstantComments()
1878 case X86::VMOVAPS##Suffix##rm: \ in addConstantComments()
1879 case X86::VMOVAPD##Suffix##rm: \ in addConstantComments()
1880 case X86::VMOVUPS##Suffix##rm: \ in addConstantComments()
1881 case X86::VMOVUPD##Suffix##rm: in addConstantComments()
1906 case X86::VBROADCASTF128rm: in addConstantComments()
1907 case X86::VBROADCASTI128rm: in addConstantComments()
1908 case X86::VBROADCASTF32X4Z256rm: in addConstantComments()
1909 case X86::VBROADCASTF64X2Z128rm: in addConstantComments()
1910 case X86::VBROADCASTI32X4Z256rm: in addConstantComments()
1911 case X86::VBROADCASTI64X2Z128rm: in addConstantComments()
1914 case X86::VBROADCASTF32X4rm: in addConstantComments()
1915 case X86::VBROADCASTF64X2rm: in addConstantComments()
1916 case X86::VBROADCASTI32X4rm: in addConstantComments()
1917 case X86::VBROADCASTI64X2rm: in addConstantComments()
1920 case X86::VBROADCASTF32X8rm: in addConstantComments()
1921 case X86::VBROADCASTF64X4rm: in addConstantComments()
1922 case X86::VBROADCASTI32X8rm: in addConstantComments()
1923 case X86::VBROADCASTI64X4rm: in addConstantComments()
1929 case X86::MOVDDUPrm: in addConstantComments()
1930 case X86::VMOVDDUPrm: in addConstantComments()
1931 case X86::VMOVDDUPZ128rm: in addConstantComments()
1932 case X86::VPBROADCASTQrm: in addConstantComments()
1933 case X86::VPBROADCASTQZ128rm: in addConstantComments()
1936 case X86::VBROADCASTSDYrm: in addConstantComments()
1937 case X86::VBROADCASTSDZ256rm: in addConstantComments()
1938 case X86::VPBROADCASTQYrm: in addConstantComments()
1939 case X86::VPBROADCASTQZ256rm: in addConstantComments()
1942 case X86::VBROADCASTSDZrm: in addConstantComments()
1943 case X86::VPBROADCASTQZrm: in addConstantComments()
1946 case X86::VBROADCASTSSrm: in addConstantComments()
1947 case X86::VBROADCASTSSZ128rm: in addConstantComments()
1948 case X86::VPBROADCASTDrm: in addConstantComments()
1949 case X86::VPBROADCASTDZ128rm: in addConstantComments()
1952 case X86::VBROADCASTSSYrm: in addConstantComments()
1953 case X86::VBROADCASTSSZ256rm: in addConstantComments()
1954 case X86::VPBROADCASTDYrm: in addConstantComments()
1955 case X86::VPBROADCASTDZ256rm: in addConstantComments()
1958 case X86::VBROADCASTSSZrm: in addConstantComments()
1959 case X86::VPBROADCASTDZrm: in addConstantComments()
1962 case X86::VPBROADCASTWrm: in addConstantComments()
1963 case X86::VPBROADCASTWZ128rm: in addConstantComments()
1966 case X86::VPBROADCASTWYrm: in addConstantComments()
1967 case X86::VPBROADCASTWZ256rm: in addConstantComments()
1970 case X86::VPBROADCASTWZrm: in addConstantComments()
1973 case X86::VPBROADCASTBrm: in addConstantComments()
1974 case X86::VPBROADCASTBZ128rm: in addConstantComments()
1977 case X86::VPBROADCASTBYrm: in addConstantComments()
1978 case X86::VPBROADCASTBZ256rm: in addConstantComments()
1981 case X86::VPBROADCASTBZrm: in addConstantComments()
1996 if (MI->getOpcode() == X86::OR64rm) { in emitInstruction()
2011 if (MI->getAsmPrinterFlags() & X86::AC_EVEX_2_LEGACY) in emitInstruction()
2013 else if (MI->getAsmPrinterFlags() & X86::AC_EVEX_2_VEX) in emitInstruction()
2015 else if (MI->getAsmPrinterFlags() & X86::AC_EVEX_2_EVEX) in emitInstruction()
2023 case X86::EH_RETURN: in emitInstruction()
2024 case X86::EH_RETURN64: { in emitInstruction()
2031 case X86::CLEANUPRET: { in emitInstruction()
2037 case X86::CATCHRET: { in emitInstruction()
2043 case X86::ENDBR32: in emitInstruction()
2044 case X86::ENDBR64: { in emitInstruction()
2062 case X86::TAILJMPd64: in emitInstruction()
2063 if (IndCSPrefix && MI->hasRegisterImplicitUseOperand(X86::R11)) in emitInstruction()
2064 EmitAndCountInstruction(MCInstBuilder(X86::CS_PREFIX)); in emitInstruction()
2066 case X86::TAILJMPr: in emitInstruction()
2067 case X86::TAILJMPm: in emitInstruction()
2068 case X86::TAILJMPd: in emitInstruction()
2069 case X86::TAILJMPd_CC: in emitInstruction()
2070 case X86::TAILJMPr64: in emitInstruction()
2071 case X86::TAILJMPm64: in emitInstruction()
2072 case X86::TAILJMPd64_CC: in emitInstruction()
2073 case X86::TAILJMPr64_REX: in emitInstruction()
2074 case X86::TAILJMPm64_REX: in emitInstruction()
2079 case X86::TLS_addr32: in emitInstruction()
2080 case X86::TLS_addr64: in emitInstruction()
2081 case X86::TLS_addrX32: in emitInstruction()
2082 case X86::TLS_base_addr32: in emitInstruction()
2083 case X86::TLS_base_addr64: in emitInstruction()
2084 case X86::TLS_base_addrX32: in emitInstruction()
2087 case X86::MOVPC32r: { in emitInstruction()
2099 MCInstBuilder(X86::CALLpcrel32) in emitInstruction()
2122 MCInstBuilder(X86::POP32r).addReg(MI->getOperand(0).getReg())); in emitInstruction()
2130 case X86::ADD32ri: { in emitInstruction()
2156 EmitAndCountInstruction(MCInstBuilder(X86::ADD32ri) in emitInstruction()
2195 case X86::MORESTACK_RET: in emitInstruction()
2199 case X86::KCFI_CHECK: in emitInstruction()
2202 case X86::ASAN_CHECK_MEMACCESS: in emitInstruction()
2205 case X86::MORESTACK_RET_RESTORE_R10: in emitInstruction()
2209 MCInstBuilder(X86::MOV64rr).addReg(X86::R10).addReg(X86::RAX)); in emitInstruction()
2212 case X86::SEH_PushReg: in emitInstruction()
2213 case X86::SEH_SaveReg: in emitInstruction()
2214 case X86::SEH_SaveXMM: in emitInstruction()
2215 case X86::SEH_StackAlloc: in emitInstruction()
2216 case X86::SEH_StackAlign: in emitInstruction()
2217 case X86::SEH_SetFrame: in emitInstruction()
2218 case X86::SEH_PushFrame: in emitInstruction()
2219 case X86::SEH_EndPrologue: in emitInstruction()
2223 case X86::SEH_Epilogue: { in emitInstruction()
2235 EmitAndCountInstruction(MCInstBuilder(X86::NOOP)); in emitInstruction()
2241 case X86::UBSAN_UD1: in emitInstruction()
2242 EmitAndCountInstruction(MCInstBuilder(X86::UD1Lm) in emitInstruction()
2243 .addReg(X86::EAX) in emitInstruction()
2244 .addReg(X86::EAX) in emitInstruction()
2246 .addReg(X86::NoRegister) in emitInstruction()
2248 .addReg(X86::NoRegister)); in emitInstruction()
2250 case X86::CALL64pcrel32: in emitInstruction()
2251 if (IndCSPrefix && MI->hasRegisterImplicitUseOperand(X86::R11)) in emitInstruction()
2252 EmitAndCountInstruction(MCInstBuilder(X86::CS_PREFIX)); in emitInstruction()