109   return IsLP64 ? X86::SUB64ri32 : X86::SUB32ri;  in getSUBriOpcode()
113   return IsLP64 ? X86::ADD64ri32 : X86::ADD32ri;  in getADDriOpcode()
117   return IsLP64 ? X86::SUB64rr : X86::SUB32rr;  in getSUBrrOpcode()
121   return IsLP64 ? X86::ADD64rr : X86::ADD32rr;  in getADDrrOpcode()
125   return IsLP64 ? X86::AND64ri32 : X86::AND32ri;  in getANDriOpcode()
129   return IsLP64 ? X86::LEA64r : X86::LEA32r;  in getLEArOpcode()
135       return X86::MOV32ri64;  in getMOVriOpcode()
137       return X86::MOV64ri32;  in getMOVriOpcode()
138     return X86::MOV64ri;  in getMOVriOpcode()
140   return X86::MOV32ri;  in getMOVriOpcode()
161   return ST.is64Bit() ? (ST.hasPPX() ? X86::PUSHP64r : X86::PUSH64r)  in getPUSHOpcode()
162                       : X86::PUSH32r;  in getPUSHOpcode()
165   return ST.is64Bit() ? (ST.hasPPX() ? X86::POPP64r : X86::POP64r)  in getPOPOpcode()
166                       : X86::POP32r;  in getPOPOpcode()
169   return ST.hasPPX() ? X86::PUSH2P : X86::PUSH2;  in getPUSH2Opcode()
172   return ST.hasPPX() ? X86::POP2P : X86::POP2;  in getPOP2Opcode()
179     if (Reg == X86::RAX || Reg == X86::EAX || Reg == X86::AX ||  in isEAXLiveIn()
180         Reg == X86::AH || Reg == X86::AL)  in isEAXLiveIn()
199       if (Reg != X86::EFLAGS)  in flagsNeedToBePreservedBeforeTheTerminators()
220     if (Succ->isLiveIn(X86::EFLAGS))  in flagsNeedToBePreservedBeforeTheTerminators()
250     BuildMI(MBB, MBBI, DL, TII.get(X86::STACKALLOC_W_PROBING)).addImm(Offset);  in emitSPUpdate()
256     unsigned Rax = (unsigned)(Is64Bit ? X86::RAX : X86::EAX);  in emitSPUpdate()
283       BuildMI(MBB, MBBI, DL, TII.get(X86::PUSH64r))  in emitSPUpdate()
295       MachineInstr *MI = BuildMI(MBB, MBBI, DL, TII.get(X86::ADD64rr), Rax)  in emitSPUpdate()
301           BuildMI(MBB, MBBI, DL, TII.get(X86::XCHG64rm), Rax).addReg(Rax),  in emitSPUpdate()
304       addRegOffset(BuildMI(MBB, MBBI, DL, TII.get(X86::MOV64rm), StackPtr),  in emitSPUpdate()
315       unsigned Reg = isSub ? (unsigned)(Is64Bit ? X86::RAX : X86::EAX)  in emitSPUpdate()
318         unsigned Opc = isSub ? (Is64Bit ? X86::PUSH64r : X86::PUSH32r)  in emitSPUpdate()
319                              : (Is64Bit ? X86::POP64r : X86::POP32r);  in emitSPUpdate()
348     UseLEA = STI.useLeaForSP() || MBB.isLiveIn(X86::EFLAGS);  in BuildStackAdjustment()
410   if ((Opc == X86::ADD64ri32 || Opc == X86::ADD32ri) &&  in mergeSPUpdates()
414   } else if ((Opc == X86::LEA32r || Opc == X86::LEA64_32r) &&  in mergeSPUpdates()
418              PI->getOperand(3).getReg() == X86::NoRegister &&  in mergeSPUpdates()
419              PI->getOperand(5).getReg() == X86::NoRegister) {  in mergeSPUpdates()
422   } else if ((Opc == X86::SUB64ri32 || Opc == X86::SUB32ri) &&  in mergeSPUpdates()
575     if (!X86::RFP80RegClass.contains(Reg))  in emitZeroCallUsedRegs()
580       BuildMI(MBB, MBBI, DL, TII.get(X86::LD_F0));  in emitZeroCallUsedRegs()
583       BuildMI(MBB, MBBI, DL, TII.get(X86::ST_FPrr)).addReg(X86::ST0);  in emitZeroCallUsedRegs()
611       BuildMI(MBB, MBBI, DL, TII.get(X86::STACKALLOC_W_PROBING))  in emitStackProbe()
628     return MI.getOpcode() == X86::STACKALLOC_W_PROBING;  in inlineStackProbe()
687   const unsigned MovMIOpc = Is64Bit ? X86::MOV64mi32 : X86::MOV32mi;  in emitStackProbeInlineGenericBlock()
741     unsigned Reg = Is64Bit ? X86::RAX : X86::EAX;  in emitStackProbeInlineGenericBlock()
742     unsigned Opc = Is64Bit ? X86::PUSH64r : X86::PUSH32r;  in emitStackProbeInlineGenericBlock()
760   assert(MBB.computeRegisterLiveness(TRI, X86::EFLAGS, MBBI) !=  in emitStackProbeInlineGenericLoop()
768   const unsigned MovMIOpc = Is64Bit ? X86::MOV64mi32 : X86::MOV32mi;  in emitStackProbeInlineGenericLoop()
798   Register FinalStackProbed = Uses64BitFramePtr ? X86::R11  in emitStackProbeInlineGenericLoop()
799                               : Is64Bit         ? X86::R11D  in emitStackProbeInlineGenericLoop()
800                                                 : X86::EAX;  in emitStackProbeInlineGenericLoop()
846   BuildMI(testMBB, DL, TII.get(Uses64BitFramePtr ? X86::CMP64rr : X86::CMP32rr))  in emitStackProbeInlineGenericLoop()
852   BuildMI(testMBB, DL, TII.get(X86::JCC_1))  in emitStackProbeInlineGenericLoop()
854       .addImm(X86::COND_NE)  in emitStackProbeInlineGenericLoop()
903   assert(MBB.computeRegisterLiveness(TRI, X86::EFLAGS, MBBI) !=  in emitStackProbeInlineWindowsCoreCLR64()
957   const TargetRegisterClass *RegClass = &X86::GR64RegClass;  in emitStackProbeInlineWindowsCoreCLR64()
959       SizeReg = InProlog ? X86::RAX : MRI.createVirtualRegister(RegClass),  in emitStackProbeInlineWindowsCoreCLR64()
960       ZeroReg = InProlog ? X86::RCX : MRI.createVirtualRegister(RegClass),  in emitStackProbeInlineWindowsCoreCLR64()
961       CopyReg = InProlog ? X86::RDX : MRI.createVirtualRegister(RegClass),  in emitStackProbeInlineWindowsCoreCLR64()
962       TestReg = InProlog ? X86::RDX : MRI.createVirtualRegister(RegClass),  in emitStackProbeInlineWindowsCoreCLR64()
963       FinalReg = InProlog ? X86::RDX : MRI.createVirtualRegister(RegClass),  in emitStackProbeInlineWindowsCoreCLR64()
964       RoundedReg = InProlog ? X86::RDX : MRI.createVirtualRegister(RegClass),  in emitStackProbeInlineWindowsCoreCLR64()
965       LimitReg = InProlog ? X86::RCX : MRI.createVirtualRegister(RegClass),  in emitStackProbeInlineWindowsCoreCLR64()
966       JoinReg = InProlog ? X86::RCX : MRI.createVirtualRegister(RegClass),  in emitStackProbeInlineWindowsCoreCLR64()
967       ProbeReg = InProlog ? X86::RCX : MRI.createVirtualRegister(RegClass);  in emitStackProbeInlineWindowsCoreCLR64()
985     const bool IsRCXLiveIn = MBB.isLiveIn(X86::RCX);  in emitStackProbeInlineWindowsCoreCLR64()
986     const bool IsRDXLiveIn = MBB.isLiveIn(X86::RDX);  in emitStackProbeInlineWindowsCoreCLR64()
998       addRegOffset(BuildMI(&MBB, DL, TII.get(X86::MOV64mr)), X86::RSP, false,  in emitStackProbeInlineWindowsCoreCLR64()
1000           .addReg(X86::RCX);  in emitStackProbeInlineWindowsCoreCLR64()
1002       addRegOffset(BuildMI(&MBB, DL, TII.get(X86::MOV64mr)), X86::RSP, false,  in emitStackProbeInlineWindowsCoreCLR64()
1004           .addReg(X86::RDX);  in emitStackProbeInlineWindowsCoreCLR64()
1007     BuildMI(&MBB, DL, TII.get(X86::MOV64rr), SizeReg).addReg(X86::RAX);  in emitStackProbeInlineWindowsCoreCLR64()
1012   BuildMI(&MBB, DL, TII.get(X86::XOR64rr), ZeroReg)  in emitStackProbeInlineWindowsCoreCLR64()
1015   BuildMI(&MBB, DL, TII.get(X86::MOV64rr), CopyReg).addReg(X86::RSP);  in emitStackProbeInlineWindowsCoreCLR64()
1016   BuildMI(&MBB, DL, TII.get(X86::SUB64rr), TestReg)  in emitStackProbeInlineWindowsCoreCLR64()
1019   BuildMI(&MBB, DL, TII.get(X86::CMOV64rr), FinalReg)  in emitStackProbeInlineWindowsCoreCLR64()
1022       .addImm(X86::COND_B);  in emitStackProbeInlineWindowsCoreCLR64()
1031   BuildMI(&MBB, DL, TII.get(X86::MOV64rm), LimitReg)  in emitStackProbeInlineWindowsCoreCLR64()
1036       .addReg(X86::GS);  in emitStackProbeInlineWindowsCoreCLR64()
1037   BuildMI(&MBB, DL, TII.get(X86::CMP64rr)).addReg(FinalReg).addReg(LimitReg);  in emitStackProbeInlineWindowsCoreCLR64()
1039   BuildMI(&MBB, DL, TII.get(X86::JCC_1))  in emitStackProbeInlineWindowsCoreCLR64()
1041       .addImm(X86::COND_AE);  in emitStackProbeInlineWindowsCoreCLR64()
1045   BuildMI(RoundMBB, DL, TII.get(X86::AND64ri32), RoundedReg)  in emitStackProbeInlineWindowsCoreCLR64()
1048   BuildMI(RoundMBB, DL, TII.get(X86::JMP_1)).addMBB(LoopMBB);  in emitStackProbeInlineWindowsCoreCLR64()
1054     BuildMI(LoopMBB, DL, TII.get(X86::PHI), JoinReg)  in emitStackProbeInlineWindowsCoreCLR64()
1062   addRegOffset(BuildMI(LoopMBB, DL, TII.get(X86::LEA64r), ProbeReg), JoinReg,  in emitStackProbeInlineWindowsCoreCLR64()
1066   BuildMI(LoopMBB, DL, TII.get(X86::MOV8mi))  in emitStackProbeInlineWindowsCoreCLR64()
1075   BuildMI(LoopMBB, DL, TII.get(X86::CMP64rr))  in emitStackProbeInlineWindowsCoreCLR64()
1078   BuildMI(LoopMBB, DL, TII.get(X86::JCC_1))  in emitStackProbeInlineWindowsCoreCLR64()
1080       .addImm(X86::COND_NE);  in emitStackProbeInlineWindowsCoreCLR64()
1088                            TII.get(X86::MOV64rm), X86::RCX),  in emitStackProbeInlineWindowsCoreCLR64()
1089                    X86::RSP, false, RCXShadowSlot);  in emitStackProbeInlineWindowsCoreCLR64()
1092                            TII.get(X86::MOV64rm), X86::RDX),  in emitStackProbeInlineWindowsCoreCLR64()
1093                    X86::RSP, false, RDXShadowSlot);  in emitStackProbeInlineWindowsCoreCLR64()
1099   BuildMI(*ContinueMBB, ContinueMBBI, DL, TII.get(X86::SUB64rr), X86::RSP)  in emitStackProbeInlineWindowsCoreCLR64()
1100       .addReg(X86::RSP)  in emitStackProbeInlineWindowsCoreCLR64()
1139   assert(MBB.computeRegisterLiveness(TRI, X86::EFLAGS, MBBI) !=  in emitStackProbeCall()
1145     CallOp = IsLargeCodeModel ? X86::CALL64r : X86::CALL64pcrel32;  in emitStackProbeCall()
1147     CallOp = X86::CALLpcrel32;  in emitStackProbeCall()
1159     BuildMI(MBB, MBBI, DL, TII.get(X86::MOV64ri), X86::R11)  in emitStackProbeCall()
1161     CI = BuildMI(MBB, MBBI, DL, TII.get(CallOp)).addReg(X86::R11);  in emitStackProbeCall()
1167   unsigned AX = Uses64BitFramePtr ? X86::RAX : X86::EAX;  in emitStackProbeCall()
1168   unsigned SP = Uses64BitFramePtr ? X86::RSP : X86::ESP;  in emitStackProbeCall()
1173       .addReg(X86::EFLAGS, RegState::Define | RegState::Implicit);  in emitStackProbeCall()
1281       const unsigned MovMIOpc = Is64Bit ? X86::MOV64mi32 : X86::MOV32mi;  in BuildStackAlignAND()
1282       Register FinalStackProbed = Uses64BitFramePtr ? X86::R11  in BuildStackAlignAND()
1283                                   : Is64Bit         ? X86::R11D  in BuildStackAlignAND()
1284                                                     : X86::EAX;  in BuildStackAlignAND()
1303                 TII.get(Uses64BitFramePtr ? X86::CMP64rr : X86::CMP32rr))  in BuildStackAlignAND()
1307         BuildMI(entryMBB, DL, TII.get(X86::JCC_1))  in BuildStackAlignAND()
1309             .addImm(X86::COND_E)  in BuildStackAlignAND()
1325                 TII.get(Uses64BitFramePtr ? X86::CMP64rr : X86::CMP32rr))  in BuildStackAlignAND()
1331         BuildMI(headMBB, DL, TII.get(X86::JCC_1))  in BuildStackAlignAND()
1333             .addImm(X86::COND_B)  in BuildStackAlignAND()
1356                 TII.get(Uses64BitFramePtr ? X86::CMP64rr : X86::CMP32rr))  in BuildStackAlignAND()
1362         BuildMI(bodyMBB, DL, TII.get(X86::JCC_1))  in BuildStackAlignAND()
1364             .addImm(X86::COND_B)  in BuildStackAlignAND()
1553     BuildMI(MBB, MBBI, DL, TII.get(Is64Bit ? X86::LEA64r : X86::LEA32r),  in emitPrologue()
1557         .addUse(X86::NoRegister)  in emitPrologue()
1559         .addUse(X86::NoRegister)  in emitPrologue()
1570     BuildMI(MBB, MBBI, DL, TII.get(Is64Bit ? X86::PUSH64rmm : X86::PUSH32rmm))  in emitPrologue()
1573         .addReg(X86::NoRegister)  in emitPrologue()
1575         .addReg(X86::NoRegister)  in emitPrologue()
1595         BuildMI(MBB, MBBI, DL, TII.get(X86::OR64rm), MachineFramePtr)  in emitPrologue()
1597             .addUse(X86::RIP)  in emitPrologue()
1599             .addUse(X86::NoRegister)  in emitPrologue()
1602             .addUse(X86::NoRegister);  in emitPrologue()
1608       BuildMI(MBB, MBBI, DL, TII.get(X86::BTS64ri8), MachineFramePtr)  in emitPrologue()
1636     BuildMI(MBB, MBBI, DL, TII.get(X86::PUSH64r))  in emitPrologue()
1637         .addReg(X86::RAX, RegState::Undef)  in emitPrologue()
1688   Register Establisher = X86::NoRegister;  in emitPrologue()
1690     Establisher = Uses64BitFramePtr ? X86::RCX : X86::ECX;  in emitPrologue()
1692     Establisher = Uses64BitFramePtr ? X86::RDX : X86::EDX;  in emitPrologue()
1698     unsigned MOVmr = Uses64BitFramePtr ? X86::MOV64mr : X86::MOV32mr;  in emitPrologue()
1743       BuildMI(MBB, MBBI, DL, TII.get(X86::SEH_PushReg))  in emitPrologue()
1758           MBB.addLiveIn(X86::R14);  in emitPrologue()
1759           BuildMI(MBB, MBBI, DL, TII.get(X86::PUSH64r))  in emitPrologue()
1760               .addReg(X86::R14)  in emitPrologue()
1765           BuildMI(MBB, MBBI, DL, TII.get(X86::PUSH64i32))  in emitPrologue()
1772           BuildMI(MBB, MBBI, DL, TII.get(X86::SEH_PushReg))  in emitPrologue()
1773               .addImm(X86::R14)  in emitPrologue()
1777         BuildMI(MBB, MBBI, DL, TII.get(X86::LEA64r), FramePtr)  in emitPrologue()
1778             .addUse(X86::RSP)  in emitPrologue()
1780             .addUse(X86::NoRegister)  in emitPrologue()
1782             .addUse(X86::NoRegister)  in emitPrologue()
1784         BuildMI(MBB, MBBI, DL, TII.get(X86::SUB64ri32), X86::RSP)  in emitPrologue()
1785             .addUse(X86::RSP)  in emitPrologue()
1794                   TII.get(Uses64BitFramePtr ? X86::MOV64rr : X86::MOV32rr),  in emitPrologue()
1827           BuildMI(MBB, MBBI, DL, TII.get(X86::SEH_SetFrame))  in emitPrologue()
1863     return Opc == X86::PUSH32r || Opc == X86::PUSH64r || Opc == X86::PUSHP64r ||  in emitPrologue()
1864            Opc == X86::PUSH2 || Opc == X86::PUSH2P;  in emitPrologue()
1880       if (Opc == X86::PUSH2 || Opc == X86::PUSH2P)  in emitPrologue()
1890       BuildMI(MBB, MBBI, DL, TII.get(X86::SEH_PushReg))  in emitPrologue()
1893       if (Opc == X86::PUSH2 || Opc == X86::PUSH2P)  in emitPrologue()
1894         BuildMI(MBB, MBBI, DL, TII.get(X86::SEH_PushReg))  in emitPrologue()
1910       BuildMI(MBB, MBBI, DL, TII.get(X86::SEH_StackAlign))  in emitPrologue()
1944         BuildMI(MBB, MBBI, DL, TII.get(X86::PUSH64r))  in emitPrologue()
1945             .addReg(X86::RAX, RegState::Kill)  in emitPrologue()
1949         BuildMI(MBB, MBBI, DL, TII.get(X86::PUSH32r))  in emitPrologue()
1950             .addReg(X86::EAX, RegState::Kill)  in emitPrologue()
1959       BuildMI(MBB, MBBI, DL, TII.get(getMOVriOpcode(Is64Bit, Alloc)), X86::RAX)  in emitPrologue()
1965       BuildMI(MBB, MBBI, DL, TII.get(X86::MOV32ri), X86::EAX)  in emitPrologue()
1977         MI = addRegOffset(BuildMI(MF, DL, TII.get(X86::MOV64rm), X86::RAX),  in emitPrologue()
1980         MI = addRegOffset(BuildMI(MF, DL, TII.get(X86::MOV32rm), X86::EAX),  in emitPrologue()
1991     BuildMI(MBB, MBBI, DL, TII.get(X86::SEH_StackAlloc))  in emitPrologue()
2007       addRegOffset(BuildMI(MBB, MBBI, DL, TII.get(X86::MOV64rm), Establisher),  in emitPrologue()
2014       addRegOffset(BuildMI(MBB, MBBI, DL, TII.get(X86::MOV64mr)), StackPtr,  in emitPrologue()
2033       addRegOffset(BuildMI(MBB, MBBI, DL, TII.get(X86::LEA64r), FramePtr),  in emitPrologue()
2036       BuildMI(MBB, MBBI, DL, TII.get(X86::MOV64rr), FramePtr)  in emitPrologue()
2043       BuildMI(MBB, MBBI, DL, TII.get(X86::SEH_SetFrame))  in emitPrologue()
2061       addRegOffset(BuildMI(MBB, MBBI, DL, TII.get(X86::MOV32mr)), FrameReg,  in emitPrologue()
2063           .addReg(X86::ESP);  in emitPrologue()
2074         if (X86::FR64RegClass.contains(Reg)) {  in emitPrologue()
2086           BuildMI(MBB, MBBI, DL, TII.get(X86::SEH_SaveXMM))  in emitPrologue()
2096     BuildMI(MBB, MBBI, DL, TII.get(X86::SEH_EndPrologue))  in emitPrologue()
2106     addRegOffset(BuildMI(MBB, MBBI, DL, TII.get(X86::MOV64mr)), StackPtr, false,  in emitPrologue()
2132     unsigned Opc = Uses64BitFramePtr ? X86::MOV64rr : X86::MOV32rr;  in emitPrologue()
2139       unsigned Opm = Uses64BitFramePtr ? X86::MOV64mr : X86::MOV32mr;  in emitPrologue()
2151       unsigned Opm = Uses64BitFramePtr ? X86::MOV64mr : X86::MOV32mr;  in emitPrologue()
2166     unsigned MOVmr = Is64Bit ? X86::MOV64mr : X86::MOV32mr;  in emitPrologue()
2197     BuildMI(MBB, MBBI, DL, TII.get(X86::CLD))  in emitPrologue()
2217   case X86::CATCHRET:  in isFuncletReturnInstr()
2218   case X86::CLEANUPRET:  in isFuncletReturnInstr()
2258       WinEHXMMSlotInfo.size() * TRI->getSpillSize(X86::VR128RegClass);  in getWinEHFuncletFrameSize()
2282   return Opc == X86::TCRETURNri || Opc == X86::TCRETURNdi ||  in isTailCallOpcode()
2283          Opc == X86::TCRETURNmi || Opc == X86::TCRETURNri64 ||  in isTailCallOpcode()
2284          Opc == X86::TCRETURNdi64 || Opc == X86::TCRETURNmi64;  in isTailCallOpcode()
2321     unsigned Opc = X86::LEA32r;  in emitEpilogue()
2322     Register StackReg = X86::ESP;  in emitEpilogue()
2325       Opc = X86::LEA64r;  in emitEpilogue()
2326       StackReg = X86::RSP;  in emitEpilogue()
2333         .addUse(X86::NoRegister)  in emitEpilogue()
2335         .addUse(X86::NoRegister)  in emitEpilogue()
2381       BuildMI(MBB, MBBI, DL, TII.get(X86::BTR64ri8), MachineFramePtr)  in emitEpilogue()
2390             TRI->getDwarfRegNum(Is64Bit ? X86::RSP : X86::ESP, true);  in emitEpilogue()
2413     if (Opc != X86::DBG_VALUE && !PI->isTerminator()) {  in emitEpilogue()
2415           (Opc != X86::POP32r && Opc != X86::POP64r && Opc != X86::BTR64ri8 &&  in emitEpilogue()
2416            Opc != X86::ADD64ri32 && Opc != X86::POPP64r && Opc != X86::POP2 &&  in emitEpilogue()
2417            Opc != X86::POP2P && Opc != X86::LEA64r))  in emitEpilogue()
2428     unsigned MOVrm = Is64Bit ? X86::MOV64rm : X86::MOV32rm;  in emitEpilogue()
2435   if (IsFunclet && Terminator->getOpcode() == X86::CATCHRET)  in emitEpilogue()
2473       unsigned Opc = (Uses64BitFramePtr ? X86::MOV64rr : X86::MOV32rr);  in emitEpilogue()
2497     BuildMI(MBB, MBBI, DL, TII.get(X86::SEH_Epilogue));  in emitEpilogue()
2508       if (Opc == X86::POP32r || Opc == X86::POP64r || Opc == X86::POPP64r ||  in emitEpilogue()
2509           Opc == X86::POP2 || Opc == X86::POP2P) {  in emitEpilogue()
2513         if (Opc == X86::POP2 || Opc == X86::POP2P)  in emitEpilogue()
2541     BuildMI(MBB, Terminator, DL, TII.get(X86::TILERELEASE));  in emitEpilogue()
2809       return X86::GR64RegClass.contains(I.getReg());  in assignCalleeSavedSpillSlots()
2825     if (!X86::GR64RegClass.contains(Reg) && !X86::GR32RegClass.contains(Reg))  in assignCalleeSavedSpillSlots()
2862     if (X86::GR64RegClass.contains(Reg) || X86::GR32RegClass.contains(Reg))  in assignCalleeSavedSpillSlots()
2867     if (X86::VK16RegClass.contains(Reg))  in assignCalleeSavedSpillSlots()
2884     if (X86::VR128RegClass.contains(Reg)) {  in assignCalleeSavedSpillSlots()
2933     if (!X86::GR64RegClass.contains(Reg) && !X86::GR32RegClass.contains(Reg))  in spillCalleeSavedRegisters()
2950     unsigned Opc = STI.is64Bit() ? X86::PUSH64r : X86::PUSH32r;  in spillCalleeSavedRegisters()
2961     if (X86::GR64RegClass.contains(Reg) || X86::GR32RegClass.contains(Reg))  in spillCalleeSavedRegisters()
2966     if (X86::VK16RegClass.contains(Reg))  in spillCalleeSavedRegisters()
2996     BuildMI(MBB, MBBI, DL, TII.get(X86::LEA64r), X86::RAX)  in emitCatchRetReturnValue()
2997         .addReg(X86::RIP)  in emitCatchRetReturnValue()
3004     BuildMI(MBB, MBBI, DL, TII.get(X86::MOV32ri), X86::EAX)  in emitCatchRetReturnValue()
3026     if (MI->getOpcode() == X86::CATCHRET) {  in restoreCalleeSavedRegisters()
3040     if (X86::GR64RegClass.contains(Reg) || X86::GR32RegClass.contains(Reg))  in restoreCalleeSavedRegisters()
3045     if (X86::VK16RegClass.contains(Reg))  in restoreCalleeSavedRegisters()
3057     unsigned Opc = STI.is64Bit() ? X86::POP64r : X86::POP32r;  in restoreCalleeSavedRegisters()
3066     if (!X86::GR64RegClass.contains(Reg) && !X86::GR32RegClass.contains(Reg))  in restoreCalleeSavedRegisters()
3118       return Primary ? X86::R14 : X86::R13;  in GetScratchRegister()
3120       return Primary ? X86::EBX : X86::EDI;  in GetScratchRegister()
3125       return Primary ? X86::R11 : X86::R12;  in GetScratchRegister()
3127       return Primary ? X86::R11D : X86::R12D;  in GetScratchRegister()
3138     return Primary ? X86::EAX : X86::ECX;  in GetScratchRegister()
3141     return Primary ? X86::EDX : X86::EAX;  in GetScratchRegister()
3142   return Primary ? X86::ECX : X86::EAX;  in GetScratchRegister()
3197     allocMBB->addLiveIn(IsLP64 ? X86::R10 : X86::R10D);  in adjustForSegmentedStacks()
3209       TlsReg = X86::FS;  in adjustForSegmentedStacks()
3212       TlsReg = X86::GS;  in adjustForSegmentedStacks()
3215       TlsReg = X86::GS;  in adjustForSegmentedStacks()
3218       TlsReg = X86::FS;  in adjustForSegmentedStacks()
3221       TlsReg = X86::FS;  in adjustForSegmentedStacks()
3228       ScratchReg = IsLP64 ? X86::RSP : X86::ESP;  in adjustForSegmentedStacks()
3230       BuildMI(checkMBB, DL, TII.get(IsLP64 ? X86::LEA64r : X86::LEA64_32r),  in adjustForSegmentedStacks()
3232           .addReg(X86::RSP)  in adjustForSegmentedStacks()
3238     BuildMI(checkMBB, DL, TII.get(IsLP64 ? X86::CMP64rm : X86::CMP32rm))  in adjustForSegmentedStacks()
3247       TlsReg = X86::GS;  in adjustForSegmentedStacks()
3250       TlsReg = X86::GS;  in adjustForSegmentedStacks()
3253       TlsReg = X86::FS;  in adjustForSegmentedStacks()
3256       TlsReg = X86::FS;  in adjustForSegmentedStacks()
3265       ScratchReg = X86::ESP;  in adjustForSegmentedStacks()
3267       BuildMI(checkMBB, DL, TII.get(X86::LEA32r), ScratchReg)  in adjustForSegmentedStacks()
3268           .addReg(X86::ESP)  in adjustForSegmentedStacks()
3276       BuildMI(checkMBB, DL, TII.get(X86::CMP32rm))  in adjustForSegmentedStacks()
3306         BuildMI(checkMBB, DL, TII.get(X86::PUSH32r))  in adjustForSegmentedStacks()
3309       BuildMI(checkMBB, DL, TII.get(X86::MOV32ri), ScratchReg2)  in adjustForSegmentedStacks()
3311       BuildMI(checkMBB, DL, TII.get(X86::CMP32rm))  in adjustForSegmentedStacks()
3320         BuildMI(checkMBB, DL, TII.get(X86::POP32r), ScratchReg2);  in adjustForSegmentedStacks()
3326   BuildMI(checkMBB, DL, TII.get(X86::JCC_1))  in adjustForSegmentedStacks()
3328       .addImm(X86::COND_A);  in adjustForSegmentedStacks()
3336     const unsigned RegAX = IsLP64 ? X86::RAX : X86::EAX;  in adjustForSegmentedStacks()
3337     const unsigned Reg10 = IsLP64 ? X86::R10 : X86::R10D;  in adjustForSegmentedStacks()
3338     const unsigned Reg11 = IsLP64 ? X86::R11 : X86::R11D;  in adjustForSegmentedStacks()
3339     const unsigned MOVrr = IsLP64 ? X86::MOV64rr : X86::MOV32rr;  in adjustForSegmentedStacks()
3351     BuildMI(allocMBB, DL, TII.get(X86::PUSH32i))  in adjustForSegmentedStacks()
3353     BuildMI(allocMBB, DL, TII.get(X86::PUSH32i)).addImm(StackSize);  in adjustForSegmentedStacks()
3376     BuildMI(allocMBB, DL, TII.get(X86::CALL64m))  in adjustForSegmentedStacks()
3377         .addReg(X86::RIP)  in adjustForSegmentedStacks()
3384       BuildMI(allocMBB, DL, TII.get(X86::CALL64pcrel32))  in adjustForSegmentedStacks()
3387       BuildMI(allocMBB, DL, TII.get(X86::CALLpcrel32))  in adjustForSegmentedStacks()
3392     BuildMI(allocMBB, DL, TII.get(X86::MORESTACK_RET_RESTORE_R10));  in adjustForSegmentedStacks()
3394     BuildMI(allocMBB, DL, TII.get(X86::MORESTACK_RET));  in adjustForSegmentedStacks()
3549       SPReg = X86::RSP;  in adjustForHiPEPrologue()
3550       PReg = X86::RBP;  in adjustForHiPEPrologue()
3551       LEAop = X86::LEA64r;  in adjustForHiPEPrologue()
3552       CMPop = X86::CMP64rm;  in adjustForHiPEPrologue()
3553       CALLop = X86::CALL64pcrel32;  in adjustForHiPEPrologue()
3555       SPReg = X86::ESP;  in adjustForHiPEPrologue()
3556       PReg = X86::EBP;  in adjustForHiPEPrologue()
3557       LEAop = X86::LEA32r;  in adjustForHiPEPrologue()
3558       CMPop = X86::CMP32rm;  in adjustForHiPEPrologue()
3559       CALLop = X86::CALLpcrel32;  in adjustForHiPEPrologue()
3572     BuildMI(stackCheckMBB, DL, TII.get(X86::JCC_1))  in adjustForHiPEPrologue()
3574         .addImm(X86::COND_AE);  in adjustForHiPEPrologue()
3582     BuildMI(incStackMBB, DL, TII.get(X86::JCC_1))  in adjustForHiPEPrologue()
3584         .addImm(X86::COND_LE);  in adjustForHiPEPrologue()
3626       Is64Bit ? X86::GR64_NOREX_NOSPRegClass : X86::GR32_NOREX_NOSPRegClass;  in adjustStackWithPops()
3664     BuildMI(MBB, MBBI, DL, TII.get(STI.is64Bit() ? X86::POP64r : X86::POP32r),  in adjustStackWithPops()
3783   if (!MBB.isLiveIn(X86::EFLAGS))  in canUseAsPrologue()
3862     addRegOffset(BuildMI(MBB, MBBI, DL, TII.get(X86::MOV32rm), X86::ESP),  in restoreWin32EHStackPointers()
3863                  X86::EBP, true, -EHRegSize)  in restoreWin32EHStackPointers()
3885     addRegOffset(BuildMI(MBB, MBBI, DL, TII.get(X86::LEA32r), BasePtr),  in restoreWin32EHStackPointers()
3894     addRegOffset(BuildMI(MBB, MBBI, DL, TII.get(X86::MOV32rm), FramePtr),  in restoreWin32EHStackPointers()
4143   addFrameReference(BuildMI(MBB, MBBI, DL, TII.get(X86::MOV64mi32)),  in adjustFrameForMsvcCxxEh()