Lines Matching refs:X86
72 using CondRegArray = std::array<unsigned, X86::LAST_VALID_COND + 1>;
98 const DebugLoc &TestLoc, X86::CondCode Cond);
101 const DebugLoc &TestLoc, X86::CondCode Cond, CondRegArray &CondRegs);
169 case X86::MNEMONIC##8##SUFFIX: \ in getMnemonicFromOpcode()
170 case X86::MNEMONIC##16##SUFFIX: \ in getMnemonicFromOpcode()
171 case X86::MNEMONIC##32##SUFFIX: \ in getMnemonicFromOpcode()
172 case X86::MNEMONIC##64##SUFFIX: in getMnemonicFromOpcode()
179 case X86::MNEMONIC##8ri: \ in getMnemonicFromOpcode()
180 case X86::MNEMONIC##16ri8: \ in getMnemonicFromOpcode()
181 case X86::MNEMONIC##32ri8: \ in getMnemonicFromOpcode()
182 case X86::MNEMONIC##64ri8: \ in getMnemonicFromOpcode()
183 case X86::MNEMONIC##16ri: \ in getMnemonicFromOpcode()
184 case X86::MNEMONIC##32ri: \ in getMnemonicFromOpcode()
185 case X86::MNEMONIC##64ri32: \ in getMnemonicFromOpcode()
186 case X86::MNEMONIC##8mi: \ in getMnemonicFromOpcode()
187 case X86::MNEMONIC##16mi8: \ in getMnemonicFromOpcode()
188 case X86::MNEMONIC##32mi8: \ in getMnemonicFromOpcode()
189 case X86::MNEMONIC##64mi8: \ in getMnemonicFromOpcode()
190 case X86::MNEMONIC##16mi: \ in getMnemonicFromOpcode()
191 case X86::MNEMONIC##32mi: \ in getMnemonicFromOpcode()
192 case X86::MNEMONIC##64mi32: \ in getMnemonicFromOpcode()
193 case X86::MNEMONIC##8i8: \ in getMnemonicFromOpcode()
194 case X86::MNEMONIC##16i16: \ in getMnemonicFromOpcode()
195 case X86::MNEMONIC##32i32: \ in getMnemonicFromOpcode()
196 case X86::MNEMONIC##64i32: in getMnemonicFromOpcode()
218 case X86::SETB_C32r: in getMnemonicFromOpcode()
219 case X86::SETB_C64r: in getMnemonicFromOpcode()
233 assert(X86::getCondFromBranch(SplitI) != X86::COND_INVALID && in splitBlock()
239 assert(X86::getCondFromBranch(PrevI) != X86::COND_INVALID && in splitBlock()
324 static X86::CondCode getCondFromFCMOV(unsigned Opcode) { in getCondFromFCMOV()
326 default: return X86::COND_INVALID; in getCondFromFCMOV()
327 case X86::CMOVBE_Fp32: case X86::CMOVBE_Fp64: case X86::CMOVBE_Fp80: in getCondFromFCMOV()
328 return X86::COND_BE; in getCondFromFCMOV()
329 case X86::CMOVB_Fp32: case X86::CMOVB_Fp64: case X86::CMOVB_Fp80: in getCondFromFCMOV()
330 return X86::COND_B; in getCondFromFCMOV()
331 case X86::CMOVE_Fp32: case X86::CMOVE_Fp64: case X86::CMOVE_Fp80: in getCondFromFCMOV()
332 return X86::COND_E; in getCondFromFCMOV()
333 case X86::CMOVNBE_Fp32: case X86::CMOVNBE_Fp64: case X86::CMOVNBE_Fp80: in getCondFromFCMOV()
334 return X86::COND_A; in getCondFromFCMOV()
335 case X86::CMOVNB_Fp32: case X86::CMOVNB_Fp64: case X86::CMOVNB_Fp80: in getCondFromFCMOV()
336 return X86::COND_AE; in getCondFromFCMOV()
337 case X86::CMOVNE_Fp32: case X86::CMOVNE_Fp64: case X86::CMOVNE_Fp80: in getCondFromFCMOV()
338 return X86::COND_NE; in getCondFromFCMOV()
339 case X86::CMOVNP_Fp32: case X86::CMOVNP_Fp64: case X86::CMOVNP_Fp80: in getCondFromFCMOV()
340 return X86::COND_NP; in getCondFromFCMOV()
341 case X86::CMOVP_Fp32: case X86::CMOVP_Fp64: case X86::CMOVP_Fp80: in getCondFromFCMOV()
342 return X86::COND_P; in getCondFromFCMOV()
355 PromoteRC = &X86::GR8RegClass; in runOnMachineFunction()
370 MI.getOperand(0).getReg() == X86::EFLAGS) in runOnMachineFunction()
413 assert(DOp.getReg() == X86::EFLAGS && "Unexpected copy def register!"); in runOnMachineFunction()
441 return &MI != CopyI && MI.findRegisterDefOperand(X86::EFLAGS); in runOnMachineFunction()
467 while (TestMBB->isLiveIn(X86::EFLAGS) && !TestMBB->pred_empty() && in runOnMachineFunction()
499 return MI.findRegisterDefOperand(X86::EFLAGS); in runOnMachineFunction()
561 MachineOperand *FlagUse = MI.findRegisterUseOperand(X86::EFLAGS); in runOnMachineFunction()
563 if (MI.findRegisterDefOperand(X86::EFLAGS)) { in runOnMachineFunction()
591 if (X86::getCondFromBranch(MI) != X86::COND_INVALID) { in runOnMachineFunction()
597 X86::getCondFromBranch(*JmpIt) != in runOnMachineFunction()
598 X86::COND_INVALID); in runOnMachineFunction()
603 if (X86::getCondFromCMov(MI) != X86::COND_INVALID) { in runOnMachineFunction()
605 } else if (getCondFromFCMOV(MI.getOpcode()) != X86::COND_INVALID) { in runOnMachineFunction()
607 } else if (X86::getCondFromSETCC(MI) != X86::COND_INVALID) { in runOnMachineFunction()
613 assert(MI.findRegisterDefOperand(X86::EFLAGS) && in runOnMachineFunction()
641 if (SuccMBB->isLiveIn(X86::EFLAGS) && in runOnMachineFunction()
675 SuccMBB->removeLiveIn(X86::EFLAGS); in runOnMachineFunction()
702 (MI.getOperand(0).getReg() == X86::EFLAGS || in runOnMachineFunction()
703 MI.getOperand(1).getReg() == X86::EFLAGS)) { in runOnMachineFunction()
722 X86::CondCode Cond = X86::getCondFromSETCC(MI); in collectCondsInRegs()
723 if (Cond != X86::COND_INVALID && !MI.mayStore() && in collectCondsInRegs()
732 if (MI.findRegisterDefOperand(X86::EFLAGS)) in collectCondsInRegs()
740 const DebugLoc &TestLoc, X86::CondCode Cond) { in promoteCondToReg()
743 TII->get(X86::SETCCr), Reg).addImm(Cond); in promoteCondToReg()
752 const DebugLoc &TestLoc, X86::CondCode Cond, CondRegArray &CondRegs) { in getCondOrInverseInReg()
754 unsigned &InvCondReg = CondRegs[X86::GetOppositeBranchCondition(Cond)]; in getCondOrInverseInReg()
768 BuildMI(MBB, Pos, Loc, TII->get(X86::TEST8rr)).addReg(Reg).addReg(Reg); in insertTest()
780 X86::CondCode Cond = X86::COND_INVALID; in rewriteArithmetic()
791 Cond = X86::COND_B; // CF == 1 in rewriteArithmetic()
810 BuildMI(MBB, MI.getIterator(), MI.getDebugLoc(), TII->get(X86::ADD8ri)) in rewriteArithmetic()
827 X86::CondCode Cond = X86::getCondFromCMov(CMovI); in rewriteCMov()
841 .setImm(Inverted ? X86::COND_E : X86::COND_NE); in rewriteCMov()
853 X86::CondCode Cond = getCondFromFCMOV(CMovI.getOpcode()); in rewriteFCMov()
867 case X86::CMOVBE_Fp32: case X86::CMOVNBE_Fp32: in rewriteFCMov()
868 case X86::CMOVB_Fp32: case X86::CMOVNB_Fp32: in rewriteFCMov()
869 case X86::CMOVE_Fp32: case X86::CMOVNE_Fp32: in rewriteFCMov()
870 case X86::CMOVP_Fp32: case X86::CMOVNP_Fp32: in rewriteFCMov()
871 return Inverted ? X86::CMOVE_Fp32 : X86::CMOVNE_Fp32; in rewriteFCMov()
872 case X86::CMOVBE_Fp64: case X86::CMOVNBE_Fp64: in rewriteFCMov()
873 case X86::CMOVB_Fp64: case X86::CMOVNB_Fp64: in rewriteFCMov()
874 case X86::CMOVE_Fp64: case X86::CMOVNE_Fp64: in rewriteFCMov()
875 case X86::CMOVP_Fp64: case X86::CMOVNP_Fp64: in rewriteFCMov()
876 return Inverted ? X86::CMOVE_Fp64 : X86::CMOVNE_Fp64; in rewriteFCMov()
877 case X86::CMOVBE_Fp80: case X86::CMOVNBE_Fp80: in rewriteFCMov()
878 case X86::CMOVB_Fp80: case X86::CMOVNB_Fp80: in rewriteFCMov()
879 case X86::CMOVE_Fp80: case X86::CMOVNE_Fp80: in rewriteFCMov()
880 case X86::CMOVP_Fp80: case X86::CMOVNP_Fp80: in rewriteFCMov()
881 return Inverted ? X86::CMOVE_Fp80 : X86::CMOVNE_Fp80; in rewriteFCMov()
895 X86::CondCode Cond = X86::getCondFromBranch(JmpI); in rewriteCondJmp()
908 JmpI.getOperand(1).setImm(Inverted ? X86::COND_E : X86::COND_NE); in rewriteCondJmp()
909 JmpI.findRegisterUseOperand(X86::EFLAGS)->setIsKill(true); in rewriteCondJmp()
928 X86::CondCode Cond = X86::getCondFromSETCC(SetCCI); in rewriteSetCC()
952 SetCCI.getDebugLoc(), TII->get(X86::MOV8mr)); in rewriteSetCC()
954 for (int i = 0; i < X86::AddrNumOperands; ++i) in rewriteSetCC()