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Searched refs:SrcVT (Results 1 – 25 of 42) sorted by relevance

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/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/PowerPC/
H A DPPCFastISel.cpp841 if (SrcVT == MVT::i64 || SrcVT == MVT::i32 || SrcVT == MVT::i16 || in PPCEmitCmp()
842 SrcVT == MVT::i8 || SrcVT == MVT::i1) { in PPCEmitCmp()
1077 if (SrcVT != MVT::i8 && SrcVT != MVT::i16 && in SelectIToFP()
1078 SrcVT != MVT::i32 && SrcVT != MVT::i64) in SelectIToFP()
1115 if (SrcVT == MVT::i8 || SrcVT == MVT::i16) { in SelectIToFP()
1119 SrcVT = MVT::i64; in SelectIToFP()
1187 MVT DstVT, SrcVT; in SelectFPToI() local
1205 if (SrcVT != MVT::f32 && SrcVT != MVT::f64) in SelectFPToI()
1810 if (SrcVT != MVT::i8 && SrcVT != MVT::i16 && SrcVT != MVT::i32) in PPCEmitIntExt()
1880 if (SrcVT != MVT::i64 && SrcVT != MVT::i32 && SrcVT != MVT::i16) in SelectTrunc()
[all …]
/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/Mips/
H A DMipsFastISel.cpp1099 MVT DstVT, SrcVT; in selectFPToInt() local
1112 if (!isTypeLegal(SrcTy, SrcVT)) in selectFPToInt()
1115 if (SrcVT != MVT::f32 && SrcVT != MVT::f64) in selectFPToInt()
1210 MVT SrcVT = ArgVT; in processCallArgs() local
1218 MVT SrcVT = ArgVT; in processCallArgs() local
1782 EVT SrcVT, DestVT; in selectTrunc() local
1786 if (SrcVT != MVT::i32 && SrcVT != MVT::i16 && SrcVT != MVT::i8) in selectTrunc()
1832 switch (SrcVT.SimpleTy) { in emitIntSExt32r1()
1850 switch (SrcVT.SimpleTy) { in emitIntSExt32r2()
1876 switch (SrcVT.SimpleTy) { in emitIntZExt()
[all …]
H A DMipsMSAInstrInfo.td3608 class MSABitconvertPat<ValueType DstVT, ValueType SrcVT,
3610 MSAPat<(DstVT (bitconvert SrcVT:$src)),
3611 (COPY_TO_REGCLASS SrcVT:$src, DstRC), preds>;
3668 MSAPat<(DstVT (bitconvert SrcVT:$src)),
3676 MSAPat<(DstVT (bitconvert SrcVT:$src)),
3681 class MSABitconvertReverseBInHPat<ValueType DstVT, ValueType SrcVT,
3685 class MSABitconvertReverseBInWPat<ValueType DstVT, ValueType SrcVT,
3689 class MSABitconvertReverseBInDPat<ValueType DstVT, ValueType SrcVT,
3691 MSAPat<(DstVT (bitconvert SrcVT:$src)),
3695 (SHF_B (COPY_TO_REGCLASS SrcVT:$src, MSA128B), 27),
[all …]
/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/AArch64/
H A DAArch64FastISel.cpp2813 if (SrcVT == MVT::f128 || SrcVT == MVT::f16) in selectFPToInt()
2854 if (SrcVT == MVT::i16 || SrcVT == MVT::i8 || SrcVT == MVT::i1) { in selectIntToFP()
3875 if (SrcVT != MVT::i64 && SrcVT != MVT::i32 && SrcVT != MVT::i16 && in selectTrunc()
4020 assert((SrcVT == MVT::i1 || SrcVT == MVT::i8 || SrcVT == MVT::i16 || in emitLSL_ri()
4021 SrcVT == MVT::i32 || SrcVT == MVT::i64) && in emitLSL_ri()
4123 assert((SrcVT == MVT::i1 || SrcVT == MVT::i8 || SrcVT == MVT::i16 || in emitLSR_ri()
4124 SrcVT == MVT::i32 || SrcVT == MVT::i64) && in emitLSR_ri()
4239 assert((SrcVT == MVT::i1 || SrcVT == MVT::i8 || SrcVT == MVT::i16 || in emitASR_ri()
4240 SrcVT == MVT::i32 || SrcVT == MVT::i64) && in emitASR_ri()
4325 ((SrcVT != MVT::i1) && (SrcVT != MVT::i8) && in emitIntExt()
[all …]
H A DAArch64ISelLowering.cpp3285 if (SrcVT != MVT::f128) { in LowerFP_ROUND()
3390 if (SrcVT.isVector()) in LowerFP_TO_INT_SAT()
3404 if ((SrcVT == MVT::f64 || SrcVT == MVT::f32 || in LowerFP_TO_INT_SAT()
7000 if (SrcVT.bitsLT(VT)) in LowerFCOPYSIGN()
7002 else if (SrcVT.bitsGT(VT)) in LowerFCOPYSIGN()
15983 if (SrcVT == MVT::i1) in performSelectCombine()
15990 SrcVT = EVT::getVectorVT(*DAG.getContext(), SrcVT, NumMaskElts); in performSelectCombine()
16146 if ((SrcVT != MVT::nxv4f32) && (SrcVT != MVT::nxv2f64)) in performScatterStoreCombine()
17073 if (VT != MVT::i16 || (SrcVT != MVT::f16 && SrcVT != MVT::bf16)) in ReplaceBITCASTResults()
18307 EVT ContainerVT = SrcVT; in LowerVECREDUCE_SEQ_FADD()
[all …]
H A DAArch64ISelDAGToDAG.cpp587 EVT SrcVT; in getExtendTypeForNode() local
589 SrcVT = cast<VTSDNode>(N.getOperand(1))->getVT(); in getExtendTypeForNode()
591 SrcVT = N.getOperand(0).getValueType(); in getExtendTypeForNode()
593 if (!IsLoadStore && SrcVT == MVT::i8) in getExtendTypeForNode()
595 else if (!IsLoadStore && SrcVT == MVT::i16) in getExtendTypeForNode()
597 else if (SrcVT == MVT::i32) in getExtendTypeForNode()
599 assert(SrcVT != MVT::i64 && "extend from 64-bits?"); in getExtendTypeForNode()
604 EVT SrcVT = N.getOperand(0).getValueType(); in getExtendTypeForNode() local
605 if (!IsLoadStore && SrcVT == MVT::i8) in getExtendTypeForNode()
607 else if (!IsLoadStore && SrcVT == MVT::i16) in getExtendTypeForNode()
[all …]
/freebsd-13.1/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/
H A DLegalizeVectorOps.cpp999 EVT SrcVT = Src.getValueType(); in ExpandANY_EXTEND_VECTOR_INREG() local
1004 if (SrcVT.bitsLE(VT)) { in ExpandANY_EXTEND_VECTOR_INREG()
1008 SrcVT = EVT::getVectorVT(*DAG.getContext(), SrcVT.getScalarType(), in ExpandANY_EXTEND_VECTOR_INREG()
1010 Src = DAG.getNode(ISD::INSERT_SUBVECTOR, DL, SrcVT, DAG.getUNDEF(SrcVT), in ExpandANY_EXTEND_VECTOR_INREG()
1026 DAG.getVectorShuffle(SrcVT, DL, Src, DAG.getUNDEF(SrcVT), ShuffleMask)); in ExpandANY_EXTEND_VECTOR_INREG()
1033 EVT SrcVT = Src.getValueType(); in ExpandSIGN_EXTEND_VECTOR_INREG() local
1058 EVT SrcVT = Src.getValueType(); in ExpandZERO_EXTEND_VECTOR_INREG() local
1063 if (SrcVT.bitsLE(VT)) { in ExpandZERO_EXTEND_VECTOR_INREG()
1067 SrcVT = EVT::getVectorVT(*DAG.getContext(), SrcVT.getScalarType(), in ExpandZERO_EXTEND_VECTOR_INREG()
1069 Src = DAG.getNode(ISD::INSERT_SUBVECTOR, DL, SrcVT, DAG.getUNDEF(SrcVT), in ExpandZERO_EXTEND_VECTOR_INREG()
[all …]
H A DTargetLowering.cpp655 if (SrcVT == DstVT) in SimplifyMultipleUseDemandedBits()
692 unsigned NumSrcElts = SrcVT.isVector() ? SrcVT.getVectorNumElements() : 1; in SimplifyMultipleUseDemandedBits()
1875 unsigned InElts = SrcVT.isVector() ? SrcVT.getVectorNumElements() : 1; in SimplifyDemandedBits()
1913 unsigned InElts = SrcVT.isVector() ? SrcVT.getVectorNumElements() : 1; in SimplifyDemandedBits()
1966 unsigned InElts = SrcVT.isVector() ? SrcVT.getVectorNumElements() : 1; in SimplifyDemandedBits()
2118 SrcVT != MVT::f128) { in SimplifyDemandedBits()
2166 unsigned NumSrcElts = SrcVT.isVector() ? SrcVT.getVectorNumElements() : 1; in SimplifyDemandedBits()
2176 if (SrcVT.isVector()) { in SimplifyDemandedBits()
2457 if (!SrcVT.isVector()) in SimplifyDemandedVectorElts()
6874 if (SrcVT.isVector() && (!isOperationLegalOrCustom(ISD::SRL, SrcVT) || in expandUINT_TO_FP()
[all …]
H A DLegalizeDAG.cpp725 EVT SrcVT = LD->getMemoryVT(); in LegalizeLoadOps() local
726 TypeSize SrcWidth = SrcVT.getSizeInBits(); in LegalizeLoadOps()
730 if (SrcWidth != SrcVT.getStoreSizeInBits() && in LegalizeLoadOps()
738 (SrcVT != MVT::i1 || in LegalizeLoadOps()
903 if (SrcVT.getScalarType() == MVT::f16) { in LegalizeLoadOps()
916 assert(!SrcVT.isVector() && in LegalizeLoadOps()
2289 EVT SrcVT = Op0.getValueType(); in ExpandLegalINT_TO_FP() local
2364 if (((SrcVT == MVT::i32 || SrcVT == MVT::i64) && DestVT == MVT::f32) || in ExpandLegalINT_TO_FP()
2381 EVT SetCCVT = getSetCCResultType(SrcVT); in ExpandLegalINT_TO_FP()
2429 SrcVT.getSizeInBits() - 1 && in ExpandLegalINT_TO_FP()
[all …]
H A DFastISel.cpp1375 EVT SrcVT = TLI.getValueType(DL, I->getOperand(0)->getType()); in selectCast() local
1378 if (SrcVT == MVT::Other || !SrcVT.isSimple() || DstVT == MVT::Other || in selectCast()
1388 if (!TLI.isTypeLegal(SrcVT)) in selectCast()
1396 Register ResultReg = fastEmit_r(SrcVT.getSimpleVT(), DstVT.getSimpleVT(), in selectCast()
1423 MVT SrcVT = SrcEVT.getSimpleVT(); in selectBitCast() local
1431 if (SrcVT == DstVT) { in selectBitCast()
1432 const TargetRegisterClass *SrcClass = TLI.getRegClassFor(SrcVT); in selectBitCast()
1444 ResultReg = fastEmit_r(SrcVT, DstVT, ISD::BITCAST, Op0); in selectBitCast()
1798 EVT SrcVT = TLI.getValueType(DL, I->getOperand(0)->getType()); in selectOperator() local
1800 if (DstVT.bitsGT(SrcVT)) in selectOperator()
[all …]
H A DLegalizeFloatTypes.cpp927 static RTLIB::Libcall findFPToIntLibcall(EVT SrcVT, EVT RetVT, EVT &Promoted, in findFPToIntLibcall() argument
936 LC = Signed ? RTLIB::getFPTOSINT(SrcVT, Promoted) in findFPToIntLibcall()
937 : RTLIB::getFPTOUINT(SrcVT, Promoted); in findFPToIntLibcall()
1649 EVT SrcVT = Src.getValueType(); in ExpandFloatRes_XINT_TO_FP() local
1662 if (SrcVT.bitsLE(MVT::i32)) { in ExpandFloatRes_XINT_TO_FP()
1674 if (SrcVT.bitsLE(MVT::i64)) { in ExpandFloatRes_XINT_TO_FP()
1678 } else if (SrcVT.bitsLE(MVT::i128)) { in ExpandFloatRes_XINT_TO_FP()
1694 if (isSigned || SrcVT.bitsLE(MVT::i32)) { in ExpandFloatRes_XINT_TO_FP()
1706 SrcVT = Src.getValueType(); in ExpandFloatRes_XINT_TO_FP()
1714 switch (SrcVT.getSimpleVT().SimpleTy) { in ExpandFloatRes_XINT_TO_FP()
[all …]
H A DLegalizeVectorTypes.cpp538 EVT SrcVT = Src.getValueType(); in ScalarizeVecRes_FP_TO_XINT_SAT() local
1940 EVT SrcVT = N->getOperand(0).getValueType(); in SplitVecRes_ExtendOp() local
1958 if (SrcVT.getVectorElementCount().isKnownEven() && in SplitVecRes_ExtendOp()
1961 EVT NewSrcVT = SrcVT.widenIntegerVectorElementType(Ctx); in SplitVecRes_ExtendOp()
1962 EVT SplitSrcVT = SrcVT.getHalfNumVectorElementsVT(Ctx); in SplitVecRes_ExtendOp()
2121 EVT SrcVT = N->getOperand(0).getValueType(); in SplitVecRes_FP_TO_XINT_SAT() local
3626 EVT SrcVT = Src.getValueType(); in WidenVecRes_FP_TO_XINT_SAT() local
3631 SrcVT = Src.getValueType(); in WidenVecRes_FP_TO_XINT_SAT()
3635 if (WidenNumElts != SrcVT.getVectorElementCount()) in WidenVecRes_FP_TO_XINT_SAT()
4753 EVT SrcVT = Src.getValueType(); in WidenVecOp_FP_TO_XINT_SAT() local
[all …]
/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/ARM/
H A DARMFastISel.cpp1339 MVT SrcVT = SrcEVT.getSimpleVT(); in ARMEmitCmp() local
1355 if (SrcVT == MVT::i32 || SrcVT == MVT::i16 || SrcVT == MVT::i8 || in ARMEmitCmp()
1356 SrcVT == MVT::i1) { in ARMEmitCmp()
1370 if (SrcVT == MVT::f32 || SrcVT == MVT::f64) in ARMEmitCmp()
1378 switch (SrcVT.SimpleTy) { in ARMEmitCmp()
1534 MVT SrcVT = SrcEVT.getSimpleVT(); in SelectIToFP() local
1535 if (SrcVT != MVT::i32 && SrcVT != MVT::i16 && SrcVT != MVT::i8) in SelectIToFP()
1542 if (SrcVT == MVT::i16 || SrcVT == MVT::i8) { in SelectIToFP()
2582 EVT SrcVT, DestVT; in SelectTrunc() local
2586 if (SrcVT != MVT::i32 && SrcVT != MVT::i16 && SrcVT != MVT::i8) in SelectTrunc()
[all …]
H A DARMISelLowering.h453 bool isTruncateFree(EVT SrcVT, EVT DstVT) const override;
616 bool isExtractSubvectorCheap(EVT ResVT, EVT SrcVT,
/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/X86/
H A DX86FastISel.cpp1247 if (SrcVT != DstVT) { in X86SelectRet()
1248 if (SrcVT != MVT::i1 && SrcVT != MVT::i8 && SrcVT != MVT::i16) in X86SelectRet()
1256 if (SrcVT == MVT::i1) { in X86SelectRet()
1261 SrcVT = MVT::i8; in X86SelectRet()
1553 if (SrcVT == MVT::i1) { in X86SelectZExt()
1556 SrcVT = MVT::i8; in X86SelectZExt()
1611 if (SrcVT == MVT::i1) { in X86SelectSExt()
1622 SrcVT = MVT::i8; in X86SelectSExt()
2409 if (SrcVT != MVT::i32 && SrcVT != MVT::i64) in X86SelectIntToFP()
2535 if (SrcVT == MVT::i8) { in X86SelectTrunc()
[all …]
H A DX86ISelLowering.cpp11585 SrcVT = MVT::getVectorVT(SrcVT, NumSrcElts); in matchShuffleAsVTRUNC()
19896 if (SrcVT != MVT::f32 && SrcVT != MVT::f64) in lowerFPToIntToFP()
20050 if (SrcVT == MVT::v2i64 || SrcVT == MVT::v4i64) in LowerSINT_TO_FP()
20056 assert(SrcVT <= MVT::i64 && SrcVT >= MVT::i16 && in LowerSINT_TO_FP()
21383 (SrcVT == MVT::v4f64 || SrcVT == MVT::v4f32 || SrcVT == MVT::v8f32) && in LowerFP_TO_INT()
21416 (SrcVT == MVT::v2f64 || SrcVT == MVT::v4f64 || SrcVT == MVT::v4f32) && in LowerFP_TO_INT()
21630 if (SrcVT != MVT::f32 && SrcVT != MVT::f64 && SrcVT != MVT::f80) { in LRINT_LLRINTHelper()
29481 assert((SrcVT == MVT::v2i32 || SrcVT == MVT::v4i16 || SrcVT == MVT::v8i8 || in LowerBITCAST()
37853 if ((SrcVT == MVT::v2f64 || SrcVT == MVT::v4f32 || SrcVT == MVT::v2i64 || in combineTargetShuffle()
40301 (SrcVT == MVT::v2i32 || SrcVT == MVT::v4i16 || SrcVT == MVT::v8i8) && in combineBitcast()
[all …]
H A DX86SelectionDAGInfo.cpp280 EVT SrcVT = Src.getValueType(); in emitConstantSizeRepmov() local
284 DAG.getNode(ISD::ADD, dl, SrcVT, Src, DAG.getConstant(Offset, dl, SrcVT)), in emitConstantSizeRepmov()
H A DX86ISelLowering.h1302 bool isExtractSubvectorCheap(EVT ResVT, EVT SrcVT,
1376 std::pair<SDValue, SDValue> BuildFILD(EVT DstVT, EVT SrcVT, const SDLoc &DL,
/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DAMDGPUISelLowering.cpp2567 EVT SrcVT = Src.getValueType(); in LowerUINT_TO_FP() local
2569 if (SrcVT == MVT::i16) { in LowerUINT_TO_FP()
2604 EVT SrcVT = Src.getValueType(); in LowerSINT_TO_FP() local
2606 if (SrcVT == MVT::i16) { in LowerSINT_TO_FP()
2644 EVT SrcVT = Src.getValueType(); in LowerFP_TO_INT64() local
2646 assert(SrcVT == MVT::f32 || SrcVT == MVT::f64); in LowerFP_TO_INT64()
2672 if (SrcVT == MVT::f64) { in LowerFP_TO_INT64()
2823 if (DestVT == MVT::i16 && (SrcVT == MVT::f32 || SrcVT == MVT::f64)) { in LowerFP_TO_INT()
2830 if (SrcVT == MVT::f16 || in LowerFP_TO_INT()
2840 if (DestVT == MVT::i64 && (SrcVT == MVT::f32 || SrcVT == MVT::f64)) in LowerFP_TO_INT()
[all …]
H A DSIInstrInfo.td264 class isFloatType<ValueType SrcVT> {
265 bit ret = !or(!eq(SrcVT.Value, f16.Value),
266 !eq(SrcVT.Value, f32.Value),
267 !eq(SrcVT.Value, f64.Value),
268 !eq(SrcVT.Value, v2f16.Value),
275 class isIntType<ValueType SrcVT> {
276 bit ret = !or(!eq(SrcVT.Value, i16.Value),
277 !eq(SrcVT.Value, i32.Value),
278 !eq(SrcVT.Value, i64.Value),
282 class isPackedType<ValueType SrcVT> {
[all …]
/freebsd-13.1/contrib/llvm-project/llvm/lib/CodeGen/
H A DTypePromotion.cpp972 EVT SrcVT = TLI->getValueType(DL, I->getType()); in runOnFunction() local
973 if (SrcVT.isSimple() && TLI->isTypeLegal(SrcVT.getSimpleVT())) in runOnFunction()
976 if (TLI->getTypeAction(ICmp->getContext(), SrcVT) != in runOnFunction()
979 EVT PromotedVT = TLI->getTypeToTransformTo(ICmp->getContext(), SrcVT); in runOnFunction()
/freebsd-13.1/contrib/llvm-project/llvm/lib/Transforms/Scalar/
H A DScalarizer.cpp701 VectorType *SrcVT = dyn_cast<VectorType>(BCI.getSrcTy()); in visitBitCastInst() local
702 if (!DstVT || !SrcVT) in visitBitCastInst()
706 unsigned SrcNumElems = cast<FixedVectorType>(SrcVT)->getNumElements(); in visitBitCastInst()
738 auto *MidTy = FixedVectorType::get(SrcVT->getElementType(), FanIn); in visitBitCastInst()
/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/RISCV/
H A DRISCVISelLowering.h306 bool isTruncateFree(EVT SrcVT, EVT DstVT) const override;
308 bool isSExtCheaperThanZExt(EVT SrcVT, EVT DstVT) const override;
H A DRISCVISelLowering.cpp964 !SrcVT.isInteger() || !DstVT.isInteger()) in isTruncateFree()
966 unsigned SrcBits = SrcVT.getSizeInBits(); in isTruncateFree()
2215 MVT SrcVT = Src.getSimpleValueType(); in LowerOperation() local
2216 MVT SrcEltVT = SrcVT.getVectorElementType(); in LowerOperation()
2223 MVT ContainerVT = SrcVT; in LowerOperation()
2224 if (SrcVT.isFixedLengthVector()) { in LowerOperation()
2242 if (SrcVT.isFixedLengthVector()) in LowerOperation()
2304 MVT SrcVT = Src.getSimpleValueType(); in LowerOperation() local
2308 if (SrcVT.isFixedLengthVector()) { in LowerOperation()
2344 MVT SrcVT = Src.getSimpleValueType(); in LowerOperation() local
[all …]
/freebsd-13.1/contrib/llvm-project/llvm/include/llvm/CodeGen/
H A DTargetLowering.h2679 virtual bool isFPExtFree(EVT DestVT, EVT SrcVT) const { in isFPExtFree() argument
2680 assert(SrcVT.isFloatingPoint() && DestVT.isFloatingPoint() && in isFPExtFree()
2689 EVT DestVT, EVT SrcVT) const { in isFPExtFoldable() argument
2690 assert(DestVT.isFloatingPoint() && SrcVT.isFloatingPoint() && in isFPExtFoldable()
2692 return isFPExtFree(DestVT, SrcVT); in isFPExtFoldable()
2769 virtual bool isExtractSubvectorCheap(EVT ResVT, EVT SrcVT, in isExtractSubvectorCheap() argument

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