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Searched refs:PPC (Results 1 – 25 of 117) sorted by relevance

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/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/PowerPC/MCTargetDesc/
H A DPPCPredicates.cpp18 PPC::Predicate PPC::InvertPredicate(PPC::Predicate Opcode) { in InvertPredicate()
20 case PPC::PRED_EQ: return PPC::PRED_NE; in InvertPredicate()
21 case PPC::PRED_NE: return PPC::PRED_EQ; in InvertPredicate()
22 case PPC::PRED_LT: return PPC::PRED_GE; in InvertPredicate()
23 case PPC::PRED_GE: return PPC::PRED_LT; in InvertPredicate()
24 case PPC::PRED_GT: return PPC::PRED_LE; in InvertPredicate()
25 case PPC::PRED_LE: return PPC::PRED_GT; in InvertPredicate()
26 case PPC::PRED_NU: return PPC::PRED_UN; in InvertPredicate()
27 case PPC::PRED_UN: return PPC::PRED_NU; in InvertPredicate()
52 PPC::Predicate PPC::getSwappedPredicate(PPC::Predicate Opcode) { in getSwappedPredicate()
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H A DPPCMCTargetDesc.h173 PPC_REGS_LO_HI(PPC::VSL, PPC::V); \
175 PPC_REGS_LO_HI(PPC::F, PPC::VF); \
177 PPC_REGS_LO_HI(PPC::F, PPC::VF); \
179 PPC::CR0LT, PPC::CR0GT, PPC::CR0EQ, PPC::CR0UN, \
180 PPC::CR1LT, PPC::CR1GT, PPC::CR1EQ, PPC::CR1UN, \
181 PPC::CR2LT, PPC::CR2GT, PPC::CR2EQ, PPC::CR2UN, \
182 PPC::CR3LT, PPC::CR3GT, PPC::CR3EQ, PPC::CR3UN, \
183 PPC::CR4LT, PPC::CR4GT, PPC::CR4EQ, PPC::CR4UN, \
184 PPC::CR5LT, PPC::CR5GT, PPC::CR5EQ, PPC::CR5UN, \
185 PPC::CR6LT, PPC::CR6GT, PPC::CR6EQ, PPC::CR6UN, \
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H A DPPCInstPrinter.cpp63 (MI->getOpcode() == PPC::ADDIS8 || MI->getOpcode() == PPC::ADDIS) && in printInst()
161 if (MI->getOpcode() == PPC::DCBT || MI->getOpcode() == PPC::DCBTST) { in printInst()
225 case PPC::PRED_LT: in printPredicateOperand()
230 case PPC::PRED_LE: in printPredicateOperand()
235 case PPC::PRED_EQ: in printPredicateOperand()
240 case PPC::PRED_GE: in printPredicateOperand()
245 case PPC::PRED_GT: in printPredicateOperand()
250 case PPC::PRED_NE: in printPredicateOperand()
255 case PPC::PRED_UN: in printPredicateOperand()
260 case PPC::PRED_NU: in printPredicateOperand()
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H A DPPCAsmBackend.cpp35 case PPC::fixup_ppc_nofixup: in adjustFixupValue()
37 case PPC::fixup_ppc_brcond14: in adjustFixupValue()
40 case PPC::fixup_ppc_br24: in adjustFixupValue()
41 case PPC::fixup_ppc_br24abs: in adjustFixupValue()
44 case PPC::fixup_ppc_half16: in adjustFixupValue()
48 case PPC::fixup_ppc_pcrel34: in adjustFixupValue()
49 case PPC::fixup_ppc_imm34: in adjustFixupValue()
61 case PPC::fixup_ppc_half16: in getFixupKindNumBytes()
67 case PPC::fixup_ppc_br24: in getFixupKindNumBytes()
68 case PPC::fixup_ppc_br24abs: in getFixupKindNumBytes()
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H A DPPCMCCodeEmitter.cpp52 ((MI.getOpcode() == PPC::BL8_NOTOC || in getDirectBrEncoding()
53 MI.getOpcode() == PPC::BL8_NOTOC_TLS) in getDirectBrEncoding()
138 (MCFixupKind)PPC::fixup_ppc_imm34); in getImm34EncodingNoPCRel()
146 (MCFixupKind)PPC::fixup_ppc_pcrel34); in getImm34EncodingPCRel()
389 return CTX.getRegisterInfo()->getEncodingValue(isPPC64 ? PPC::X13 : PPC::R2); in getTLSRegEncoding()
409 assert((MI.getOpcode() == PPC::MTOCRF || MI.getOpcode() == PPC::MTOCRF8 || in get_crbitm_encoding()
410 MI.getOpcode() == PPC::MFOCRF || MI.getOpcode() == PPC::MFOCRF8) && in get_crbitm_encoding()
411 (MO.getReg() >= PPC::CR0 && MO.getReg() <= PPC::CR7)); in get_crbitm_encoding()
436 assert((MI.getOpcode() != PPC::MTOCRF && MI.getOpcode() != PPC::MTOCRF8 && in getMachineOpValue()
437 MI.getOpcode() != PPC::MFOCRF && MI.getOpcode() != PPC::MFOCRF8) || in getMachineOpValue()
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/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/PowerPC/
H A DPPCInstrInfo.cpp303 {PPC::XSMADDADP, PPC::XSADDDP, PPC::XSMULDP, 1, 2, PPC::XSSUBDP},
304 {PPC::XSMADDASP, PPC::XSADDSP, PPC::XSMULSP, 1, 2, PPC::XSSUBSP},
305 {PPC::XVMADDADP, PPC::XVADDDP, PPC::XVMULDP, 1, 2, PPC::XVSUBDP},
306 {PPC::XVMADDASP, PPC::XVADDSP, PPC::XVMULSP, 1, 2, PPC::XVSUBSP},
307 {PPC::FMADD, PPC::FADD, PPC::FMUL, 3, 1, PPC::FSUB},
308 {PPC::FMADDS, PPC::FADDS, PPC::FMULS, 3, 1, PPC::FSUBS}};
3269 Opc == PPC::ORI || Opc == PPC::ORI8 || Opc == PPC::XORI || in getForwardingDefMI()
3866 III.ImmOpcode = Opc == PPC::ADD4 ? PPC::ADDI : PPC::ADDI8; in instrHasImmForm()
3875 III.ImmOpcode = Opc == PPC::ADDC ? PPC::ADDIC : PPC::ADDIC8; in instrHasImmForm()
3899 III.ImmOpcode = Opc == PPC::CMPW ? PPC::CMPWI : PPC::CMPDI; in instrHasImmForm()
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H A DPPCRegisterInfo.cpp100 ImmToIdxMap[PPC::LD] = PPC::LDX; ImmToIdxMap[PPC::STD] = PPC::STDX; in PPCRegisterInfo()
101 ImmToIdxMap[PPC::LBZ] = PPC::LBZX; ImmToIdxMap[PPC::STB] = PPC::STBX; in PPCRegisterInfo()
102 ImmToIdxMap[PPC::LHZ] = PPC::LHZX; ImmToIdxMap[PPC::LHA] = PPC::LHAX; in PPCRegisterInfo()
103 ImmToIdxMap[PPC::LWZ] = PPC::LWZX; ImmToIdxMap[PPC::LWA] = PPC::LWAX; in PPCRegisterInfo()
104 ImmToIdxMap[PPC::LFS] = PPC::LFSX; ImmToIdxMap[PPC::LFD] = PPC::LFDX; in PPCRegisterInfo()
105 ImmToIdxMap[PPC::STH] = PPC::STHX; ImmToIdxMap[PPC::STW] = PPC::STWX; in PPCRegisterInfo()
106 ImmToIdxMap[PPC::STFS] = PPC::STFSX; ImmToIdxMap[PPC::STFD] = PPC::STFDX; in PPCRegisterInfo()
111 ImmToIdxMap[PPC::LHA8] = PPC::LHAX8; ImmToIdxMap[PPC::LBZ8] = PPC::LBZX8; in PPCRegisterInfo()
112 ImmToIdxMap[PPC::LHZ8] = PPC::LHZX8; ImmToIdxMap[PPC::LWZ8] = PPC::LWZX8; in PPCRegisterInfo()
113 ImmToIdxMap[PPC::STB8] = PPC::STBX8; ImmToIdxMap[PPC::STH8] = PPC::STHX8; in PPCRegisterInfo()
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H A DPPCInstrInfo.h138 PPC::LWZ, PPC::LD, PPC::LFD, PPC::LFS, PPC::RESTORE_CR, \
139 PPC::RESTORE_CRBIT, PPC::LVX, PPC::LXVD2X, PPC::LXSDX, PPC::LXSSPX, \
146 PPC::LWZ, PPC::LD, PPC::LFD, PPC::LFS, PPC::RESTORE_CR, \
147 PPC::RESTORE_CRBIT, PPC::LVX, PPC::LXV, PPC::DFLOADf64, \
154 PPC::LWZ, PPC::LD, PPC::LFD, PPC::LFS, PPC::RESTORE_CR, \
155 PPC::RESTORE_CRBIT, PPC::LVX, PPC::LXV, PPC::DFLOADf64, \
156 PPC::DFLOADf32, PPC::SPILLTOVSR_LD, PPC::LXVP, PPC::RESTORE_ACC, \
162 PPC::STW, PPC::STD, PPC::STFD, PPC::STFS, PPC::SPILL_CR, PPC::SPILL_CRBIT, \
163 PPC::STVX, PPC::STXVD2X, PPC::STXSDX, PPC::STXSSPX, \
170 PPC::STW, PPC::STD, PPC::STFD, PPC::STFS, PPC::SPILL_CR, PPC::SPILL_CRBIT, \
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H A DPPCVSXSwapRemoval.cpp337 case PPC::LVX: in gatherVectorInstructions()
362 case PPC::STVX: in gatherVectorInstructions()
376 case PPC::COPY: in gatherVectorInstructions()
433 case PPC::LVSL: in gatherVectorInstructions()
434 case PPC::LVSR: in gatherVectorInstructions()
435 case PPC::LVXL: in gatherVectorInstructions()
489 case PPC::VRLB: in gatherVectorInstructions()
490 case PPC::VRLD: in gatherVectorInstructions()
491 case PPC::VRLH: in gatherVectorInstructions()
496 case PPC::VSL: in gatherVectorInstructions()
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H A DPPCCallingConv.cpp37 PPC::R3, PPC::R4, PPC::R5, PPC::R6, in CC_PPC32_SVR4_Custom_AlignArgRegs()
38 PPC::R7, PPC::R8, PPC::R9, PPC::R10, in CC_PPC32_SVR4_Custom_AlignArgRegs()
62 PPC::R3, PPC::R4, PPC::R5, PPC::R6, in CC_PPC32_SVR4_Custom_SkipLastArgRegsPPCF128()
63 PPC::R7, PPC::R8, PPC::R9, PPC::R10, in CC_PPC32_SVR4_Custom_SkipLastArgRegsPPCF128()
87 PPC::F1, PPC::F2, PPC::F3, PPC::F4, PPC::F5, PPC::F6, PPC::F7, in CC_PPC32_SVR4_Custom_AlignFPArgRegs()
88 PPC::F8 in CC_PPC32_SVR4_Custom_AlignFPArgRegs()
97 if (RegNum != NumArgRegs && ArgRegs[RegNum] == PPC::F8) { in CC_PPC32_SVR4_Custom_AlignFPArgRegs()
114 static const MCPhysReg HiRegList[] = { PPC::R3, PPC::R5, PPC::R7, PPC::R9 }; in CC_PPC32_SPE_CustomSplitFP64()
115 static const MCPhysReg LoRegList[] = { PPC::R4, PPC::R6, PPC::R8, PPC::R10 }; in CC_PPC32_SPE_CustomSplitFP64()
143 static const MCPhysReg HiRegList[] = { PPC::R3 }; in CC_PPC32_SPE_RetF64()
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H A DPPCFastISel.cpp478 Opc = Is32BitInt ? PPC::LBZ : PPC::LBZ8; in PPCEmitLoad()
566 case PPC::LFS: Opc = IsVSSRC ? PPC::LXSSPX : PPC::LFSX; break; in PPCEmitLoad()
567 case PPC::LFD: Opc = IsVSFRC ? PPC::LXSDX : PPC::LFDX; break; in PPCEmitLoad()
712 case PPC::STFS: Opc = IsVSSRC ? PPC::STXSSPX : PPC::STFSX; break; in PPCEmitStore()
713 case PPC::STFD: Opc = IsVSFRC ? PPC::STXSDX : PPC::STFDX; break; in PPCEmitStore()
1229 Opc = InRC == &PPC::GPRCRegClass ? PPC::EFSCTSIZ : PPC::EFDCTSIZ; in SelectFPToI()
1231 Opc = InRC == &PPC::GPRCRegClass ? PPC::EFSCTUIZ : PPC::EFDCTUIZ; in SelectFPToI()
1288 Opc = IsGPRC ? PPC::ADD4 : PPC::ADD8; in SelectBinaryIntOp()
1291 Opc = IsGPRC ? PPC::OR : PPC::OR8; in SelectBinaryIntOp()
1294 Opc = IsGPRC ? PPC::SUBF : PPC::SUBF8; in SelectBinaryIntOp()
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H A DPPCRegisterInfo.h28 if (SrcReg == PPC::CR0LT || SrcReg == PPC::CR0GT || in getCRFromCRBit()
29 SrcReg == PPC::CR0EQ || SrcReg == PPC::CR0UN) in getCRFromCRBit()
31 else if (SrcReg == PPC::CR1LT || SrcReg == PPC::CR1GT || in getCRFromCRBit()
32 SrcReg == PPC::CR1EQ || SrcReg == PPC::CR1UN) in getCRFromCRBit()
34 else if (SrcReg == PPC::CR2LT || SrcReg == PPC::CR2GT || in getCRFromCRBit()
35 SrcReg == PPC::CR2EQ || SrcReg == PPC::CR2UN) in getCRFromCRBit()
38 SrcReg == PPC::CR3EQ || SrcReg == PPC::CR3UN) in getCRFromCRBit()
41 SrcReg == PPC::CR4EQ || SrcReg == PPC::CR4UN) in getCRFromCRBit()
44 SrcReg == PPC::CR5EQ || SrcReg == PPC::CR5UN) in getCRFromCRBit()
47 SrcReg == PPC::CR6EQ || SrcReg == PPC::CR6UN) in getCRFromCRBit()
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H A DPPCMIPeephole.cpp202 if (Opcode == PPC::LHZ || Opcode == PPC::LHZX || in getKnownLeadingZeroCount()
203 Opcode == PPC::LHZ8 || Opcode == PPC::LHZX8 || in getKnownLeadingZeroCount()
204 Opcode == PPC::LHZU || Opcode == PPC::LHZUX || in getKnownLeadingZeroCount()
205 Opcode == PPC::LHZU8 || Opcode == PPC::LHZUX8) in getKnownLeadingZeroCount()
208 if (Opcode == PPC::LBZ || Opcode == PPC::LBZX || in getKnownLeadingZeroCount()
209 Opcode == PPC::LBZ8 || Opcode == PPC::LBZX8 || in getKnownLeadingZeroCount()
211 Opcode == PPC::LBZU8 || Opcode == PPC::LBZUX8) in getKnownLeadingZeroCount()
1048 if (opCode == PPC::CMPLD) return PPC::CMPD; in getSignedCmpOpCode()
1049 if (opCode == PPC::CMPLW) return PPC::CMPW; in getSignedCmpOpCode()
1050 if (opCode == PPC::CMPLDI) return PPC::CMPDI; in getSignedCmpOpCode()
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H A DPPCFrameLowering.cpp386 unsigned FPReg = is31 ? PPC::R31 : PPC::R1; in replaceFPWithRealFP()
387 unsigned FP8Reg = is31 ? PPC::X31 : PPC::X1; in replaceFPWithRealFP()
648 Register SPReg = isPPC64 ? PPC::X1 : PPC::R1; in emitPrologue()
650 Register FPReg = isPPC64 ? PPC::X31 : PPC::R31; in emitPrologue()
651 Register LRReg = isPPC64 ? PPC::LR8 : PPC::LR; in emitPrologue()
652 Register TOCReg = isPPC64 ? PPC::X2 : PPC::R2; in emitPrologue()
1177 if (Reg == PPC::LR || Reg == PPC::LR8 || Reg == PPC::RM) continue; in emitPrologue()
1257 Register SPReg = isPPC64 ? PPC::X1 : PPC::R1; in inlineStackProbe()
2018 SavedRegs.reset(isPPC64 ? PPC::X31 : PPC::R31); in determineCalleeSaves()
2091 (Reg != PPC::X2 && Reg != PPC::R2)) && in processFunctionBeforeFrameFinalized()
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H A DPPCTLSDynamicCall.cpp84 Register GPR3 = Is64Bit ? PPC::X3 : PPC::R3; in processBlock()
85 Register GPR4 = Is64Bit ? PPC::X4 : PPC::R4; in processBlock()
97 case PPC::ADDItlsgdLADDR: in processBlock()
98 Opc1 = PPC::ADDItlsgdL; in processBlock()
99 Opc2 = PPC::GETtlsADDR; in processBlock()
101 case PPC::ADDItlsldLADDR: in processBlock()
102 Opc1 = PPC::ADDItlsldL; in processBlock()
113 case PPC::TLSGDAIX8: in processBlock()
118 case PPC::TLSGDAIX: in processBlock()
123 case PPC::PADDI8pc: in processBlock()
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H A DPPCPreEmitPeephole.cpp55 case PPC::LBZ: in hasPCRelativeForm()
57 case PPC::LHA: in hasPCRelativeForm()
59 case PPC::LHZ: in hasPCRelativeForm()
61 case PPC::LWZ: in hasPCRelativeForm()
63 case PPC::STB: in hasPCRelativeForm()
65 case PPC::STH: in hasPCRelativeForm()
67 case PPC::STW: in hasPCRelativeForm()
69 case PPC::LD: in hasPCRelativeForm()
70 case PPC::STD: in hasPCRelativeForm()
71 case PPC::LWA: in hasPCRelativeForm()
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H A DPPCISelDAGToDAG.cpp952 unsigned Opcode = ImmHi16 ? PPC::LIS8 : PPC::LI8; in selectI64ImmDirect()
1064 unsigned Opcode = ImmHi16 ? PPC::LIS8 : PPC::LI8; in selectI64ImmDirect()
4113 return UseSPE ? PPC::PRED_GT : PPC::PRED_EQ; in getPredicateForSetCC()
4116 return UseSPE ? PPC::PRED_LE : PPC::PRED_NE; in getPredicateForSetCC()
4119 return UseSPE ? PPC::PRED_GT : PPC::PRED_LT; in getPredicateForSetCC()
4128 return UseSPE ? PPC::PRED_LE : PPC::PRED_GE; in getPredicateForSetCC()
4678 PCC = IsCCNE ? PPC::PRED_UN : PPC::PRED_NU; in tryFoldSWTestBRCC()
4681 PCC = IsCCNE ? PPC::PRED_EQ : PPC::PRED_NE; in tryFoldSWTestBRCC()
4684 PCC = IsCCNE ? PPC::PRED_GT : PPC::PRED_LE; in tryFoldSWTestBRCC()
4687 PCC = IsCCNE ? PPC::PRED_LT : PPC::PRED_GE; in tryFoldSWTestBRCC()
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H A DPPCAsmPrinter.cpp332 Reg = PPC::VSX32 + (Reg - PPC::V0); in PrintAsmOperand()
334 Reg = PPC::VSX32 + (Reg - PPC::VF0); in PrintAsmOperand()
1120 TmpInst.setOpcode(IsPPC64 ? PPC::LD : PPC::LWZ); in emitInstruction()
1334 MI->getOpcode() == PPC::MFOCRF ? PPC::MFCR : PPC::MFCR8; in emitInstruction()
1348 MI->getOpcode() == PPC::MTOCRF ? PPC::MTCRF : PPC::MTCRF8; in emitInstruction()
1378 MCInstBuilder(PPC::ORI).addReg(PPC::X2).addReg(PPC::X2).addImm(0)); in emitInstruction()
1381 MCInstBuilder(PPC::ORI).addReg(PPC::X2).addReg(PPC::X2).addImm(0)); in emitInstruction()
1419 MCInstBuilder(PPC::STD).addReg(PPC::X0).addImm(-8).addReg(PPC::X1)); in emitInstruction()
1504 MCInstBuilder(PPC::STD).addReg(PPC::X0).addImm(-8).addReg(PPC::X1)); in emitInstruction()
2077 for (unsigned Reg = PPC::V0; Reg <= PPC::V31; ++Reg) in emitTracebackTable()
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H A DPPCExpandAtomicPseudoInsts.cpp95 case PPC::ATOMIC_SWAP_I128: in expandMI()
187 TRIVIAL_ATOMICRMW(PPC::ATOMIC_LOAD_OR_I128, PPC::OR8); in expandAtomicRMW128()
188 TRIVIAL_ATOMICRMW(PPC::ATOMIC_LOAD_XOR_I128, PPC::XOR8); in expandAtomicRMW128()
189 TRIVIAL_ATOMICRMW(PPC::ATOMIC_LOAD_AND_I128, PPC::AND8); in expandAtomicRMW128()
190 TRIVIAL_ATOMICRMW(PPC::ATOMIC_LOAD_NAND_I128, PPC::NAND8); in expandAtomicRMW128()
197 .addImm(PPC::PRED_NE) in expandAtomicRMW128()
198 .addReg(PPC::CR0) in expandAtomicRMW128()
268 .addImm(PPC::PRED_NE) in expandAtomicCmpSwap128()
269 .addReg(PPC::CR0) in expandAtomicCmpSwap128()
279 .addImm(PPC::PRED_NE) in expandAtomicCmpSwap128()
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H A DPPCHazardRecognizers.cpp95 case PPC::Sched::IIC_IntDivW: in mustComeFirst()
96 case PPC::Sched::IIC_IntDivD: in mustComeFirst()
98 case PPC::Sched::IIC_LdStLDU: in mustComeFirst()
101 case PPC::Sched::IIC_LdStLHA: in mustComeFirst()
103 case PPC::Sched::IIC_LdStLWA: in mustComeFirst()
104 case PPC::Sched::IIC_LdStSTU: in mustComeFirst()
164 if (Directive == PPC::DIR_PWR6 || Directive == PPC::DIR_PWR7 || in PreEmitNoops()
165 Directive == PPC::DIR_PWR8 || Directive == PPC::DIR_PWR9) in PreEmitNoops()
225 if (Directive == PPC::DIR_PWR6 || Directive == PPC::DIR_PWR7 || in EmitNoop()
226 Directive == PPC::DIR_PWR8 || Directive == PPC::DIR_PWR9 || in EmitNoop()
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H A DPPCReduceCRLogicals.cpp162 : OrigBROpcode == PPC::BCLR ? PPC::BCLRn : PPC::BCLR; in splitMBB()
274 if (BROp == PPC::BC || BROp == PPC::BCLR) { in computeBranchTargetAndInversion()
310 } else if (BROp == PPC::BCn || BROp == PPC::BCLRn) { in computeBranchTargetAndInversion()
392 return Opc == PPC::CRAND || Opc == PPC::CRNAND || Opc == PPC::CROR || in isCRLogical()
393 Opc == PPC::CRXOR || Opc == PPC::CRNOR || Opc == PPC::CREQV || in isCRLogical()
394 Opc == PPC::CRANDC || Opc == PPC::CRORC || Opc == PPC::CRSET || in isCRLogical()
395 Opc == PPC::CRUNSET || Opc == PPC::CR6SET || Opc == PPC::CR6UNSET; in isCRLogical()
501 if (Opc == PPC::ISEL || Opc == PPC::ISEL8) in createCRLogicalOpInfo()
503 if (Opc == PPC::BC || Opc == PPC::BCn || Opc == PPC::BCLR || in createCRLogicalOpInfo()
550 if (CopySrc == PPC::CR0EQ || CopySrc == PPC::CR6EQ) in lookThroughCRCopy()
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H A DPPCBranchSelector.cpp112 !Fn.getRegInfo().use_empty(PPC::X2)) in GetInitialOffset()
337 else if ((I->getOpcode() == PPC::BC || I->getOpcode() == PPC::BCn) && in runOnMachineFunction()
340 else if ((I->getOpcode() == PPC::BDNZ8 || I->getOpcode() == PPC::BDNZ || in runOnMachineFunction()
341 I->getOpcode() == PPC::BDZ8 || I->getOpcode() == PPC::BDZ) && in runOnMachineFunction()
364 if (I->getOpcode() == PPC::BCC) { in runOnMachineFunction()
369 PPC::Predicate Pred = (PPC::Predicate)I->getOperand(0).getImm(); in runOnMachineFunction()
373 BuildMI(MBB, I, dl, TII->get(PPC::BCC)) in runOnMachineFunction()
375 } else if (I->getOpcode() == PPC::BC) { in runOnMachineFunction()
378 } else if (I->getOpcode() == PPC::BCn) { in runOnMachineFunction()
381 } else if (I->getOpcode() == PPC::BDNZ) { in runOnMachineFunction()
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H A DPPCISelLowering.cpp4131 PPC::F1, PPC::F2, PPC::F3, PPC::F4, PPC::F5, PPC::F6, PPC::F7, in LowerFormalArguments_32SVR4()
4238 PPC::X3, PPC::X4, PPC::X5, PPC::X6, in LowerFormalArguments_64SVR4()
4239 PPC::X7, PPC::X8, PPC::X9, PPC::X10, in LowerFormalArguments_64SVR4()
4242 PPC::V2, PPC::V3, PPC::V4, PPC::V5, PPC::V6, PPC::V7, PPC::V8, in LowerFormalArguments_64SVR4()
4243 PPC::V9, PPC::V10, PPC::V11, PPC::V12, PPC::V13 in LowerFormalArguments_64SVR4()
4706 PPC::X3, PPC::X4, PPC::X5, PPC::X6, in needStackSlotPassParameters()
4710 PPC::V2, PPC::V3, PPC::V4, PPC::V5, PPC::V6, PPC::V7, PPC::V8, in needStackSlotPassParameters()
4711 PPC::V9, PPC::V10, PPC::V11, PPC::V12, PPC::V13 in needStackSlotPassParameters()
5940 PPC::X3, PPC::X4, PPC::X5, PPC::X6, in LowerCall_64SVR4()
5944 PPC::V2, PPC::V3, PPC::V4, PPC::V5, PPC::V6, PPC::V7, PPC::V8, in LowerCall_64SVR4()
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/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/PowerPC/AsmParser/
H A DPPCAsmParser.cpp869 TmpInst.setOpcode(Opcode == PPC::EXTLWI ? PPC::RLWINM : PPC::RLWINM_rec); in ProcessInstruction()
883 TmpInst.setOpcode(Opcode == PPC::EXTRWI ? PPC::RLWINM : PPC::RLWINM_rec); in ProcessInstruction()
897 TmpInst.setOpcode(Opcode == PPC::INSLWI ? PPC::RLWIMI : PPC::RLWIMI_rec); in ProcessInstruction()
912 TmpInst.setOpcode(Opcode == PPC::INSRWI ? PPC::RLWIMI : PPC::RLWIMI_rec); in ProcessInstruction()
926 TmpInst.setOpcode(Opcode == PPC::ROTRWI ? PPC::RLWINM : PPC::RLWINM_rec); in ProcessInstruction()
939 TmpInst.setOpcode(Opcode == PPC::SLWI ? PPC::RLWINM : PPC::RLWINM_rec); in ProcessInstruction()
952 TmpInst.setOpcode(Opcode == PPC::SRWI ? PPC::RLWINM : PPC::RLWINM_rec); in ProcessInstruction()
965 TmpInst.setOpcode(Opcode == PPC::CLRRWI ? PPC::RLWINM : PPC::RLWINM_rec); in ProcessInstruction()
1044 TmpInst.setOpcode(Opcode == PPC::SLDI ? PPC::RLDICR : PPC::RLDICR_rec); in ProcessInstruction()
1065 TmpInst.setOpcode(Opcode == PPC::SRDI ? PPC::RLDICL : PPC::RLDICL_rec); in ProcessInstruction()
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/freebsd-13.1/contrib/llvm-project/lld/ELF/Arch/
H A DPPC.cpp24 class PPC final : public TargetInfo { class
26 PPC();
152 PPC::PPC() { in PPC() function in PPC
179 void PPC::writeIplt(uint8_t *buf, const Symbol &sym, in writeIplt()
186 void PPC::writeGotHeader(uint8_t *buf) const { in writeGotHeader()
193 void PPC::writeGotPlt(uint8_t *buf, const Symbol &s) const { in writeGotPlt()
206 return !PPC::inBranchRange(type, branchAddr, s.getVA(a)); in needsThunk()
218 RelExpr PPC::getRelExpr(RelType type, const Symbol &s, in getRelExpr()
272 RelType PPC::getDynRel(RelType type) const { in getDynRel()
387 int PPC::getTlsGdRelaxSkip(RelType type) const { in getTlsGdRelaxSkip()
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