Lines Matching refs:PPC
132 assert((MF.getRegInfo().use_empty(PPC::X2) || in runOnMachineFunction()
172 if (Opcode == PPC::RLDICL || Opcode == PPC::RLDICL_rec || in getKnownLeadingZeroCount()
173 Opcode == PPC::RLDCL || Opcode == PPC::RLDCL_rec) in getKnownLeadingZeroCount()
176 if ((Opcode == PPC::RLDIC || Opcode == PPC::RLDIC_rec) && in getKnownLeadingZeroCount()
180 if ((Opcode == PPC::RLWINM || Opcode == PPC::RLWINM_rec || in getKnownLeadingZeroCount()
181 Opcode == PPC::RLWNM || Opcode == PPC::RLWNM_rec || in getKnownLeadingZeroCount()
182 Opcode == PPC::RLWINM8 || Opcode == PPC::RLWNM8) && in getKnownLeadingZeroCount()
186 if (Opcode == PPC::ANDI_rec) { in getKnownLeadingZeroCount()
191 if (Opcode == PPC::CNTLZW || Opcode == PPC::CNTLZW_rec || in getKnownLeadingZeroCount()
192 Opcode == PPC::CNTTZW || Opcode == PPC::CNTTZW_rec || in getKnownLeadingZeroCount()
193 Opcode == PPC::CNTLZW8 || Opcode == PPC::CNTTZW8) in getKnownLeadingZeroCount()
197 if (Opcode == PPC::CNTLZD || Opcode == PPC::CNTLZD_rec || in getKnownLeadingZeroCount()
198 Opcode == PPC::CNTTZD || Opcode == PPC::CNTTZD_rec) in getKnownLeadingZeroCount()
202 if (Opcode == PPC::LHZ || Opcode == PPC::LHZX || in getKnownLeadingZeroCount()
203 Opcode == PPC::LHZ8 || Opcode == PPC::LHZX8 || in getKnownLeadingZeroCount()
204 Opcode == PPC::LHZU || Opcode == PPC::LHZUX || in getKnownLeadingZeroCount()
205 Opcode == PPC::LHZU8 || Opcode == PPC::LHZUX8) in getKnownLeadingZeroCount()
208 if (Opcode == PPC::LBZ || Opcode == PPC::LBZX || in getKnownLeadingZeroCount()
209 Opcode == PPC::LBZ8 || Opcode == PPC::LBZX8 || in getKnownLeadingZeroCount()
210 Opcode == PPC::LBZU || Opcode == PPC::LBZUX || in getKnownLeadingZeroCount()
211 Opcode == PPC::LBZU8 || Opcode == PPC::LBZUX8) in getKnownLeadingZeroCount()
294 if (Opcode == PPC::COPY) { in collectUnprimedAccPHIs()
297 MRI->getRegClass(Reg) != &PPC::ACCRCRegClass) in collectUnprimedAccPHIs()
299 } else if (Opcode != PPC::IMPLICIT_DEF && Opcode != PPC::PHI) in collectUnprimedAccPHIs()
305 if (Opcode != PPC::PHI) in collectUnprimedAccPHIs()
337 assert((Opcode == PPC::COPY || Opcode == PPC::IMPLICIT_DEF || in convertUnprimedAccPHIs()
338 Opcode == PPC::PHI) && in convertUnprimedAccPHIs()
340 if (Opcode == PPC::COPY) { in convertUnprimedAccPHIs()
342 &PPC::ACCRCRegClass && in convertUnprimedAccPHIs()
345 } else if (Opcode == PPC::IMPLICIT_DEF) { in convertUnprimedAccPHIs()
346 Register AccReg = MRI->createVirtualRegister(&PPC::ACCRCRegClass); in convertUnprimedAccPHIs()
348 TII->get(PPC::IMPLICIT_DEF), AccReg); in convertUnprimedAccPHIs()
351 } else if (Opcode == PPC::PHI) { in convertUnprimedAccPHIs()
370 AccReg = MRI->createVirtualRegister(&PPC::ACCRCRegClass); in convertUnprimedAccPHIs()
372 *PHI->getParent(), PHI, PHI->getDebugLoc(), TII->get(PPC::PHI), AccReg); in convertUnprimedAccPHIs()
433 case PPC::COPY: { in simplifyCode()
439 if (MRI->getRegClass(Src) != &PPC::UACCRCRegClass || in simplifyCode()
440 MRI->getRegClass(Dst) != &PPC::ACCRCRegClass) in simplifyCode()
453 if (RootPHI->getOpcode() != PPC::PHI) in simplifyCode()
465 case PPC::LI: in simplifyCode()
466 case PPC::LI8: { in simplifyCode()
481 case PPC::STW: in simplifyCode()
482 case PPC::STD: { in simplifyCode()
495 case PPC::XXPERMDI: { in simplifyCode()
530 if (DefOpc != PPC::XVCVDPSXDS && DefOpc != PPC::XVCVDPUXDS) in simplifyCode()
536 if (LoadMI && LoadMI->getOpcode() == PPC::LXVDSX) in simplifyCode()
542 (DefOpc == PPC::LXVDSX || isConversionOfLoadAndSplat())) { in simplifyCode()
546 BuildMI(MBB, &MI, MI.getDebugLoc(), TII->get(PPC::COPY), in simplifyCode()
555 if (DefOpc == PPC::XXPERMDI) { in simplifyCode()
576 BuildMI(MBB, &MI, MI.getDebugLoc(), TII->get(PPC::COPY), in simplifyCode()
600 BuildMI(MBB, &MI, MI.getDebugLoc(), TII->get(PPC::COPY), in simplifyCode()
606 } else if ((Immed == 0 || Immed == 3) && DefOpc == PPC::XXPERMDIs && in simplifyCode()
619 case PPC::VSPLTB: in simplifyCode()
620 case PPC::VSPLTH: in simplifyCode()
621 case PPC::XXSPLTW: { in simplifyCode()
623 unsigned OpNo = MyOpcode == PPC::XXSPLTW ? 1 : 2; in simplifyCode()
633 if (DefOpcode != PPC::XVCVSPSXWS && DefOpcode != PPC::XVCVSPUXWS) in simplifyCode()
639 return Splt && (Splt->getOpcode() == PPC::LXVWSX || in simplifyCode()
640 Splt->getOpcode() == PPC::XXSPLTW); in simplifyCode()
643 (MyOpcode == PPC::VSPLTB && DefOpcode == PPC::VSPLTBs) || in simplifyCode()
644 (MyOpcode == PPC::VSPLTH && DefOpcode == PPC::VSPLTHs) || in simplifyCode()
645 (MyOpcode == PPC::XXSPLTW && DefOpcode == PPC::XXSPLTWs) || in simplifyCode()
646 (MyOpcode == PPC::XXSPLTW && DefOpcode == PPC::LXVWSX) || in simplifyCode()
647 (MyOpcode == PPC::XXSPLTW && DefOpcode == PPC::MTVSRWS)|| in simplifyCode()
648 (MyOpcode == PPC::XXSPLTW && isConvertOfSplat()); in simplifyCode()
654 BuildMI(MBB, &MI, MI.getDebugLoc(), TII->get(PPC::COPY), in simplifyCode()
662 if (DefOpcode == PPC::XXSLDWI) { in simplifyCode()
668 MI.getOperand(MyOpcode == PPC::XXSPLTW ? 2 : 1).getImm(); in simplifyCode()
686 case PPC::XVCVDPSP: { in simplifyCode()
696 if (DefMI && DefMI->getOpcode() == PPC::XXPERMDI) { in simplifyCode()
715 if ((Opc == PPC::FRSP || Opc == PPC::XSRSP) && in simplifyCode()
747 case PPC::EXTSH: in simplifyCode()
748 case PPC::EXTSH8: in simplifyCode()
749 case PPC::EXTSH8_32_64: { in simplifyCode()
758 if (SrcMI->getOpcode() == PPC::LHZ || in simplifyCode()
759 SrcMI->getOpcode() == PPC::LHZX) { in simplifyCode()
763 return Opcode == PPC::EXTSH8; in simplifyCode()
766 return Opcode == PPC::LHZX; in simplifyCode()
770 if (isXForm) return PPC::LHAX8; in simplifyCode()
771 else return PPC::LHA8; in simplifyCode()
773 if (isXForm) return PPC::LHAX; in simplifyCode()
774 else return PPC::LHA; in simplifyCode()
791 case PPC::EXTSW: in simplifyCode()
792 case PPC::EXTSW_32: in simplifyCode()
793 case PPC::EXTSW_32_64: { in simplifyCode()
802 if (SrcMI->getOpcode() == PPC::LWZ || in simplifyCode()
803 SrcMI->getOpcode() == PPC::LWZX) { in simplifyCode()
807 return Opcode == PPC::EXTSW || Opcode == PPC::EXTSW_32_64; in simplifyCode()
810 return Opcode == PPC::LWZX; in simplifyCode()
814 if (isXForm) return PPC::LWAX; in simplifyCode()
815 else return PPC::LWA; in simplifyCode()
817 if (isXForm) return PPC::LWAX_32; in simplifyCode()
818 else return PPC::LWA_32; in simplifyCode()
832 } else if (MI.getOpcode() == PPC::EXTSW_32_64 && in simplifyCode()
838 MF->getRegInfo().createVirtualRegister(&PPC::G8RCRegClass); in simplifyCode()
839 BuildMI(MBB, &MI, MI.getDebugLoc(), TII->get(PPC::IMPLICIT_DEF), in simplifyCode()
841 BuildMI(MBB, &MI, MI.getDebugLoc(), TII->get(PPC::INSERT_SUBREG), in simplifyCode()
845 .addImm(PPC::sub_32); in simplifyCode()
852 case PPC::RLDICL: { in simplifyCode()
869 if (!(SrcMI && SrcMI->getOpcode() == PPC::INSERT_SUBREG && in simplifyCode()
876 if (ImpDefMI->getOpcode() != PPC::IMPLICIT_DEF) break; in simplifyCode()
879 if (SubRegMI->getOpcode() == PPC::COPY) { in simplifyCode()
888 BuildMI(MBB, &MI, MI.getDebugLoc(), TII->get(PPC::COPY), in simplifyCode()
902 case PPC::ADD4: in simplifyCode()
903 case PPC::ADD8: { in simplifyCode()
908 return DefPhiMI && (DefPhiMI->getOpcode() == PPC::PHI) && in simplifyCode()
925 (LiMI->getOpcode() != PPC::LI && LiMI->getOpcode() != PPC::LI8) in simplifyCode()
944 const TargetRegisterClass *TRC = MI.getOpcode() == PPC::ADD8 in simplifyCode()
945 ? &PPC::G8RC_and_G8RC_NOX0RegClass in simplifyCode()
946 : &PPC::GPRC_and_GPRC_NOR0RegClass; in simplifyCode()
959 if (LiMI->getOpcode() == PPC::ADDI || LiMI->getOpcode() == PPC::ADDI8) in simplifyCode()
962 assert((LiMI->getOpcode() == PPC::LI || in simplifyCode()
963 LiMI->getOpcode() == PPC::LI8) && in simplifyCode()
967 LiMI->setDesc(TII->get(LiMI->getOpcode() == PPC::LI ? PPC::ADDI in simplifyCode()
968 : PPC::ADDI8)); in simplifyCode()
978 BuildMI(MBB, &MI, MI.getDebugLoc(), TII->get(PPC::COPY), in simplifyCode()
986 case PPC::RLDICR: { in simplifyCode()
991 case PPC::RLWINM: in simplifyCode()
992 case PPC::RLWINM_rec: in simplifyCode()
993 case PPC::RLWINM8: in simplifyCode()
994 case PPC::RLWINM8_rec: { in simplifyCode()
1025 PPC::Predicate Pred = (PPC::Predicate)BI->getOperand(0).getImm(); in isEqOrNe()
1026 unsigned PredCond = PPC::getPredicateCondition(Pred); in isEqOrNe()
1027 return (PredCond == PPC::PRED_EQ || PredCond == PPC::PRED_NE); in isEqOrNe()
1031 return (opCode == PPC::CMPLD || opCode == PPC::CMPD || in isSupportedCmpOp()
1032 opCode == PPC::CMPLW || opCode == PPC::CMPW || in isSupportedCmpOp()
1033 opCode == PPC::CMPLDI || opCode == PPC::CMPDI || in isSupportedCmpOp()
1034 opCode == PPC::CMPLWI || opCode == PPC::CMPWI); in isSupportedCmpOp()
1038 return (opCode == PPC::CMPLD || opCode == PPC::CMPD || in is64bitCmpOp()
1039 opCode == PPC::CMPLDI || opCode == PPC::CMPDI); in is64bitCmpOp()
1043 return (opCode == PPC::CMPD || opCode == PPC::CMPW || in isSignedCmpOp()
1044 opCode == PPC::CMPDI || opCode == PPC::CMPWI); in isSignedCmpOp()
1048 if (opCode == PPC::CMPLD) return PPC::CMPD; in getSignedCmpOpCode()
1049 if (opCode == PPC::CMPLW) return PPC::CMPW; in getSignedCmpOpCode()
1050 if (opCode == PPC::CMPLDI) return PPC::CMPDI; in getSignedCmpOpCode()
1051 if (opCode == PPC::CMPLWI) return PPC::CMPWI; in getSignedCmpOpCode()
1063 PPC::Predicate Pred = (PPC::Predicate)BI->getOperand(0).getImm(); in getPredicateToDecImm()
1064 unsigned PredCond = PPC::getPredicateCondition(Pred); in getPredicateToDecImm()
1065 unsigned PredHint = PPC::getPredicateHint(Pred); in getPredicateToDecImm()
1066 if (PredCond == PPC::PRED_GE) in getPredicateToDecImm()
1067 return PPC::getPredicate(PPC::PRED_GT, PredHint); in getPredicateToDecImm()
1068 if (PredCond == PPC::PRED_LT) in getPredicateToDecImm()
1069 return PPC::getPredicate(PPC::PRED_LE, PredHint); in getPredicateToDecImm()
1082 PPC::Predicate Pred = (PPC::Predicate)BI->getOperand(0).getImm(); in getPredicateToIncImm()
1083 unsigned PredCond = PPC::getPredicateCondition(Pred); in getPredicateToIncImm()
1084 unsigned PredHint = PPC::getPredicateHint(Pred); in getPredicateToIncImm()
1085 if (PredCond == PPC::PRED_GT) in getPredicateToIncImm()
1086 return PPC::getPredicate(PPC::PRED_GE, PredHint); in getPredicateToIncImm()
1087 if (PredCond == PPC::PRED_LE) in getPredicateToIncImm()
1088 return PPC::getPredicate(PPC::PRED_LT, PredHint); in getPredicateToIncImm()
1114 if (BB1 && Inst->getOpcode() == PPC::PHI && Inst->getParent() == BB2) { in getSrcVReg()
1140 (*BII).getOpcode() == PPC::BCC && in eligibleForCompareElimination()
1209 if (Inst->getParent() == &MBB && Inst->getOpcode() != PPC::PHI) in eligibleForCompareElimination()
1365 PPC::Predicate Pred = (PPC::Predicate)BI2->getOperand(0).getImm(); in eliminateRedundantCompare()
1366 NewPredicate2 = (unsigned)PPC::getSwappedPredicate(Pred); in eliminateRedundantCompare()
1478 assert(Inst->getOpcode() == PPC::PHI && in eliminateRedundantCompare()
1488 Register NewVReg = MRI->createVirtualRegister(&PPC::CRRCRegClass); in eliminateRedundantCompare()
1490 TII->get(PPC::PHI), NewVReg) in eliminateRedundantCompare()
1524 if (MI.getOpcode() != PPC::RLDICR) in emitRLDICWhenLoweringJumpTables()
1532 if (SrcMI->getOpcode() != PPC::RLDICL) in emitRLDICWhenLoweringJumpTables()
1565 MI.setDesc(TII->get(PPC::RLDIC)); in emitRLDICWhenLoweringJumpTables()
1597 if (MI.getOpcode() != PPC::RLDICR) in combineSEXTAndSHL()
1620 if (SrcMI->getOpcode() != PPC::EXTSW && in combineSEXTAndSHL()
1621 SrcMI->getOpcode() != PPC::EXTSW_32_64) in combineSEXTAndSHL()
1641 SrcMI->getOpcode() == PPC::EXTSW ? TII->get(PPC::EXTSWSLI) in combineSEXTAndSHL()
1642 : TII->get(PPC::EXTSWSLI_32_64), in combineSEXTAndSHL()