| /freebsd-12.1/contrib/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | ResourcePriorityQueue.cpp | 94 if (TLI->isTypeLegal(VT) in numberRCValPredInSU() 131 if (TLI->isTypeLegal(VT) in numberRCValSuccInSU() 327 if (TLI->isTypeLegal(VT) in rawRegPressureDelta() 339 if (TLI->isTypeLegal(VT) && TLI->getRegClassFor(VT) in rawRegPressureDelta() 475 if (TLI->isTypeLegal(VT)) { in scheduledNode() 486 if (TLI->isTypeLegal(VT)) { in scheduledNode()
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| H A D | LegalizeTypes.cpp | 139 } else if (isTypeLegal(VT) || IgnoreNodeResults(&Node)) { in PerformExpensiveChecks() 450 if (!isTypeLegal(Node.getValueType(i)) && in run() 451 !TLI.isTypeLegal(Node.getValueType(i))) { in run() 460 !isTypeLegal(Node.getOperand(i).getValueType()) && in run() 461 !TLI.isTypeLegal(Node.getOperand(i).getValueType())) { in run()
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| H A D | FastISel.cpp | 373 if (!TLI.isTypeLegal(VT)) { in getRegForValue() 595 if (!TLI.isTypeLegal(VT)) { in selectBinaryOp() 1504 if (!TLI.isTypeLegal(DstVT)) in selectCast() 1508 if (!TLI.isTypeLegal(SrcVT)) in selectCast() 1541 !TLI.isTypeLegal(SrcEVT) || !TLI.isTypeLegal(DstEVT)) in selectBitCast() 1736 if (!TLI.isTypeLegal(IntVT)) in selectFNeg() 1770 if (!TLI.isTypeLegal(VT) && VT != MVT::i1) in selectExtractValue() 2281 if (VT == MVT::Other || !TLI.isTypeLegal(VT)) { in handlePHINodesInSuccessorBlocks()
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| H A D | LegalizeTypesGeneric.cpp | 114 while (!isTypeLegal(NVT)) { in ExpandRes_BITCAST() 124 if (isTypeLegal(NVT)) { in ExpandRes_BITCAST() 356 if (!isTypeLegal(NVT)) { in ExpandOp_BITCAST()
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| H A D | LegalizeVectorTypes.cpp | 1544 if (TLI.isTypeLegal(SrcVT) && !TLI.isTypeLegal(SplitSrcVT) && in SplitVecRes_ExtendOp() 1545 TLI.isTypeLegal(NewSrcVT) && TLI.isTypeLegal(SplitLoVT)) { in SplitVecRes_ExtendOp() 2281 if (isTypeLegal(LoOutVT) || in SplitVecOp_TruncateHelper() 2611 } while (!TLI.isTypeLegal(NextVT)); in CollectOpsToWiden() 2669 while (!TLI.isTypeLegal(VT) && NumElts != 1) { in WidenVecRes_BinaryCanTrap() 2744 while (!TLI.isTypeLegal(VT) && NumElts != 1) { in WidenVecRes_StrictFP() 2883 if (TLI.isTypeLegal(InWidenVT)) { in WidenVecRes_Convert() 3102 if (TLI.isTypeLegal(NewInVT)) { in WidenVecRes_BITCAST() 3754 if (TLI.isTypeLegal(FixedVT) && in WidenVecOp_EXTEND() 3818 if (TLI.isTypeLegal(WideVT)) { in WidenVecOp_Convert() [all …]
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| H A D | InstrEmitter.cpp | 108 if (TLI->isTypeLegal(VT)) in EmitCopyFromReg() 228 if (i < NumResults && TLI->isTypeLegal(Node->getSimpleValueType(i))) { in CreateVirtualRegisters() 400 TLI->isTypeLegal(OpVT) ? TLI->getRegClassFor(OpVT) : nullptr; in AddOperand()
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| H A D | DAGCombiner.cpp | 3882 if (!TLI.isTypeLegal(XVT)) in hoistLogicOpWithSameOpcodeHands() 5191 TLI.isTypeLegal(VT)) { in visitOR() 12966 if (isTypeLegal(STMemType)) in getTruncatedStoreValue() 13872 if (!DC->isTypeLegal(VT)) in ShrinkLoadReplaceStoreWithStore() 14684 if (TLI.isTypeLegal(Ty) && TLI.isTypeLegal(MemVT) && in MergeConsecutiveStores() 16059 if (!isTypeLegal(VecVT) || in reduceBuildVecExtToExtBuildVec() 16280 if (!isTypeLegal(VT)) in reduceBuildVecToShuffle() 16611 if (TLI.isTypeLegal(OpVT)) in combineConcatVectorOfScalars() 16797 if (!TLI.isTypeLegal(NVT) || !TLI.isTypeLegal(Scalar.getValueType())) in visitCONCAT_VECTORS() 17702 TLI.isTypeLegal(VT)) { in visitVECTOR_SHUFFLE() [all …]
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| H A D | LegalizeDAG.cpp | 425 TLI.isTypeLegal(MVT::i32)) { in OptimizeFloatStore() 435 if (TLI.isTypeLegal(MVT::i64)) { in OptimizeFloatStore() 628 if (TLI.isTypeLegal(StVT)) { in LegalizeStoreOps() 961 TLI.isTypeLegal(Node->getValueType(i))) && in LegalizeOp() 967 TLI.isTypeLegal(Op.getValueType()) || in LegalizeOp() 1431 if (TLI.isTypeLegal(IVT)) { in getSignAsIntValue() 2337 if (SrcVT == MVT::i32 && TLI.isTypeLegal(MVT::f64)) { in ExpandLegalINT_TO_FP() 2919 if (!TLI.isTypeLegal(EltVT)) { in ExpandNode() 3214 assert(TLI.isTypeLegal(HalfType)); in ExpandNode() 3377 } else if (TLI.isTypeLegal(WideVT)) { in ExpandNode() [all …]
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| H A D | LegalizeTypes.h | 68 bool isTypeLegal(EVT VT) const { in isTypeLegal() function 74 return VT.isSimple() && TLI.isTypeLegal(VT); in isSimpleLegalType()
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| H A D | LegalizeIntegerTypes.cpp | 235 if (!TLI.isTypeLegal(SVT)) in PromoteIntRes_AtomicCmpSwap() 329 if (isTypeLegal(WideOutVT)) { in PromoteIntRes_BITCAST() 1224 assert(!((NumElts & 1) && (!TLI.isTypeLegal(VecVT))) && in PromoteIntOp_BUILD_VECTOR() 2771 if ((Action == TargetLowering::Legal && TLI.isTypeLegal(NVT)) || in ExpandIntRes_Shift() 3275 if (TLI.isTypeLegal(LHSLo.getValueType()) && in IntegerExpandSetCCOperands() 3276 TLI.isTypeLegal(RHSLo.getValueType())) in IntegerExpandSetCCOperands() 3282 if (TLI.isTypeLegal(LHSHi.getValueType()) && in IntegerExpandSetCCOperands() 3283 TLI.isTypeLegal(RHSHi.getValueType())) in IntegerExpandSetCCOperands()
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| /freebsd-12.1/contrib/llvm/lib/CodeGen/ |
| H A D | TargetLoweringBase.cpp | 716 assert(isTypeLegal(VT)); in canOpTrap() 894 if (!TLI->isTypeLegal(NewVT)) in getVectorTypeBreakdownMVT() 919 if (isTypeLegal(*I)) in isLegalRC() 1106 if (isTypeLegal(IVT)) { in computeRegisterProperties() 1117 if (isTypeLegal(MVT::f64)) { in computeRegisterProperties() 1132 if (!isTypeLegal(MVT::f128)) { in computeRegisterProperties() 1141 if (!isTypeLegal(MVT::f64)) { in computeRegisterProperties() 1150 if (!isTypeLegal(MVT::f32)) { in computeRegisterProperties() 1160 if (!isTypeLegal(MVT::f16)) { in computeRegisterProperties() 1171 if (isTypeLegal(VT)) in computeRegisterProperties() [all …]
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| H A D | Analysis.cpp | 219 TLI.isTypeLegal(EVT::getEVT(T1)) && TLI.isTypeLegal(EVT::getEVT(T2))); in isNoopBitcast()
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| /freebsd-12.1/contrib/llvm/include/llvm/CodeGen/ |
| H A D | TargetLowering.h | 493 return isTypeLegal(VT) ? VT : MVT::INVALID_SIMPLE_VALUE_TYPE; in hasFastEqualityCompare() 649 bool isTypeLegal(EVT VT) const { in isTypeLegal() function 884 return (VT == MVT::Other || isTypeLegal(VT)) && in isOperationLegalOrCustom() 893 return (VT == MVT::Other || isTypeLegal(VT)) && in isOperationLegalOrPromote() 902 return (VT == MVT::Other || isTypeLegal(VT)) && in isOperationLegalOrCustomOrPromote() 986 return (!isTypeLegal(VT) || getOperationAction(Op, VT) == Expand); in isOperationExpand() 991 return (VT == MVT::Other || isTypeLegal(VT)) && in isOperationLegal() 1042 return isTypeLegal(ValVT) && in isTruncStoreLegalOrCustom() 1131 } while (!isTypeLegal(NVT) || in getTypeToPromoteTo() 2233 if (!Load->hasOneUse() && (isTypeLegal(LoadVT) || !isTypeLegal(VT)) && in isExtLoad() [all …]
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| H A D | BasicTTIImpl.h | 273 bool isTypeLegal(Type *Ty) { in isTypeLegal() function 275 return getTLI()->isTypeLegal(VT); in isTypeLegal() 387 return TLI->isTypeLegal(VT) && in haveFastSqrt()
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| /freebsd-12.1/contrib/llvm/lib/Target/X86/ |
| H A D | X86FastISel.cpp | 252 if (!isTypeLegal(RetTy, RetVT)) in foldX86XALUIntrinsic() 1533 if (!TLI.isTypeLegal(DstVT)) in X86SelectZExt() 1592 if (!TLI.isTypeLegal(DstVT)) in X86SelectSExt() 1839 if (!isTypeLegal(I->getType(), VT)) in X86SelectShift() 1926 if (!isTypeLegal(I->getType(), VT)) in X86SelectDivRem() 2551 if (!TLI.isTypeLegal(SrcVT)) in X86SelectTrunc() 2691 if (!isTypeLegal(RetTy, VT)) in fastLowerIntrinsicCall() 2825 if (!isTypeLegal(RetTy, VT)) in fastLowerIntrinsicCall() 2889 if (!isTypeLegal(RetTy, VT)) in fastLowerIntrinsicCall() 3022 if (!isTypeLegal(RetTy, VT)) in fastLowerIntrinsicCall() [all …]
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| /freebsd-12.1/contrib/llvm/lib/Target/ARM/ |
| H A D | ARMFastISel.cpp | 192 bool isTypeLegal(Type *Ty, MVT &VT); 692 bool ARMFastISel::isTypeLegal(Type *Ty, MVT &VT) { in isTypeLegal() function in ARMFastISel 701 return TLI.isTypeLegal(VT); in isTypeLegal() 705 if (isTypeLegal(Ty, VT)) return true; in isLoadTypeLegal() 1554 if (!isTypeLegal(Ty, DstVT)) in SelectIToFP() 1599 if (!isTypeLegal(RetTy, DstVT)) in SelectFPToI() 1628 if (!isTypeLegal(I->getType(), VT)) in SelectSelect() 1705 if (!isTypeLegal(Ty, VT)) in SelectDiv() 1734 if (!isTypeLegal(Ty, VT)) in SelectRem() 2221 else if (!isTypeLegal(RetTy, RetVT)) in ARMEmitLibcall() [all …]
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| H A D | ARMISelLowering.cpp | 10805 if(!DAG.getTargetLoweringInfo().isTypeLegal(VT)) in PerformANDCombine() 11041 if(!DAG.getTargetLoweringInfo().isTypeLegal(VT)) in PerformORCombine() 11134 if(!DAG.getTargetLoweringInfo().isTypeLegal(VT)) in PerformXORCombine() 11449 if (!TLI.isTypeLegal(VecVT)) in PerformARMBUILD_VECTORCombine() 11534 if (!TLI.isTypeLegal(VT) || in PerformVECTOR_SHUFFLECombine() 11536 !TLI.isTypeLegal(Concat1Op1.getValueType())) in PerformVECTOR_SHUFFLECombine() 11999 if (!TLI.isTypeLegal(StoreType)) in PerformSTORECombine() 12419 if (!VT.isVector() || !TLI.isTypeLegal(VT)) in PerformShiftCombine() 12468 TLI.isTypeLegal(Vec.getValueType()) && in PerformExtendCombine() 13073 if (!isTypeLegal(VT)) in isVectorLoadExtDesirable() [all …]
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| /freebsd-12.1/contrib/llvm/lib/Target/PowerPC/ |
| H A D | PPCFastISel.cpp | 146 bool isTypeLegal(Type *Ty, MVT &VT); 285 bool PPCFastISel::isTypeLegal(Type *Ty, MVT &VT) { in isTypeLegal() function in PPCFastISel 294 return TLI.isTypeLegal(VT); in isTypeLegal() 300 if (isTypeLegal(Ty, VT)) return true; in isLoadTypeLegal() 1072 if (!isTypeLegal(DstTy, DstVT)) in SelectIToFP() 1197 if (!isTypeLegal(DstTy, DstVT)) in SelectFPToI() 1210 if (!isTypeLegal(SrcTy, SrcVT)) in SelectFPToI() 1581 else if (!isTypeLegal(RetTy, RetVT) && RetVT != MVT::i16 && in fastLowerCall() 1627 if (!isTypeLegal(ArgTy, ArgVT) && ArgVT != MVT::i16 && ArgVT != MVT::i8) in fastLowerCall()
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| /freebsd-12.1/contrib/llvm/lib/Target/Mips/ |
| H A D | MipsFastISel.cpp | 173 bool isTypeLegal(Type *Ty, MVT &VT); 597 bool MipsFastISel::isTypeLegal(Type *Ty, MVT &VT) { in isTypeLegal() function in MipsFastISel 606 return TLI.isTypeLegal(VT); in isTypeLegal() 613 if (isTypeLegal(Ty, VT)) in isTypeSupported() 625 if (isTypeLegal(Ty, VT)) in isLoadTypeLegal() 1108 if (!isTypeLegal(DstTy, DstVT)) in selectFPToInt() 1116 if (!isTypeLegal(SrcTy, SrcVT)) in selectFPToInt() 1526 if (!isTypeLegal(Val->getType(), VT) && in fastLowerCall()
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| /freebsd-12.1/contrib/llvm/lib/Target/AArch64/ |
| H A D | AArch64FastISel.cpp | 183 bool isTypeLegal(Type *Ty, MVT &VT); 526 if (!isTypeLegal(CFP->getType(), VT)) in fastMaterializeFloatZero() 964 return TLI.isTypeLegal(VT); in isTypeLegal() 975 if (isTypeLegal(Ty, VT)) in isTypeSupported() 3358 if (!isTypeLegal(RetTy, RetVT)) in foldXALUIntrinsic() 3583 if (!isTypeLegal(II->getType(), VT)) in fastLowerIntrinsicCall() 3616 if (!isTypeLegal(RetTy, VT)) in fastLowerIntrinsicCall() 3643 if (!isTypeLegal(RetTy, VT)) in fastLowerIntrinsicCall() 4794 if (!isTypeLegal(I->getType(), RetVT)) in selectBitCast() 4870 if (!isTypeLegal(I->getType(), VT)) in selectSDiv() [all …]
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| /freebsd-12.1/contrib/llvm/include/llvm/Analysis/ |
| H A D | TargetTransformInfo.h | 546 bool isTypeLegal(Type *Ty) const; 1083 virtual bool isTypeLegal(Type *Ty) = 0; 1342 bool isTypeLegal(Type *Ty) override { return Impl.isTypeLegal(Ty); } in isTypeLegal() function
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| H A D | TargetTransformInfoImpl.h | 288 bool isTypeLegal(Type *Ty) { return false; } in isTypeLegal() function
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| /freebsd-12.1/contrib/llvm/lib/Analysis/ |
| H A D | VectorUtils.cpp | 351 !TTI->isTypeLegal(I.getOperand(0)->getType())) in computeMinimumValueSizes() 360 if (TTI && isa<TruncInst>(&I) && TTI->isTypeLegal(I.getType())) in computeMinimumValueSizes()
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| H A D | TargetTransformInfo.cpp | 220 bool TargetTransformInfo::isTypeLegal(Type *Ty) const { in isTypeLegal() function in TargetTransformInfo 221 return TTIImpl->isTypeLegal(Ty); in isTypeLegal()
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| /freebsd-12.1/contrib/llvm/lib/Target/Sparc/ |
| H A D | SparcISelLowering.cpp | 2339 && (!hasHardQuad || !TLI.isTypeLegal(VT))) { in LowerFP_TO_SINT() 2347 if (!TLI.isTypeLegal(VT)) in LowerFP_TO_SINT() 2370 && (!hasHardQuad || !TLI.isTypeLegal(OpVT))) { in LowerSINT_TO_FP() 2378 if (!TLI.isTypeLegal(OpVT)) in LowerSINT_TO_FP() 2396 (hasHardQuad && TLI.isTypeLegal(VT))) in LowerFP_TO_UINT() 2417 if (Op.getValueType() != MVT::f128 || (hasHardQuad && TLI.isTypeLegal(OpVT))) in LowerUINT_TO_FP()
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