Searched refs:PPCInstrInfo (Results 1 – 23 of 23) sorted by relevance
99 void PPCInstrInfo::anchor() {} in anchor()101 PPCInstrInfo::PPCInstrInfo(PPCSubtarget &STI) in PPCInstrInfo() function in PPCInstrInfo269 bool PPCInstrInfo::getMachineCombinerPatterns( in getMachineCombinerPatterns()456 void PPCInstrInfo::insertNoop(MachineBasicBlock &MBB, in insertNoop()476 void PPCInstrInfo::getNoop(MCInst &NopInst) const { in getNoop()892 void PPCInstrInfo::copyPhysReg(MachineBasicBlock &MBB, in copyPhysReg()1099 PPCInstrInfo::getLoadOpcodeForSpill(unsigned Reg, in getLoadOpcodeForSpill()1184 void PPCInstrInfo::StoreRegToStackSlot( in StoreRegToStackSlot()1298 bool PPCInstrInfo::1539 bool PPCInstrInfo::DefinesPredicate(MachineInstr &MI, in DefinesPredicate()[all …]
65 const PPCInstrInfo *TII = MF.getSubtarget<PPCSubtarget>().getInstrInfo(); in runOnMachineFunction()72 if (PPCInstrInfo::isSameClassPhysRegCopy(Opc)) { in runOnMachineFunction()
149 PPCInstrInfo InstrInfo;182 const PPCInstrInfo *getInstrInfo() const override { return &InstrInfo; } in getInstrInfo()
74 const PPCInstrInfo *TII = in runOnMachineFunction()75 static_cast<const PPCInstrInfo *>(Fn.getSubtarget().getInstrInfo()); in runOnMachineFunction()
117 class PPCInstrInfo : public PPCGenInstrInfo {184 explicit PPCInstrInfo(PPCSubtarget &STI);
49 const PPCInstrInfo *TII;
204 . Define DAG Node in PPCInstrInfo.td:249 . Define DAG Node in PPCInstrInfo.td:500 . Need define ix16addr in PPCInstrInfo.td501 ix16addr: 16-byte aligned, see "def memrix16" in PPCInstrInfo.td
159 const PPCInstrInfo *TII = MF->getSubtarget<PPCSubtarget>().getInstrInfo(); in splitMBB()354 const PPCInstrInfo *TII;
720 const PPCInstrInfo &TII = *Subtarget.getInstrInfo(); in emitPrologue()1254 const PPCInstrInfo &TII = *Subtarget.getInstrInfo(); in emitEpilogue()1580 const PPCInstrInfo &TII = *Subtarget.getInstrInfo(); in createTailCallBranchInstr()2043 const PPCInstrInfo &TII = *Subtarget.getInstrInfo(); in spillCalleeSavedRegisters()2120 const PPCInstrInfo &TII = *MF->getSubtarget<PPCSubtarget>().getInstrInfo(); in restoreCRs()2200 const PPCInstrInfo &TII = *Subtarget.getInstrInfo(); in restoreCalleeSavedRegisters()
68 const PPCInstrInfo *TII;
450 def PPCInstrInfo : InstrInfo {475 let InstructionSet = PPCInstrInfo;
168 unsigned Reg = PPCInstrInfo::getRegNumForOperand(MI->getDesc(), in printOperand()259 if (PPCInstrInfo::isVRRegister(Reg)) in PrintAsmOperand()261 else if (PPCInstrInfo::isVFRegister(Reg)) in PrintAsmOperand()
76 const PPCInstrInfo *TII;142 getKnownLeadingZeroCount(MachineInstr *MI, const PPCInstrInfo *TII) { in getKnownLeadingZeroCount()
13 include "PPCInstrInfo.td"
104 const PPCInstrInfo *TII;
34 /// These fields correspond to the fields in PPCInstrInfo.h. Any changes to105 /// These fields correspond to the fields in PPCInstrInfo.h. Any changes to
200 // PPCInstrInfo::convertToImmediateForm() but we should probably not emit them
1 //===-- PPCInstrInfo.td - The PowerPC Instruction Set ------*- tablegen -*-===//1661 // PPCInstrInfo::convertToImmediateForm() but we should probably not emit them
2576 int NewOpc = PPCInstrInfo::getRecordFormOpcode(NonRecOpc); in tryLogicOpOfCompares()
13456 const PPCInstrInfo *TII = Subtarget.getInstrInfo(); in getPrefLoopAlignment()
273 PPCInstrInfo::getRegNumForOperand(MCII.get(MI.getOpcode()), in getMachineOpValue()
511 Reg = PPCInstrInfo::getRegNumForOperand(MII.get(MI->getOpcode()), in printOperand()
1112 SRCS_MIN+= Target/PowerPC/PPCInstrInfo.cpp