| /freebsd-12.1/contrib/llvm/lib/Target/AVR/ |
| H A D | AVRISelLowering.cpp | 539 SDValue LHSlo = DAG.getNode(ISD::EXTRACT_ELEMENT, DL, MVT::i16, LHS, in getAVRCmp() 541 SDValue LHShi = DAG.getNode(ISD::EXTRACT_ELEMENT, DL, MVT::i16, LHS, in getAVRCmp() 543 SDValue RHSlo = DAG.getNode(ISD::EXTRACT_ELEMENT, DL, MVT::i16, RHS, in getAVRCmp() 545 SDValue RHShi = DAG.getNode(ISD::EXTRACT_ELEMENT, DL, MVT::i16, RHS, in getAVRCmp() 550 SDValue Top = DAG.getNode(ISD::EXTRACT_ELEMENT, DL, MVT::i8, LHShi, in getAVRCmp() 558 SDValue LHS_0 = DAG.getNode(ISD::EXTRACT_ELEMENT, DL, MVT::i32, LHS, in getAVRCmp() 560 SDValue LHS_1 = DAG.getNode(ISD::EXTRACT_ELEMENT, DL, MVT::i32, LHS, in getAVRCmp() 563 SDValue LHS0 = DAG.getNode(ISD::EXTRACT_ELEMENT, DL, MVT::i16, LHS_0, in getAVRCmp() 572 SDValue RHS_0 = DAG.getNode(ISD::EXTRACT_ELEMENT, DL, MVT::i32, RHS, in getAVRCmp() 574 SDValue RHS_1 = DAG.getNode(ISD::EXTRACT_ELEMENT, DL, MVT::i32, RHS, in getAVRCmp() [all …]
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| /freebsd-12.1/contrib/llvm/lib/Target/XCore/ |
| H A D | XCoreISelLowering.cpp | 662 LL = DAG.getNode(ISD::EXTRACT_ELEMENT, dl, MVT::i32, in TryExpandADDWithMul() 664 RL = DAG.getNode(ISD::EXTRACT_ELEMENT, dl, MVT::i32, in TryExpandADDWithMul() 666 AddendL = DAG.getNode(ISD::EXTRACT_ELEMENT, dl, MVT::i32, in TryExpandADDWithMul() 668 AddendH = DAG.getNode(ISD::EXTRACT_ELEMENT, dl, MVT::i32, in TryExpandADDWithMul() 691 LH = DAG.getNode(ISD::EXTRACT_ELEMENT, dl, MVT::i32, in TryExpandADDWithMul() 693 RH = DAG.getNode(ISD::EXTRACT_ELEMENT, dl, MVT::i32, in TryExpandADDWithMul() 720 SDValue LHSL = DAG.getNode(ISD::EXTRACT_ELEMENT, dl, MVT::i32, in ExpandADDSUB() 723 SDValue LHSH = DAG.getNode(ISD::EXTRACT_ELEMENT, dl, MVT::i32, in ExpandADDSUB() 726 SDValue RHSL = DAG.getNode(ISD::EXTRACT_ELEMENT, dl, MVT::i32, in ExpandADDSUB() 729 SDValue RHSH = DAG.getNode(ISD::EXTRACT_ELEMENT, dl, MVT::i32, in ExpandADDSUB() [all …]
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| /freebsd-12.1/contrib/llvm/include/llvm/CodeGen/ |
| H A D | ISDOpcodes.h | 184 EXTRACT_ELEMENT, enumerator
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| /freebsd-12.1/contrib/llvm/lib/Target/AMDGPU/ |
| H A D | AMDGPUISelLowering.cpp | 1587 SDValue LHS_Lo = DAG.getNode(ISD::EXTRACT_ELEMENT, DL, HalfVT, LHS, Zero); in LowerUDIVREM64() 1588 SDValue LHS_Hi = DAG.getNode(ISD::EXTRACT_ELEMENT, DL, HalfVT, LHS, One); in LowerUDIVREM64() 1591 SDValue RHS_Lo = DAG.getNode(ISD::EXTRACT_ELEMENT, DL, HalfVT, RHS, Zero); in LowerUDIVREM64() 1592 SDValue RHS_Hi = DAG.getNode(ISD::EXTRACT_ELEMENT, DL, HalfVT, RHS, One); in LowerUDIVREM64() 1641 SDValue Mulhi1_Lo = DAG.getNode(ISD::EXTRACT_ELEMENT, DL, HalfVT, Mulhi1, in LowerUDIVREM64() 1643 SDValue Mulhi1_Hi = DAG.getNode(ISD::EXTRACT_ELEMENT, DL, HalfVT, Mulhi1, in LowerUDIVREM64() 1656 SDValue Mulhi2_Lo = DAG.getNode(ISD::EXTRACT_ELEMENT, DL, HalfVT, Mulhi2, in LowerUDIVREM64() 1658 SDValue Mulhi2_Hi = DAG.getNode(ISD::EXTRACT_ELEMENT, DL, HalfVT, Mulhi2, in LowerUDIVREM64() 1674 SDValue Mul3_Hi = DAG.getNode(ISD::EXTRACT_ELEMENT, DL, HalfVT, Mul3, One); in LowerUDIVREM64() 1919 SDValue LHS_Lo = DAG.getNode(ISD::EXTRACT_ELEMENT, DL, HalfVT, LHS, Zero); in LowerSDIVREM() [all …]
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| /freebsd-12.1/contrib/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | LegalizeTypes.cpp | 979 Lo = DAG.getNode(ISD::EXTRACT_ELEMENT, dl, NVT, Pair, in GetPairElements() 981 Hi = DAG.getNode(ISD::EXTRACT_ELEMENT, dl, NVT, Pair, in GetPairElements()
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| H A D | SelectionDAGDumper.cpp | 350 case ISD::EXTRACT_ELEMENT: return "extract_element"; in getOperationName()
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| H A D | LegalizeDAG.cpp | 1042 case ISD::EXTRACT_ELEMENT: in LegalizeOp() 2987 case ISD::EXTRACT_ELEMENT: { in ExpandNode() 3381 BottomHalf = DAG.getNode(ISD::EXTRACT_ELEMENT, dl, VT, Tmp1, in ExpandNode() 3383 TopHalf = DAG.getNode(ISD::EXTRACT_ELEMENT, dl, VT, Tmp1, in ExpandNode()
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| H A D | LegalizeFloatTypes.cpp | 1065 case ISD::EXTRACT_ELEMENT: ExpandRes_EXTRACT_ELEMENT(N, Lo, Hi); break; in ExpandFloatResult() 1558 case ISD::EXTRACT_ELEMENT: Res = ExpandOp_EXTRACT_ELEMENT(N); break; in ExpandFloatOperand()
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| H A D | LegalizeIntegerTypes.cpp | 1511 case ISD::EXTRACT_ELEMENT: ExpandRes_EXTRACT_ELEMENT(N, Lo, Hi); break; in ExpandIntegerResult() 3175 case ISD::EXTRACT_ELEMENT: Res = ExpandOp_EXTRACT_ELEMENT(N); break; in ExpandIntegerOperand()
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| H A D | SelectionDAG.cpp | 3010 case ISD::EXTRACT_ELEMENT: { in computeKnownBits() 3607 case ISD::EXTRACT_ELEMENT: { in ComputeNumSignBits() 5035 case ISD::EXTRACT_ELEMENT: in getNode()
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| H A D | SelectionDAGBuilder.cpp | 603 Part1 = DAG.getNode(ISD::EXTRACT_ELEMENT, DL, in getCopyToParts() 605 Part0 = DAG.getNode(ISD::EXTRACT_ELEMENT, DL, in getCopyToParts()
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| H A D | DAGCombiner.cpp | 10168 DAG.getNode(ISD::EXTRACT_ELEMENT, SDLoc(NewConv), MVT::i64, NewConv, in visitBITCAST() 10236 ISD::EXTRACT_ELEMENT, SDLoc(XorResult), MVT::i64, XorResult, in visitBITCAST()
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| /freebsd-12.1/contrib/llvm/lib/Target/ARM/ |
| H A D | ARMISelLowering.cpp | 2704 SDValue Lo = DAG.getNode(ISD::EXTRACT_ELEMENT, DL, MVT::i32, WriteValue, in LowerWRITE_REGISTER() 2706 SDValue Hi = DAG.getNode(ISD::EXTRACT_ELEMENT, DL, MVT::i32, WriteValue, in LowerWRITE_REGISTER() 5217 SDValue Lo = DAG.getNode(ISD::EXTRACT_ELEMENT, dl, MVT::i32, Op, in ExpandBITCAST() 5219 SDValue Hi = DAG.getNode(ISD::EXTRACT_ELEMENT, dl, MVT::i32, Op, in ExpandBITCAST() 5506 SDValue Lo = DAG.getNode(ISD::EXTRACT_ELEMENT, dl, MVT::i32, N->getOperand(0), in Expand64BitShift() 5508 SDValue Hi = DAG.getNode(ISD::EXTRACT_ELEMENT, dl, MVT::i32, N->getOperand(0), in Expand64BitShift() 7838 SDValue Lo = DAG.getNode(ISD::EXTRACT_ELEMENT, DL, MVT::i32, Op, in WinDBZCheckDenominator() 7840 SDValue Hi = DAG.getNode(ISD::EXTRACT_ELEMENT, DL, MVT::i32, Op, in WinDBZCheckDenominator() 8098 SDValue Lo = DAG.getNode(ISD::EXTRACT_ELEMENT, dl, MVT::i32, in ReplaceLongIntrinsic() 8101 SDValue Hi = DAG.getNode(ISD::EXTRACT_ELEMENT, dl, MVT::i32, in ReplaceLongIntrinsic()
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| /freebsd-12.1/contrib/llvm/lib/Target/Mips/ |
| H A D | MipsSEISelLowering.cpp | 1249 SDValue InLo = DAG.getNode(ISD::EXTRACT_ELEMENT, DL, MVT::i32, In, in initAccumulator() 1251 SDValue InHi = DAG.getNode(ISD::EXTRACT_ELEMENT, DL, MVT::i32, In, in initAccumulator()
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| H A D | MipsISelLowering.cpp | 1027 BottomHalf = CurDAG.getNode(ISD::EXTRACT_ELEMENT, DL, MVT::i32, AddOperand, in performMADD_MSUBCombine() 1030 TopHalf = CurDAG.getNode(ISD::EXTRACT_ELEMENT, DL, MVT::i32, AddOperand, in performMADD_MSUBCombine()
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| /freebsd-12.1/contrib/llvm/lib/Target/Sparc/ |
| H A D | SparcISelLowering.cpp | 2957 SDValue BottomHalf = DAG.getNode(ISD::EXTRACT_ELEMENT, dl, VT, in LowerUMULO_SMULO() 2959 SDValue TopHalf = DAG.getNode(ISD::EXTRACT_ELEMENT, dl, VT, in LowerUMULO_SMULO()
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| /freebsd-12.1/contrib/llvm/lib/Target/SystemZ/ |
| H A D | SystemZISelLowering.cpp | 4902 SDValue Lo = DAG.getNode(ISD::EXTRACT_ELEMENT, DL, MVT::i64, In, in lowerI128ToGR128() 4904 SDValue Hi = DAG.getNode(ISD::EXTRACT_ELEMENT, DL, MVT::i64, In, in lowerI128ToGR128()
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| /freebsd-12.1/contrib/llvm/lib/Target/X86/ |
| H A D | X86ISelLowering.cpp | 2413 Lo = DAG.getNode(ISD::EXTRACT_ELEMENT, Dl, MVT::i32, Arg, in Passv64i1ArgInRegs() 2415 Hi = DAG.getNode(ISD::EXTRACT_ELEMENT, Dl, MVT::i32, Arg, in Passv64i1ArgInRegs() 21389 Lo = DAG.getNode(ISD::EXTRACT_ELEMENT, dl, MVT::i32, Mask, in getMaskNode() 21391 Hi = DAG.getNode(ISD::EXTRACT_ELEMENT, dl, MVT::i32, Mask, in getMaskNode() 25336 SDValue Lo = DAG.getNode(ISD::EXTRACT_ELEMENT, dl, MVT::i32, Src, in LowerBITCAST() 25339 SDValue Hi = DAG.getNode(ISD::EXTRACT_ELEMENT, dl, MVT::i32, Src, in LowerBITCAST() 26839 cpInL = DAG.getNode(ISD::EXTRACT_ELEMENT, dl, HalfT, N->getOperand(2), in ReplaceNodeResults() 26841 cpInH = DAG.getNode(ISD::EXTRACT_ELEMENT, dl, HalfT, N->getOperand(2), in ReplaceNodeResults() 26850 swapInL = DAG.getNode(ISD::EXTRACT_ELEMENT, dl, HalfT, N->getOperand(3), in ReplaceNodeResults() 26852 swapInH = DAG.getNode(ISD::EXTRACT_ELEMENT, dl, HalfT, N->getOperand(3), in ReplaceNodeResults()
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| /freebsd-12.1/contrib/llvm/lib/Target/PowerPC/ |
| H A D | PPCISelLowering.cpp | 7108 SDValue Lo = DAG.getNode(ISD::EXTRACT_ELEMENT, dl, in LowerFP_TO_INT() 7111 SDValue Hi = DAG.getNode(ISD::EXTRACT_ELEMENT, dl, in LowerFP_TO_INT()
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