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Searched refs:fc_conf (Results 1 – 25 of 38) sorted by relevance

12

/f-stack/dpdk/drivers/net/octeontx2/
H A Dotx2_flow_ctrl.c57 fc_conf->mode = RTE_FC_NONE; in otx2_nix_flow_ctrl_get()
69 fc_conf->mode = RTE_FC_FULL; in otx2_nix_flow_ctrl_get()
75 fc_conf->mode = RTE_FC_NONE; in otx2_nix_flow_ctrl_get()
153 if (fc_conf->high_water || fc_conf->low_water || fc_conf->pause_time || in otx2_nix_flow_ctrl_set()
154 fc_conf->mac_ctrl_frame_fwd || fc_conf->autoneg) { in otx2_nix_flow_ctrl_set()
159 if (fc_conf->mode == fc->mode) in otx2_nix_flow_ctrl_set()
194 fc->mode = fc_conf->mode; in otx2_nix_flow_ctrl_set()
210 fc_conf.mode = fc->mode; in otx2_nix_update_flow_ctrl_mode()
215 (fc_conf.mode == RTE_FC_FULL || fc_conf.mode == RTE_FC_RX_PAUSE)) { in otx2_nix_update_flow_ctrl_mode()
216 fc_conf.mode = in otx2_nix_update_flow_ctrl_mode()
[all …]
/f-stack/dpdk/drivers/net/octeontx/
H A Docteontx_ethdev_ops.c222 fc_conf->mode = RTE_FC_FULL; in octeontx_dev_flow_ctrl_get()
228 fc_conf->mode = RTE_FC_NONE; in octeontx_dev_flow_ctrl_get()
248 if (fc_conf->pause_time || fc_conf->mac_ctrl_frame_fwd || in octeontx_dev_flow_ctrl_set()
249 fc_conf->autoneg) { in octeontx_dev_flow_ctrl_set()
257 fc_conf->mode == fc->mode) in octeontx_dev_flow_ctrl_set()
263 fc_conf->high_water < fc_conf->low_water) { in octeontx_dev_flow_ctrl_set()
270 if (fc_conf->high_water % BIT(4) || fc_conf->low_water % BIT(4)) { in octeontx_dev_flow_ctrl_set()
292 fc->mode = fc_conf->mode; in octeontx_dev_flow_ctrl_set()
302 struct rte_eth_fc_conf fc_conf; in octeontx_dev_flow_ctrl_init() local
313 fc->def_mode = fc_conf.mode; in octeontx_dev_flow_ctrl_init()
[all …]
H A Docteontx_ethdev.h183 struct rte_eth_fc_conf *fc_conf);
185 struct rte_eth_fc_conf *fc_conf);
/f-stack/dpdk/examples/ethtool/lib/
H A Drte_ethtool.c223 struct rte_eth_fc_conf fc_conf; in rte_ethtool_get_pauseparam() local
229 status = rte_eth_dev_flow_ctrl_get(port_id, &fc_conf); in rte_ethtool_get_pauseparam()
235 switch (fc_conf.mode) { in rte_ethtool_get_pauseparam()
249 pause_param->autoneg = (uint32_t)fc_conf.autoneg; in rte_ethtool_get_pauseparam()
258 struct rte_eth_fc_conf fc_conf; in rte_ethtool_set_pauseparam() local
272 status = rte_eth_dev_flow_ctrl_get(port_id, &fc_conf); in rte_ethtool_set_pauseparam()
276 fc_conf.autoneg = (uint8_t)pause_param->autoneg; in rte_ethtool_set_pauseparam()
280 fc_conf.mode = RTE_FC_FULL; in rte_ethtool_set_pauseparam()
282 fc_conf.mode = RTE_FC_TX_PAUSE; in rte_ethtool_set_pauseparam()
285 fc_conf.mode = RTE_FC_RX_PAUSE; in rte_ethtool_set_pauseparam()
[all …]
/f-stack/dpdk/drivers/net/dpaa/
H A Ddpaa_ethdev.c479 if (dpaa_intf->fc_conf) in dpaa_eth_dev_close()
1325 if (!(dpaa_intf->fc_conf)) { in dpaa_flow_ctrl_set()
1328 if (!dpaa_intf->fc_conf) { in dpaa_flow_ctrl_set()
1333 net_fc = dpaa_intf->fc_conf; in dpaa_flow_ctrl_set()
1335 if (fc_conf->high_water < fc_conf->low_water) { in dpaa_flow_ctrl_set()
1345 fc_conf->high_water, in dpaa_flow_ctrl_set()
1346 fc_conf->low_water, in dpaa_flow_ctrl_set()
1348 if (fc_conf->pause_time) in dpaa_flow_ctrl_set()
1388 fc_conf->pause_time = in dpaa_flow_ctrl_get()
1639 if (!dpaa_intf->fc_conf) { in dpaa_fc_set_default()
[all …]
H A Ddpaa_ethdev.h117 struct rte_eth_fc_conf *fc_conf; member
/f-stack/dpdk/drivers/net/mlx4/
H A Dmlx4_ethdev.c847 mlx4_flow_ctrl_get(struct rte_eth_dev *dev, struct rte_eth_fc_conf *fc_conf) in mlx4_flow_ctrl_get() argument
864 fc_conf->autoneg = ethpause.autoneg; in mlx4_flow_ctrl_get()
866 fc_conf->mode = RTE_FC_FULL; in mlx4_flow_ctrl_get()
868 fc_conf->mode = RTE_FC_RX_PAUSE; in mlx4_flow_ctrl_get()
870 fc_conf->mode = RTE_FC_TX_PAUSE; in mlx4_flow_ctrl_get()
872 fc_conf->mode = RTE_FC_NONE; in mlx4_flow_ctrl_get()
901 ethpause.autoneg = fc_conf->autoneg; in mlx4_flow_ctrl_set()
902 if (((fc_conf->mode & RTE_FC_FULL) == RTE_FC_FULL) || in mlx4_flow_ctrl_set()
903 (fc_conf->mode & RTE_FC_RX_PAUSE)) in mlx4_flow_ctrl_set()
907 if (((fc_conf->mode & RTE_FC_FULL) == RTE_FC_FULL) || in mlx4_flow_ctrl_set()
[all …]
H A Dmlx4.h226 struct rte_eth_fc_conf *fc_conf);
228 struct rte_eth_fc_conf *fc_conf);
/f-stack/dpdk/drivers/net/e1000/
H A Dem_ethdev.c50 struct rte_eth_fc_conf *fc_conf);
52 struct rte_eth_fc_conf *fc_conf);
1669 fc_conf->low_water = hw->fc.low_water; in eth_em_flow_ctrl_get()
1670 fc_conf->send_xon = hw->fc.send_xon; in eth_em_flow_ctrl_get()
1671 fc_conf->autoneg = hw->mac.autoneg; in eth_em_flow_ctrl_get()
1689 fc_conf->mode = RTE_FC_FULL; in eth_em_flow_ctrl_get()
1691 fc_conf->mode = RTE_FC_RX_PAUSE; in eth_em_flow_ctrl_get()
1693 fc_conf->mode = RTE_FC_TX_PAUSE; in eth_em_flow_ctrl_get()
1695 fc_conf->mode = RTE_FC_NONE; in eth_em_flow_ctrl_get()
1724 (fc_conf->high_water < fc_conf->low_water)) { in eth_em_flow_ctrl_set()
[all …]
H A Digb_ethdev.c111 struct rte_eth_fc_conf *fc_conf);
113 struct rte_eth_fc_conf *fc_conf);
3022 fc_conf->low_water = hw->fc.low_water; in eth_igb_flow_ctrl_get()
3023 fc_conf->send_xon = hw->fc.send_xon; in eth_igb_flow_ctrl_get()
3024 fc_conf->autoneg = hw->mac.autoneg; in eth_igb_flow_ctrl_get()
3042 fc_conf->mode = RTE_FC_FULL; in eth_igb_flow_ctrl_get()
3044 fc_conf->mode = RTE_FC_RX_PAUSE; in eth_igb_flow_ctrl_get()
3046 fc_conf->mode = RTE_FC_TX_PAUSE; in eth_igb_flow_ctrl_get()
3048 fc_conf->mode = RTE_FC_NONE; in eth_igb_flow_ctrl_get()
3077 (fc_conf->high_water < fc_conf->low_water)) { in eth_igb_flow_ctrl_set()
[all …]
/f-stack/dpdk/drivers/net/mlx5/linux/
H A Dmlx5_ethdev_os.c632 mlx5_dev_get_flow_ctrl(struct rte_eth_dev *dev, struct rte_eth_fc_conf *fc_conf) in mlx5_dev_get_flow_ctrl() argument
649 fc_conf->autoneg = ethpause.autoneg; in mlx5_dev_get_flow_ctrl()
651 fc_conf->mode = RTE_FC_FULL; in mlx5_dev_get_flow_ctrl()
653 fc_conf->mode = RTE_FC_RX_PAUSE; in mlx5_dev_get_flow_ctrl()
655 fc_conf->mode = RTE_FC_TX_PAUSE; in mlx5_dev_get_flow_ctrl()
657 fc_conf->mode = RTE_FC_NONE; in mlx5_dev_get_flow_ctrl()
682 ethpause.autoneg = fc_conf->autoneg; in mlx5_dev_set_flow_ctrl()
683 if (((fc_conf->mode & RTE_FC_FULL) == RTE_FC_FULL) || in mlx5_dev_set_flow_ctrl()
684 (fc_conf->mode & RTE_FC_RX_PAUSE)) in mlx5_dev_set_flow_ctrl()
689 if (((fc_conf->mode & RTE_FC_FULL) == RTE_FC_FULL) || in mlx5_dev_set_flow_ctrl()
[all …]
/f-stack/dpdk/drivers/net/igc/
H A Digc_ethdev.c2148 fc_conf->low_water = hw->fc.low_water; in eth_igc_flow_ctrl_get()
2149 fc_conf->send_xon = hw->fc.send_xon; in eth_igc_flow_ctrl_get()
2150 fc_conf->autoneg = hw->mac.autoneg; in eth_igc_flow_ctrl_get()
2168 fc_conf->mode = RTE_FC_FULL; in eth_igc_flow_ctrl_get()
2170 fc_conf->mode = RTE_FC_RX_PAUSE; in eth_igc_flow_ctrl_get()
2172 fc_conf->mode = RTE_FC_TX_PAUSE; in eth_igc_flow_ctrl_get()
2174 fc_conf->mode = RTE_FC_NONE; in eth_igc_flow_ctrl_get()
2197 fc_conf->high_water < fc_conf->low_water) { in eth_igc_flow_ctrl_set()
2200 fc_conf->high_water, fc_conf->low_water, in eth_igc_flow_ctrl_set()
2205 switch (fc_conf->mode) { in eth_igc_flow_ctrl_set()
[all …]
/f-stack/dpdk/app/proc-info/
H A Dmain.c702 struct rte_eth_fc_conf fc_conf; in show_port() local
747 ret = rte_eth_dev_flow_ctrl_get(i, &fc_conf); in show_port()
748 if (ret == 0 && fc_conf.mode != RTE_FC_NONE) { in show_port()
750 fc_conf.mode == RTE_FC_RX_PAUSE ? "rx " : in show_port()
751 fc_conf.mode == RTE_FC_TX_PAUSE ? "tx " : in show_port()
752 fc_conf.mode == RTE_FC_FULL ? "full" : "???", in show_port()
753 fc_conf.autoneg ? " auto" : "", in show_port()
754 fc_conf.high_water, in show_port()
755 fc_conf.low_water, in show_port()
756 fc_conf.pause_time, in show_port()
[all …]
/f-stack/dpdk/drivers/net/cxgbe/
H A Dcxgbe_ethdev.c786 struct rte_eth_fc_conf *fc_conf) in cxgbe_flow_ctrl_get() argument
792 fc_conf->autoneg = lc->fc & PAUSE_AUTONEG; in cxgbe_flow_ctrl_get()
797 fc_conf->mode = RTE_FC_FULL; in cxgbe_flow_ctrl_get()
799 fc_conf->mode = RTE_FC_RX_PAUSE; in cxgbe_flow_ctrl_get()
801 fc_conf->mode = RTE_FC_TX_PAUSE; in cxgbe_flow_ctrl_get()
803 fc_conf->mode = RTE_FC_NONE; in cxgbe_flow_ctrl_get()
808 struct rte_eth_fc_conf *fc_conf) in cxgbe_flow_ctrl_set() argument
815 if (fc_conf->autoneg) in cxgbe_flow_ctrl_set()
821 if (((fc_conf->mode & RTE_FC_FULL) == RTE_FC_FULL) || in cxgbe_flow_ctrl_set()
822 (fc_conf->mode & RTE_FC_RX_PAUSE)) in cxgbe_flow_ctrl_set()
[all …]
/f-stack/dpdk/drivers/net/sfc/
H A Dsfc_ethdev.c853 memset(fc_conf, 0, sizeof(*fc_conf)); in sfc_flow_ctrl_get()
864 fc_conf->mode = RTE_FC_NONE; in sfc_flow_ctrl_get()
867 fc_conf->mode = RTE_FC_RX_PAUSE; in sfc_flow_ctrl_get()
870 fc_conf->mode = RTE_FC_TX_PAUSE; in sfc_flow_ctrl_get()
873 fc_conf->mode = RTE_FC_FULL; in sfc_flow_ctrl_get()
880 fc_conf->autoneg = sa->port.flow_ctrl_autoneg; in sfc_flow_ctrl_get()
895 if (fc_conf->high_water != 0 || fc_conf->low_water != 0 || in sfc_flow_ctrl_set()
896 fc_conf->pause_time != 0 || fc_conf->send_xon != 0 || in sfc_flow_ctrl_set()
897 fc_conf->mac_ctrl_frame_fwd != 0) { in sfc_flow_ctrl_set()
903 switch (fc_conf->mode) { in sfc_flow_ctrl_set()
[all …]
/f-stack/dpdk/drivers/net/ionic/
H A Dionic_ethdev.c34 struct rte_eth_fc_conf *fc_conf);
36 struct rte_eth_fc_conf *fc_conf);
468 struct rte_eth_fc_conf *fc_conf) in ionic_flow_ctrl_get() argument
475 fc_conf->autoneg = idev->port_info->config.an_enable; in ionic_flow_ctrl_get()
478 fc_conf->mode = RTE_FC_FULL; in ionic_flow_ctrl_get()
480 fc_conf->mode = RTE_FC_NONE; in ionic_flow_ctrl_get()
488 struct rte_eth_fc_conf *fc_conf) in ionic_flow_ctrl_set() argument
496 switch (fc_conf->mode) { in ionic_flow_ctrl_set()
508 an_enable = fc_conf->autoneg; in ionic_flow_ctrl_set()
/f-stack/dpdk/drivers/net/axgbe/
H A Daxgbe_ethdev.c76 struct rte_eth_fc_conf *fc_conf);
78 struct rte_eth_fc_conf *fc_conf);
1221 fc_conf->high_water = (1024 + (fc.low_water[0] << 9)) / 1024; in axgbe_flow_ctrl_get()
1223 fc_conf->pause_time = fc.pause_time[0]; in axgbe_flow_ctrl_get()
1224 fc_conf->send_xon = fc.send_xon; in axgbe_flow_ctrl_get()
1225 fc_conf->mode = fc.mode; in axgbe_flow_ctrl_get()
1238 pdata->pause_autoneg = fc_conf->autoneg; in axgbe_flow_ctrl_set()
1240 fc.send_xon = fc_conf->send_xon; in axgbe_flow_ctrl_set()
1242 AXGMAC_FLOW_CONTROL_VALUE(1024 * fc_conf->high_water)); in axgbe_flow_ctrl_set()
1244 AXGMAC_FLOW_CONTROL_VALUE(1024 * fc_conf->low_water)); in axgbe_flow_ctrl_set()
[all …]
/f-stack/dpdk/drivers/net/atlantic/
H A Datl_ethdev.c75 struct rte_eth_fc_conf *fc_conf);
77 struct rte_eth_fc_conf *fc_conf);
1524 atl_flow_ctrl_get(struct rte_eth_dev *dev, struct rte_eth_fc_conf *fc_conf) in atl_flow_ctrl_get() argument
1535 fc_conf->mode = RTE_FC_NONE; in atl_flow_ctrl_get()
1537 fc_conf->mode = RTE_FC_FULL; in atl_flow_ctrl_get()
1539 fc_conf->mode = RTE_FC_RX_PAUSE; in atl_flow_ctrl_get()
1541 fc_conf->mode = RTE_FC_TX_PAUSE; in atl_flow_ctrl_get()
1556 if (fc_conf->mode == RTE_FC_NONE) in atl_flow_ctrl_set()
1558 else if (fc_conf->mode == RTE_FC_RX_PAUSE) in atl_flow_ctrl_set()
1560 else if (fc_conf->mode == RTE_FC_TX_PAUSE) in atl_flow_ctrl_set()
[all …]
/f-stack/dpdk/drivers/net/txgbe/
H A Dtxgbe_ethdev.c2882 fc_conf->pause_time = hw->fc.pause_time; in txgbe_flow_ctrl_get()
2883 fc_conf->high_water = hw->fc.high_water[0]; in txgbe_flow_ctrl_get()
2884 fc_conf->low_water = hw->fc.low_water[0]; in txgbe_flow_ctrl_get()
2885 fc_conf->send_xon = hw->fc.send_xon; in txgbe_flow_ctrl_get()
2909 fc_conf->mode = RTE_FC_FULL; in txgbe_flow_ctrl_get()
2911 fc_conf->mode = RTE_FC_RX_PAUSE; in txgbe_flow_ctrl_get()
2913 fc_conf->mode = RTE_FC_TX_PAUSE; in txgbe_flow_ctrl_get()
2915 fc_conf->mode = RTE_FC_NONE; in txgbe_flow_ctrl_get()
2946 fc_conf->high_water < fc_conf->low_water) { in txgbe_flow_ctrl_set()
2956 hw->fc.send_xon = fc_conf->send_xon; in txgbe_flow_ctrl_set()
[all …]
/f-stack/dpdk/drivers/net/mvpp2/
H A Dmrvl_ethdev.c1876 mrvl_flow_ctrl_get(struct rte_eth_dev *dev, struct rte_eth_fc_conf *fc_conf) in mrvl_flow_ctrl_get() argument
1890 fc_conf->mode = en ? RTE_FC_RX_PAUSE : RTE_FC_NONE; in mrvl_flow_ctrl_get()
1907 mrvl_flow_ctrl_set(struct rte_eth_dev *dev, struct rte_eth_fc_conf *fc_conf) in mrvl_flow_ctrl_set() argument
1914 if (fc_conf->high_water || in mrvl_flow_ctrl_set()
1915 fc_conf->low_water || in mrvl_flow_ctrl_set()
1916 fc_conf->pause_time || in mrvl_flow_ctrl_set()
1917 fc_conf->mac_ctrl_frame_fwd || in mrvl_flow_ctrl_set()
1918 fc_conf->autoneg) { in mrvl_flow_ctrl_set()
1924 if (fc_conf->mode == RTE_FC_NONE || in mrvl_flow_ctrl_set()
1925 fc_conf->mode == RTE_FC_RX_PAUSE) { in mrvl_flow_ctrl_set()
[all …]
/f-stack/dpdk/drivers/net/hinic/
H A Dhinic_pmd_ethdev.c1859 struct rte_eth_fc_conf *fc_conf) in hinic_flow_ctrl_get() argument
1876 fc_conf->autoneg = nic_pause.auto_neg; in hinic_flow_ctrl_get()
1879 fc_conf->mode = RTE_FC_FULL; in hinic_flow_ctrl_get()
1881 fc_conf->mode = RTE_FC_TX_PAUSE; in hinic_flow_ctrl_get()
1883 fc_conf->mode = RTE_FC_RX_PAUSE; in hinic_flow_ctrl_get()
1885 fc_conf->mode = RTE_FC_NONE; in hinic_flow_ctrl_get()
1891 struct rte_eth_fc_conf *fc_conf) in hinic_flow_ctrl_set() argument
1897 nic_pause.auto_neg = fc_conf->autoneg; in hinic_flow_ctrl_set()
1899 if (((fc_conf->mode & RTE_FC_FULL) == RTE_FC_FULL) || in hinic_flow_ctrl_set()
1900 (fc_conf->mode & RTE_FC_TX_PAUSE)) in hinic_flow_ctrl_set()
[all …]
/f-stack/dpdk/drivers/net/dpaa2/
H A Ddpaa2_ethdev.c1961 dpaa2_flow_ctrl_get(struct rte_eth_dev *dev, struct rte_eth_fc_conf *fc_conf) in dpaa2_flow_ctrl_get() argument
1973 if (dpni == NULL || fc_conf == NULL) { in dpaa2_flow_ctrl_get()
1984 memset(fc_conf, 0, sizeof(struct rte_eth_fc_conf)); in dpaa2_flow_ctrl_get()
1995 fc_conf->mode = RTE_FC_FULL; in dpaa2_flow_ctrl_get()
1997 fc_conf->mode = RTE_FC_RX_PAUSE; in dpaa2_flow_ctrl_get()
2007 fc_conf->mode = RTE_FC_TX_PAUSE; in dpaa2_flow_ctrl_get()
2009 fc_conf->mode = RTE_FC_NONE; in dpaa2_flow_ctrl_get()
2016 dpaa2_flow_ctrl_set(struct rte_eth_dev *dev, struct rte_eth_fc_conf *fc_conf) in dpaa2_flow_ctrl_set() argument
2052 switch (fc_conf->mode) { in dpaa2_flow_ctrl_set()
2086 fc_conf->mode); in dpaa2_flow_ctrl_set()
/f-stack/dpdk/drivers/net/qede/
H A Dqede_ethdev.c2002 struct rte_eth_fc_conf *fc_conf) in qede_flow_ctrl_set() argument
2014 if (fc_conf->autoneg) { in qede_flow_ctrl_set()
2023 if (fc_conf->mode == RTE_FC_FULL) in qede_flow_ctrl_set()
2026 if (fc_conf->mode == RTE_FC_TX_PAUSE) in qede_flow_ctrl_set()
2028 if (fc_conf->mode == RTE_FC_RX_PAUSE) in qede_flow_ctrl_set()
2038 struct rte_eth_fc_conf *fc_conf) in qede_flow_ctrl_get() argument
2048 fc_conf->autoneg = true; in qede_flow_ctrl_get()
2052 fc_conf->mode = RTE_FC_FULL; in qede_flow_ctrl_get()
2054 fc_conf->mode = RTE_FC_RX_PAUSE; in qede_flow_ctrl_get()
2056 fc_conf->mode = RTE_FC_TX_PAUSE; in qede_flow_ctrl_get()
[all …]
/f-stack/dpdk/drivers/net/hns3/
H A Dhns3_ethdev.c5071 fc_conf->mode = RTE_FC_FULL; in hns3_flow_ctrl_get()
5074 fc_conf->mode = RTE_FC_TX_PAUSE; in hns3_flow_ctrl_get()
5077 fc_conf->mode = RTE_FC_RX_PAUSE; in hns3_flow_ctrl_get()
5081 fc_conf->mode = RTE_FC_NONE; in hns3_flow_ctrl_get()
5119 if (fc_conf->high_water || fc_conf->low_water || in hns3_flow_ctrl_set()
5120 fc_conf->send_xon || fc_conf->mac_ctrl_frame_fwd) { in hns3_flow_ctrl_set()
5124 fc_conf->high_water, fc_conf->low_water, in hns3_flow_ctrl_set()
5125 fc_conf->send_xon, fc_conf->mac_ctrl_frame_fwd); in hns3_flow_ctrl_set()
5128 if (fc_conf->autoneg) { in hns3_flow_ctrl_set()
5132 if (!fc_conf->pause_time) { in hns3_flow_ctrl_set()
[all …]
H A Dhns3_dcb.h202 int hns3_fc_enable(struct rte_eth_dev *dev, struct rte_eth_fc_conf *fc_conf);

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