Searched refs:rte_intr_nb_efd_get (Results 1 – 20 of 20) sorted by relevance
297 for (i = 0; i < rte_intr_nb_efd_get(intr_handle); i++) { in vfio_enable_msix()1443 if (intr_handle == NULL || rte_intr_nb_efd_get(intr_handle) == 0 || in rte_intr_rx_ctl()1444 efd_idx >= (unsigned int)rte_intr_nb_efd_get(intr_handle)) { in rte_intr_rx_ctl()1501 for (i = 0; i < (uint32_t)rte_intr_nb_efd_get(intr_handle); i++) { in rte_intr_free_epoll_fd()1566 if (rte_intr_max_intr_get(intr_handle) > rte_intr_nb_efd_get(intr_handle)) { in rte_intr_efd_disable()1567 for (i = 0; i < (uint32_t)rte_intr_nb_efd_get(intr_handle); i++) in rte_intr_efd_disable()1577 return !(!rte_intr_nb_efd_get(intr_handle)); in rte_intr_dp_is_en()1587 rte_intr_nb_efd_get(intr_handle)); in rte_intr_allow_others()
551 rte_intr_nb_efd_get(const struct rte_intr_handle *intr_handle);
219 rte_intr_nb_efd_get(intr_handle)); in sfc_intr_start()
753 if (vec < base + rte_intr_nb_efd_get(intr_handle) - 1) in hns3_map_rx_interrupt()790 if (vec < base + rte_intr_nb_efd_get(intr_handle) - 1) in hns3_unmap_rx_interrupt()
146 #define plt_intr_nb_efd_get rte_intr_nb_efd_get
455 rte_intr_nb_efd_get;
290 int rte_intr_nb_efd_get(const struct rte_intr_handle *intr_handle) in rte_intr_nb_efd_get() function
749 nb_efd = rte_intr_nb_efd_get(intr_handle); in igc_configure_msix_intr()771 if (vec < base + rte_intr_nb_efd_get(intr_handle) - 1) in igc_configure_msix_intr()817 nb_efd = rte_intr_nb_efd_get(intr_handle); in igc_rxq_interrupt_setup()
644 (rte_intr_nb_efd_get(intr_handle) + 1)) { in vmxnet3_configure_msix()647 rte_intr_nb_efd_get(intr_handle) + 1); in vmxnet3_configure_msix()
1005 if (vector_idx < base + rte_intr_nb_efd_get(intr_handle) in txgbevf_configure_msix()
3738 if (vec < base + rte_intr_nb_efd_get(intr_handle) in txgbe_configure_msix()
5247 nb_efd = rte_intr_nb_efd_get(intr_handle); in eth_igb_configure_msix_intr()5269 nb_efd = rte_intr_nb_efd_get(intr_handle); in eth_igb_configure_msix_intr()5284 if (vec < base + rte_intr_nb_efd_get(intr_handle) - 1) in eth_igb_configure_msix_intr()
240 rte_intr_nb_efd_get(intr_handle)); in ice_dcf_config_rx_queues_irqs()
3377 rte_intr_nb_efd_get(intr_handle)); in ice_vsi_queues_bind_intr()
856 RTE_MIN(rte_intr_nb_efd_get(intr_handle), in iavf_config_rx_queues_irqs()
854 rte_intr_nb_efd_get(intr_handle), in bnxt_start_nic()860 if (vec < base + rte_intr_nb_efd_get(intr_handle) in bnxt_start_nic()
2675 if (vec < base + rte_intr_nb_efd_get(intr_handle) in ngbe_configure_msix()
2431 rte_intr_nb_efd_get(intr_handle); in fm10k_dev_rxq_interrupt_setup()
5954 if (vector_idx < base + rte_intr_nb_efd_get(intr_handle) in ixgbevf_configure_msix()6022 if (vec < base + rte_intr_nb_efd_get(intr_handle) in ixgbe_configure_msix()
2082 rte_intr_nb_efd_get(intr_handle)); in i40e_vsi_queues_bind_intr()