1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright(c) 2015-2020 Beijing WangXun Technology Co., Ltd.
3 * Copyright(c) 2010-2017 Intel Corporation
4 */
5
6 #include <sys/queue.h>
7 #include <stdio.h>
8 #include <errno.h>
9 #include <stdint.h>
10 #include <string.h>
11 #include <rte_log.h>
12 #include <ethdev_pci.h>
13 #include <rte_alarm.h>
14
15 #include "txgbe_logs.h"
16 #include "base/txgbe.h"
17 #include "txgbe_ethdev.h"
18 #include "txgbe_rxtx.h"
19 #include "txgbe_regs_group.h"
20
21 static const struct reg_info txgbevf_regs_general[] = {
22 {TXGBE_VFRST, 1, 1, "TXGBE_VFRST"},
23 {TXGBE_VFSTATUS, 1, 1, "TXGBE_VFSTATUS"},
24 {TXGBE_VFMBCTL, 1, 1, "TXGBE_VFMAILBOX"},
25 {TXGBE_VFMBX, 16, 4, "TXGBE_VFMBX"},
26 {TXGBE_VFPBWRAP, 1, 1, "TXGBE_VFPBWRAP"},
27 {0, 0, 0, ""}
28 };
29
30 static const struct reg_info txgbevf_regs_interrupt[] = {
31 {0, 0, 0, ""}
32 };
33
34 static const struct reg_info txgbevf_regs_rxdma[] = {
35 {0, 0, 0, ""}
36 };
37
38 static const struct reg_info txgbevf_regs_tx[] = {
39 {0, 0, 0, ""}
40 };
41
42 /* VF registers */
43 static const struct reg_info *txgbevf_regs[] = {
44 txgbevf_regs_general,
45 txgbevf_regs_interrupt,
46 txgbevf_regs_rxdma,
47 txgbevf_regs_tx,
48 NULL};
49
50 static int txgbevf_dev_xstats_get(struct rte_eth_dev *dev,
51 struct rte_eth_xstat *xstats, unsigned int n);
52 static int txgbevf_dev_info_get(struct rte_eth_dev *dev,
53 struct rte_eth_dev_info *dev_info);
54 static int txgbevf_dev_configure(struct rte_eth_dev *dev);
55 static int txgbevf_dev_start(struct rte_eth_dev *dev);
56 static int txgbevf_dev_link_update(struct rte_eth_dev *dev,
57 int wait_to_complete);
58 static int txgbevf_dev_stop(struct rte_eth_dev *dev);
59 static int txgbevf_dev_close(struct rte_eth_dev *dev);
60 static void txgbevf_intr_disable(struct rte_eth_dev *dev);
61 static void txgbevf_intr_enable(struct rte_eth_dev *dev);
62 static int txgbevf_dev_stats_reset(struct rte_eth_dev *dev);
63 static int txgbevf_vlan_offload_config(struct rte_eth_dev *dev, int mask);
64 static void txgbevf_set_vfta_all(struct rte_eth_dev *dev, bool on);
65 static void txgbevf_configure_msix(struct rte_eth_dev *dev);
66 static int txgbevf_dev_promiscuous_enable(struct rte_eth_dev *dev);
67 static int txgbevf_dev_promiscuous_disable(struct rte_eth_dev *dev);
68 static void txgbevf_remove_mac_addr(struct rte_eth_dev *dev, uint32_t index);
69 static void txgbevf_dev_interrupt_handler(void *param);
70
71 /*
72 * The set of PCI devices this driver supports (for VF)
73 */
74 static const struct rte_pci_id pci_id_txgbevf_map[] = {
75 { RTE_PCI_DEVICE(PCI_VENDOR_ID_WANGXUN, TXGBE_DEV_ID_SP1000_VF) },
76 { RTE_PCI_DEVICE(PCI_VENDOR_ID_WANGXUN, TXGBE_DEV_ID_WX1820_VF) },
77 { .vendor_id = 0, /* sentinel */ },
78 };
79
80 static const struct rte_eth_desc_lim rx_desc_lim = {
81 .nb_max = TXGBE_RING_DESC_MAX,
82 .nb_min = TXGBE_RING_DESC_MIN,
83 .nb_align = TXGBE_RXD_ALIGN,
84 };
85
86 static const struct rte_eth_desc_lim tx_desc_lim = {
87 .nb_max = TXGBE_RING_DESC_MAX,
88 .nb_min = TXGBE_RING_DESC_MIN,
89 .nb_align = TXGBE_TXD_ALIGN,
90 .nb_seg_max = TXGBE_TX_MAX_SEG,
91 .nb_mtu_seg_max = TXGBE_TX_MAX_SEG,
92 };
93
94 static const struct eth_dev_ops txgbevf_eth_dev_ops;
95
96 static const struct rte_txgbe_xstats_name_off rte_txgbevf_stats_strings[] = {
97 {"rx_multicast_packets_0",
98 offsetof(struct txgbevf_hw_stats, qp[0].vfmprc)},
99 {"rx_multicast_packets_1",
100 offsetof(struct txgbevf_hw_stats, qp[1].vfmprc)},
101 {"rx_multicast_packets_2",
102 offsetof(struct txgbevf_hw_stats, qp[2].vfmprc)},
103 {"rx_multicast_packets_3",
104 offsetof(struct txgbevf_hw_stats, qp[3].vfmprc)},
105 {"rx_multicast_packets_4",
106 offsetof(struct txgbevf_hw_stats, qp[4].vfmprc)},
107 {"rx_multicast_packets_5",
108 offsetof(struct txgbevf_hw_stats, qp[5].vfmprc)},
109 {"rx_multicast_packets_6",
110 offsetof(struct txgbevf_hw_stats, qp[6].vfmprc)},
111 {"rx_multicast_packets_7",
112 offsetof(struct txgbevf_hw_stats, qp[7].vfmprc)}
113 };
114
115 #define TXGBEVF_NB_XSTATS (sizeof(rte_txgbevf_stats_strings) / \
116 sizeof(rte_txgbevf_stats_strings[0]))
117
118 /*
119 * Negotiate mailbox API version with the PF.
120 * After reset API version is always set to the basic one (txgbe_mbox_api_10).
121 * Then we try to negotiate starting with the most recent one.
122 * If all negotiation attempts fail, then we will proceed with
123 * the default one (txgbe_mbox_api_10).
124 */
125 static void
txgbevf_negotiate_api(struct txgbe_hw * hw)126 txgbevf_negotiate_api(struct txgbe_hw *hw)
127 {
128 int32_t i;
129
130 /* start with highest supported, proceed down */
131 static const int sup_ver[] = {
132 txgbe_mbox_api_13,
133 txgbe_mbox_api_12,
134 txgbe_mbox_api_11,
135 txgbe_mbox_api_10,
136 };
137
138 for (i = 0; i < ARRAY_SIZE(sup_ver); i++) {
139 if (txgbevf_negotiate_api_version(hw, sup_ver[i]) == 0)
140 break;
141 }
142 }
143
144 static void
generate_random_mac_addr(struct rte_ether_addr * mac_addr)145 generate_random_mac_addr(struct rte_ether_addr *mac_addr)
146 {
147 uint64_t random;
148
149 /* Set Organizationally Unique Identifier (OUI) prefix. */
150 mac_addr->addr_bytes[0] = 0x00;
151 mac_addr->addr_bytes[1] = 0x09;
152 mac_addr->addr_bytes[2] = 0xC0;
153 /* Force indication of locally assigned MAC address. */
154 mac_addr->addr_bytes[0] |= RTE_ETHER_LOCAL_ADMIN_ADDR;
155 /* Generate the last 3 bytes of the MAC address with a random number. */
156 random = rte_rand();
157 memcpy(&mac_addr->addr_bytes[3], &random, 3);
158 }
159
160 /*
161 * Virtual Function device init
162 */
163 static int
eth_txgbevf_dev_init(struct rte_eth_dev * eth_dev)164 eth_txgbevf_dev_init(struct rte_eth_dev *eth_dev)
165 {
166 int err;
167 uint32_t tc, tcs;
168 struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(eth_dev);
169 struct rte_intr_handle *intr_handle = pci_dev->intr_handle;
170 struct txgbe_hw *hw = TXGBE_DEV_HW(eth_dev);
171 struct txgbe_vfta *shadow_vfta = TXGBE_DEV_VFTA(eth_dev);
172 struct txgbe_hwstrip *hwstrip = TXGBE_DEV_HWSTRIP(eth_dev);
173 struct rte_ether_addr *perm_addr =
174 (struct rte_ether_addr *)hw->mac.perm_addr;
175
176 PMD_INIT_FUNC_TRACE();
177
178 eth_dev->dev_ops = &txgbevf_eth_dev_ops;
179 eth_dev->rx_descriptor_status = txgbe_dev_rx_descriptor_status;
180 eth_dev->tx_descriptor_status = txgbe_dev_tx_descriptor_status;
181 eth_dev->rx_pkt_burst = &txgbe_recv_pkts;
182 eth_dev->tx_pkt_burst = &txgbe_xmit_pkts;
183
184 /* for secondary processes, we don't initialise any further as primary
185 * has already done this work. Only check we don't need a different
186 * RX function
187 */
188 if (rte_eal_process_type() != RTE_PROC_PRIMARY) {
189 struct txgbe_tx_queue *txq;
190 uint16_t nb_tx_queues = eth_dev->data->nb_tx_queues;
191 /* TX queue function in primary, set by last queue initialized
192 * Tx queue may not initialized by primary process
193 */
194 if (eth_dev->data->tx_queues) {
195 txq = eth_dev->data->tx_queues[nb_tx_queues - 1];
196 txgbe_set_tx_function(eth_dev, txq);
197 } else {
198 /* Use default TX function if we get here */
199 PMD_INIT_LOG(NOTICE,
200 "No TX queues configured yet. Using default TX function.");
201 }
202
203 txgbe_set_rx_function(eth_dev);
204
205 return 0;
206 }
207
208 rte_eth_copy_pci_info(eth_dev, pci_dev);
209
210 hw->device_id = pci_dev->id.device_id;
211 hw->vendor_id = pci_dev->id.vendor_id;
212 hw->subsystem_device_id = pci_dev->id.subsystem_device_id;
213 hw->subsystem_vendor_id = pci_dev->id.subsystem_vendor_id;
214 hw->hw_addr = (void *)pci_dev->mem_resource[0].addr;
215
216 /* initialize the vfta */
217 memset(shadow_vfta, 0, sizeof(*shadow_vfta));
218
219 /* initialize the hw strip bitmap*/
220 memset(hwstrip, 0, sizeof(*hwstrip));
221
222 /* Initialize the shared code (base driver) */
223 err = txgbe_init_shared_code(hw);
224 if (err != 0) {
225 PMD_INIT_LOG(ERR,
226 "Shared code init failed for txgbevf: %d", err);
227 return -EIO;
228 }
229
230 /* init_mailbox_params */
231 hw->mbx.init_params(hw);
232
233 /* Reset the hw statistics */
234 txgbevf_dev_stats_reset(eth_dev);
235
236 /* Disable the interrupts for VF */
237 txgbevf_intr_disable(eth_dev);
238
239 hw->mac.num_rar_entries = 128; /* The MAX of the underlying PF */
240 err = hw->mac.reset_hw(hw);
241
242 /*
243 * The VF reset operation returns the TXGBE_ERR_INVALID_MAC_ADDR when
244 * the underlying PF driver has not assigned a MAC address to the VF.
245 * In this case, assign a random MAC address.
246 */
247 if (err != 0 && err != TXGBE_ERR_INVALID_MAC_ADDR) {
248 PMD_INIT_LOG(ERR, "VF Initialization Failure: %d", err);
249 /*
250 * This error code will be propagated to the app by
251 * rte_eth_dev_reset, so use a public error code rather than
252 * the internal-only TXGBE_ERR_RESET_FAILED
253 */
254 return -EAGAIN;
255 }
256
257 /* negotiate mailbox API version to use with the PF. */
258 txgbevf_negotiate_api(hw);
259
260 /* Get Rx/Tx queue count via mailbox, which is ready after reset_hw */
261 txgbevf_get_queues(hw, &tcs, &tc);
262
263 /* Allocate memory for storing MAC addresses */
264 eth_dev->data->mac_addrs = rte_zmalloc("txgbevf", RTE_ETHER_ADDR_LEN *
265 hw->mac.num_rar_entries, 0);
266 if (eth_dev->data->mac_addrs == NULL) {
267 PMD_INIT_LOG(ERR,
268 "Failed to allocate %u bytes needed to store "
269 "MAC addresses",
270 RTE_ETHER_ADDR_LEN * hw->mac.num_rar_entries);
271 return -ENOMEM;
272 }
273
274 /* Generate a random MAC address, if none was assigned by PF. */
275 if (rte_is_zero_ether_addr(perm_addr)) {
276 generate_random_mac_addr(perm_addr);
277 err = txgbe_set_rar_vf(hw, 1, perm_addr->addr_bytes, 0, 1);
278 if (err) {
279 rte_free(eth_dev->data->mac_addrs);
280 eth_dev->data->mac_addrs = NULL;
281 return err;
282 }
283 PMD_INIT_LOG(INFO, "\tVF MAC address not assigned by Host PF");
284 PMD_INIT_LOG(INFO, "\tAssign randomly generated MAC address "
285 RTE_ETHER_ADDR_PRT_FMT,
286 RTE_ETHER_ADDR_BYTES(perm_addr));
287 }
288
289 /* Copy the permanent MAC address */
290 rte_ether_addr_copy(perm_addr, ð_dev->data->mac_addrs[0]);
291
292 /* reset the hardware with the new settings */
293 err = hw->mac.start_hw(hw);
294 if (err) {
295 PMD_INIT_LOG(ERR, "VF Initialization Failure: %d", err);
296 return -EIO;
297 }
298
299 /* enter promiscuous mode */
300 txgbevf_dev_promiscuous_enable(eth_dev);
301
302 rte_intr_callback_register(intr_handle,
303 txgbevf_dev_interrupt_handler, eth_dev);
304 rte_intr_enable(intr_handle);
305 txgbevf_intr_enable(eth_dev);
306
307 PMD_INIT_LOG(DEBUG, "port %d vendorID=0x%x deviceID=0x%x mac.type=%s",
308 eth_dev->data->port_id, pci_dev->id.vendor_id,
309 pci_dev->id.device_id, "txgbe_mac_raptor_vf");
310
311 return 0;
312 }
313
314 /* Virtual Function device uninit */
315 static int
eth_txgbevf_dev_uninit(struct rte_eth_dev * eth_dev)316 eth_txgbevf_dev_uninit(struct rte_eth_dev *eth_dev)
317 {
318 PMD_INIT_FUNC_TRACE();
319
320 if (rte_eal_process_type() != RTE_PROC_PRIMARY)
321 return 0;
322
323 txgbevf_dev_close(eth_dev);
324
325 return 0;
326 }
327
eth_txgbevf_pci_probe(struct rte_pci_driver * pci_drv __rte_unused,struct rte_pci_device * pci_dev)328 static int eth_txgbevf_pci_probe(struct rte_pci_driver *pci_drv __rte_unused,
329 struct rte_pci_device *pci_dev)
330 {
331 return rte_eth_dev_pci_generic_probe(pci_dev,
332 sizeof(struct txgbe_adapter), eth_txgbevf_dev_init);
333 }
334
eth_txgbevf_pci_remove(struct rte_pci_device * pci_dev)335 static int eth_txgbevf_pci_remove(struct rte_pci_device *pci_dev)
336 {
337 return rte_eth_dev_pci_generic_remove(pci_dev, eth_txgbevf_dev_uninit);
338 }
339
340 /*
341 * virtual function driver struct
342 */
343 static struct rte_pci_driver rte_txgbevf_pmd = {
344 .id_table = pci_id_txgbevf_map,
345 .drv_flags = RTE_PCI_DRV_NEED_MAPPING,
346 .probe = eth_txgbevf_pci_probe,
347 .remove = eth_txgbevf_pci_remove,
348 };
349
txgbevf_dev_xstats_get_names(__rte_unused struct rte_eth_dev * dev,struct rte_eth_xstat_name * xstats_names,unsigned int limit)350 static int txgbevf_dev_xstats_get_names(__rte_unused struct rte_eth_dev *dev,
351 struct rte_eth_xstat_name *xstats_names, unsigned int limit)
352 {
353 unsigned int i;
354
355 if (limit < TXGBEVF_NB_XSTATS && xstats_names != NULL)
356 return -ENOMEM;
357
358 if (xstats_names != NULL)
359 for (i = 0; i < TXGBEVF_NB_XSTATS; i++)
360 snprintf(xstats_names[i].name,
361 sizeof(xstats_names[i].name),
362 "%s", rte_txgbevf_stats_strings[i].name);
363 return TXGBEVF_NB_XSTATS;
364 }
365
366 static void
txgbevf_update_stats(struct rte_eth_dev * dev)367 txgbevf_update_stats(struct rte_eth_dev *dev)
368 {
369 struct txgbe_hw *hw = TXGBE_DEV_HW(dev);
370 struct txgbevf_hw_stats *hw_stats = (struct txgbevf_hw_stats *)
371 TXGBE_DEV_STATS(dev);
372 unsigned int i;
373
374 for (i = 0; i < dev->data->nb_rx_queues; i++) {
375 /* Good Rx packet, include VF loopback */
376 TXGBE_UPDCNT32(TXGBE_QPRXPKT(i),
377 hw_stats->qp[i].last_vfgprc, hw_stats->qp[i].vfgprc);
378
379 /* Good Rx octets, include VF loopback */
380 TXGBE_UPDCNT36(TXGBE_QPRXOCTL(i),
381 hw_stats->qp[i].last_vfgorc, hw_stats->qp[i].vfgorc);
382
383 /* Rx Multicst Packet */
384 TXGBE_UPDCNT32(TXGBE_QPRXMPKT(i),
385 hw_stats->qp[i].last_vfmprc, hw_stats->qp[i].vfmprc);
386 }
387 hw->rx_loaded = 0;
388
389 for (i = 0; i < dev->data->nb_tx_queues; i++) {
390 /* Good Tx packet, include VF loopback */
391 TXGBE_UPDCNT32(TXGBE_QPTXPKT(i),
392 hw_stats->qp[i].last_vfgptc, hw_stats->qp[i].vfgptc);
393
394 /* Good Tx octets, include VF loopback */
395 TXGBE_UPDCNT36(TXGBE_QPTXOCTL(i),
396 hw_stats->qp[i].last_vfgotc, hw_stats->qp[i].vfgotc);
397 }
398 hw->offset_loaded = 0;
399 }
400
401 static int
txgbevf_dev_xstats_get(struct rte_eth_dev * dev,struct rte_eth_xstat * xstats,unsigned int n)402 txgbevf_dev_xstats_get(struct rte_eth_dev *dev, struct rte_eth_xstat *xstats,
403 unsigned int n)
404 {
405 struct txgbevf_hw_stats *hw_stats = (struct txgbevf_hw_stats *)
406 TXGBE_DEV_STATS(dev);
407 unsigned int i;
408
409 if (n < TXGBEVF_NB_XSTATS)
410 return TXGBEVF_NB_XSTATS;
411
412 txgbevf_update_stats(dev);
413
414 if (!xstats)
415 return 0;
416
417 /* Extended stats */
418 for (i = 0; i < TXGBEVF_NB_XSTATS; i++) {
419 xstats[i].id = i;
420 xstats[i].value = *(uint64_t *)(((char *)hw_stats) +
421 rte_txgbevf_stats_strings[i].offset);
422 }
423
424 return TXGBEVF_NB_XSTATS;
425 }
426
427 static int
txgbevf_dev_stats_get(struct rte_eth_dev * dev,struct rte_eth_stats * stats)428 txgbevf_dev_stats_get(struct rte_eth_dev *dev, struct rte_eth_stats *stats)
429 {
430 struct txgbevf_hw_stats *hw_stats = (struct txgbevf_hw_stats *)
431 TXGBE_DEV_STATS(dev);
432 uint32_t i;
433
434 txgbevf_update_stats(dev);
435
436 if (stats == NULL)
437 return -EINVAL;
438
439 stats->ipackets = 0;
440 stats->ibytes = 0;
441 stats->opackets = 0;
442 stats->obytes = 0;
443
444 for (i = 0; i < 8; i++) {
445 stats->ipackets += hw_stats->qp[i].vfgprc;
446 stats->ibytes += hw_stats->qp[i].vfgorc;
447 stats->opackets += hw_stats->qp[i].vfgptc;
448 stats->obytes += hw_stats->qp[i].vfgotc;
449 }
450
451 return 0;
452 }
453
454 static int
txgbevf_dev_stats_reset(struct rte_eth_dev * dev)455 txgbevf_dev_stats_reset(struct rte_eth_dev *dev)
456 {
457 struct txgbevf_hw_stats *hw_stats = (struct txgbevf_hw_stats *)
458 TXGBE_DEV_STATS(dev);
459 uint32_t i;
460
461 /* Sync HW register to the last stats */
462 txgbevf_dev_stats_get(dev, NULL);
463
464 /* reset HW current stats*/
465 for (i = 0; i < 8; i++) {
466 hw_stats->qp[i].vfgprc = 0;
467 hw_stats->qp[i].vfgorc = 0;
468 hw_stats->qp[i].vfgptc = 0;
469 hw_stats->qp[i].vfgotc = 0;
470 }
471
472 return 0;
473 }
474
475 static int
txgbevf_dev_info_get(struct rte_eth_dev * dev,struct rte_eth_dev_info * dev_info)476 txgbevf_dev_info_get(struct rte_eth_dev *dev,
477 struct rte_eth_dev_info *dev_info)
478 {
479 struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev);
480 struct txgbe_hw *hw = TXGBE_DEV_HW(dev);
481
482 dev_info->max_rx_queues = (uint16_t)hw->mac.max_rx_queues;
483 dev_info->max_tx_queues = (uint16_t)hw->mac.max_tx_queues;
484 dev_info->min_rx_bufsize = 1024;
485 dev_info->max_rx_pktlen = TXGBE_FRAME_SIZE_MAX;
486 dev_info->max_mac_addrs = hw->mac.num_rar_entries;
487 dev_info->max_hash_mac_addrs = TXGBE_VMDQ_NUM_UC_MAC;
488 dev_info->max_vfs = pci_dev->max_vfs;
489 dev_info->max_vmdq_pools = RTE_ETH_64_POOLS;
490 dev_info->dev_capa &= ~RTE_ETH_DEV_CAPA_FLOW_RULE_KEEP;
491 dev_info->rx_queue_offload_capa = txgbe_get_rx_queue_offloads(dev);
492 dev_info->rx_offload_capa = (txgbe_get_rx_port_offloads(dev) |
493 dev_info->rx_queue_offload_capa);
494 dev_info->tx_queue_offload_capa = txgbe_get_tx_queue_offloads(dev);
495 dev_info->tx_offload_capa = txgbe_get_tx_port_offloads(dev);
496 dev_info->hash_key_size = TXGBE_HKEY_MAX_INDEX * sizeof(uint32_t);
497 dev_info->reta_size = RTE_ETH_RSS_RETA_SIZE_128;
498 dev_info->flow_type_rss_offloads = TXGBE_RSS_OFFLOAD_ALL;
499
500 dev_info->default_rxconf = (struct rte_eth_rxconf) {
501 .rx_thresh = {
502 .pthresh = TXGBE_DEFAULT_RX_PTHRESH,
503 .hthresh = TXGBE_DEFAULT_RX_HTHRESH,
504 .wthresh = TXGBE_DEFAULT_RX_WTHRESH,
505 },
506 .rx_free_thresh = TXGBE_DEFAULT_RX_FREE_THRESH,
507 .rx_drop_en = 0,
508 .offloads = 0,
509 };
510
511 dev_info->default_txconf = (struct rte_eth_txconf) {
512 .tx_thresh = {
513 .pthresh = TXGBE_DEFAULT_TX_PTHRESH,
514 .hthresh = TXGBE_DEFAULT_TX_HTHRESH,
515 .wthresh = TXGBE_DEFAULT_TX_WTHRESH,
516 },
517 .tx_free_thresh = TXGBE_DEFAULT_TX_FREE_THRESH,
518 .offloads = 0,
519 };
520
521 dev_info->rx_desc_lim = rx_desc_lim;
522 dev_info->tx_desc_lim = tx_desc_lim;
523
524 return 0;
525 }
526
527 static int
txgbevf_dev_link_update(struct rte_eth_dev * dev,int wait_to_complete)528 txgbevf_dev_link_update(struct rte_eth_dev *dev, int wait_to_complete)
529 {
530 return txgbe_dev_link_update_share(dev, wait_to_complete);
531 }
532
533 /*
534 * Virtual Function operations
535 */
536 static void
txgbevf_intr_disable(struct rte_eth_dev * dev)537 txgbevf_intr_disable(struct rte_eth_dev *dev)
538 {
539 struct txgbe_interrupt *intr = TXGBE_DEV_INTR(dev);
540 struct txgbe_hw *hw = TXGBE_DEV_HW(dev);
541
542 PMD_INIT_FUNC_TRACE();
543
544 /* Clear interrupt mask to stop from interrupts being generated */
545 wr32(hw, TXGBE_VFIMS, TXGBE_VFIMS_MASK);
546
547 txgbe_flush(hw);
548
549 /* Clear mask value. */
550 intr->mask_misc = TXGBE_VFIMS_MASK;
551 }
552
553 static void
txgbevf_intr_enable(struct rte_eth_dev * dev)554 txgbevf_intr_enable(struct rte_eth_dev *dev)
555 {
556 struct txgbe_interrupt *intr = TXGBE_DEV_INTR(dev);
557 struct txgbe_hw *hw = TXGBE_DEV_HW(dev);
558
559 PMD_INIT_FUNC_TRACE();
560
561 /* VF enable interrupt autoclean */
562 wr32(hw, TXGBE_VFIMC, TXGBE_VFIMC_MASK);
563
564 txgbe_flush(hw);
565
566 intr->mask_misc = 0;
567 }
568
569 static int
txgbevf_dev_configure(struct rte_eth_dev * dev)570 txgbevf_dev_configure(struct rte_eth_dev *dev)
571 {
572 struct rte_eth_conf *conf = &dev->data->dev_conf;
573 struct txgbe_adapter *adapter = TXGBE_DEV_ADAPTER(dev);
574
575 PMD_INIT_LOG(DEBUG, "Configured Virtual Function port id: %d",
576 dev->data->port_id);
577
578 if (dev->data->dev_conf.rxmode.mq_mode & RTE_ETH_MQ_RX_RSS_FLAG)
579 dev->data->dev_conf.rxmode.offloads |= RTE_ETH_RX_OFFLOAD_RSS_HASH;
580
581 /*
582 * VF has no ability to enable/disable HW CRC
583 * Keep the persistent behavior the same as Host PF
584 */
585 #ifndef RTE_LIBRTE_TXGBE_PF_DISABLE_STRIP_CRC
586 if (conf->rxmode.offloads & RTE_ETH_RX_OFFLOAD_KEEP_CRC) {
587 PMD_INIT_LOG(NOTICE, "VF can't disable HW CRC Strip");
588 conf->rxmode.offloads &= ~RTE_ETH_RX_OFFLOAD_KEEP_CRC;
589 }
590 #else
591 if (!(conf->rxmode.offloads & RTE_ETH_RX_OFFLOAD_KEEP_CRC)) {
592 PMD_INIT_LOG(NOTICE, "VF can't enable HW CRC Strip");
593 conf->rxmode.offloads |= RTE_ETH_RX_OFFLOAD_KEEP_CRC;
594 }
595 #endif
596
597 /*
598 * Initialize to TRUE. If any of Rx queues doesn't meet the bulk
599 * allocation or vector Rx preconditions we will reset it.
600 */
601 adapter->rx_bulk_alloc_allowed = true;
602
603 return 0;
604 }
605
606 static int
txgbevf_dev_start(struct rte_eth_dev * dev)607 txgbevf_dev_start(struct rte_eth_dev *dev)
608 {
609 struct txgbe_hw *hw = TXGBE_DEV_HW(dev);
610 uint32_t intr_vector = 0;
611 struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev);
612 struct rte_intr_handle *intr_handle = pci_dev->intr_handle;
613
614 int err, mask = 0;
615
616 PMD_INIT_FUNC_TRACE();
617
618 /* Stop the link setup handler before resetting the HW. */
619 rte_eal_alarm_cancel(txgbe_dev_setup_link_alarm_handler, dev);
620
621 err = hw->mac.reset_hw(hw);
622 if (err) {
623 PMD_INIT_LOG(ERR, "Unable to reset vf hardware (%d)", err);
624 return err;
625 }
626 hw->mac.get_link_status = true;
627 hw->dev_start = true;
628
629 /* negotiate mailbox API version to use with the PF. */
630 txgbevf_negotiate_api(hw);
631
632 txgbevf_dev_tx_init(dev);
633
634 /* This can fail when allocating mbufs for descriptor rings */
635 err = txgbevf_dev_rx_init(dev);
636
637 /**
638 * In this case, reuses the MAC address assigned by VF
639 * initialization.
640 */
641 if (err != 0 && err != TXGBE_ERR_INVALID_MAC_ADDR) {
642 PMD_INIT_LOG(ERR, "Unable to initialize RX hardware (%d)", err);
643 txgbe_dev_clear_queues(dev);
644 return err;
645 }
646
647 /* Set vfta */
648 txgbevf_set_vfta_all(dev, 1);
649
650 /* Set HW strip */
651 mask = RTE_ETH_VLAN_STRIP_MASK | RTE_ETH_VLAN_FILTER_MASK |
652 RTE_ETH_VLAN_EXTEND_MASK;
653 err = txgbevf_vlan_offload_config(dev, mask);
654 if (err) {
655 PMD_INIT_LOG(ERR, "Unable to set VLAN offload (%d)", err);
656 txgbe_dev_clear_queues(dev);
657 return err;
658 }
659
660 txgbevf_dev_rxtx_start(dev);
661
662 /* check and configure queue intr-vector mapping */
663 if (rte_intr_cap_multiple(intr_handle) &&
664 dev->data->dev_conf.intr_conf.rxq) {
665 /* According to datasheet, only vector 0/1/2 can be used,
666 * now only one vector is used for Rx queue
667 */
668 intr_vector = 1;
669 if (rte_intr_efd_enable(intr_handle, intr_vector))
670 return -1;
671 }
672
673 if (rte_intr_dp_is_en(intr_handle)) {
674 if (rte_intr_vec_list_alloc(intr_handle, "intr_vec",
675 dev->data->nb_rx_queues)) {
676 PMD_INIT_LOG(ERR, "Failed to allocate %d rx_queues"
677 " intr_vec", dev->data->nb_rx_queues);
678 return -ENOMEM;
679 }
680 }
681 txgbevf_configure_msix(dev);
682
683 /* When a VF port is bound to VFIO-PCI, only miscellaneous interrupt
684 * is mapped to VFIO vector 0 in eth_txgbevf_dev_init( ).
685 * If previous VFIO interrupt mapping setting in eth_txgbevf_dev_init( )
686 * is not cleared, it will fail when following rte_intr_enable( ) tries
687 * to map Rx queue interrupt to other VFIO vectors.
688 * So clear uio/vfio intr/evevnfd first to avoid failure.
689 */
690 rte_intr_disable(intr_handle);
691
692 rte_intr_enable(intr_handle);
693
694 /* Re-enable interrupt for VF */
695 txgbevf_intr_enable(dev);
696
697 /*
698 * Update link status right before return, because it may
699 * start link configuration process in a separate thread.
700 */
701 txgbevf_dev_link_update(dev, 0);
702
703 hw->adapter_stopped = false;
704
705 return 0;
706 }
707
708 static int
txgbevf_dev_stop(struct rte_eth_dev * dev)709 txgbevf_dev_stop(struct rte_eth_dev *dev)
710 {
711 struct txgbe_hw *hw = TXGBE_DEV_HW(dev);
712 struct txgbe_adapter *adapter = TXGBE_DEV_ADAPTER(dev);
713 struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev);
714 struct rte_intr_handle *intr_handle = pci_dev->intr_handle;
715
716 if (hw->adapter_stopped)
717 return 0;
718
719 PMD_INIT_FUNC_TRACE();
720
721 rte_eal_alarm_cancel(txgbe_dev_setup_link_alarm_handler, dev);
722
723 txgbevf_intr_disable(dev);
724
725 hw->adapter_stopped = 1;
726 hw->mac.stop_hw(hw);
727
728 /*
729 * Clear what we set, but we still keep shadow_vfta to
730 * restore after device starts
731 */
732 txgbevf_set_vfta_all(dev, 0);
733
734 /* Clear stored conf */
735 dev->data->scattered_rx = 0;
736
737 txgbe_dev_clear_queues(dev);
738
739 /* Clean datapath event and queue/vec mapping */
740 rte_intr_efd_disable(intr_handle);
741 rte_intr_vec_list_free(intr_handle);
742
743 adapter->rss_reta_updated = 0;
744 hw->dev_start = false;
745
746 return 0;
747 }
748
749 static int
txgbevf_dev_close(struct rte_eth_dev * dev)750 txgbevf_dev_close(struct rte_eth_dev *dev)
751 {
752 struct txgbe_hw *hw = TXGBE_DEV_HW(dev);
753 struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev);
754 struct rte_intr_handle *intr_handle = pci_dev->intr_handle;
755 int ret;
756
757 PMD_INIT_FUNC_TRACE();
758 if (rte_eal_process_type() != RTE_PROC_PRIMARY)
759 return 0;
760
761 hw->mac.reset_hw(hw);
762
763 ret = txgbevf_dev_stop(dev);
764
765 txgbe_dev_free_queues(dev);
766
767 /**
768 * Remove the VF MAC address ro ensure
769 * that the VF traffic goes to the PF
770 * after stop, close and detach of the VF
771 **/
772 txgbevf_remove_mac_addr(dev, 0);
773
774 dev->rx_pkt_burst = NULL;
775 dev->tx_pkt_burst = NULL;
776
777 /* Disable the interrupts for VF */
778 txgbevf_intr_disable(dev);
779
780 rte_free(dev->data->mac_addrs);
781 dev->data->mac_addrs = NULL;
782
783 rte_intr_disable(intr_handle);
784 rte_intr_callback_unregister(intr_handle,
785 txgbevf_dev_interrupt_handler, dev);
786
787 return ret;
788 }
789
790 /*
791 * Reset VF device
792 */
793 static int
txgbevf_dev_reset(struct rte_eth_dev * dev)794 txgbevf_dev_reset(struct rte_eth_dev *dev)
795 {
796 int ret;
797
798 ret = eth_txgbevf_dev_uninit(dev);
799 if (ret)
800 return ret;
801
802 ret = eth_txgbevf_dev_init(dev);
803
804 return ret;
805 }
806
txgbevf_set_vfta_all(struct rte_eth_dev * dev,bool on)807 static void txgbevf_set_vfta_all(struct rte_eth_dev *dev, bool on)
808 {
809 struct txgbe_hw *hw = TXGBE_DEV_HW(dev);
810 struct txgbe_vfta *shadow_vfta = TXGBE_DEV_VFTA(dev);
811 int i = 0, j = 0, vfta = 0, mask = 1;
812
813 for (i = 0; i < TXGBE_VFTA_SIZE; i++) {
814 vfta = shadow_vfta->vfta[i];
815 if (vfta) {
816 mask = 1;
817 for (j = 0; j < 32; j++) {
818 if (vfta & mask)
819 hw->mac.set_vfta(hw, (i << 5) + j, 0,
820 on, false);
821 mask <<= 1;
822 }
823 }
824 }
825 }
826
827 static int
txgbevf_vlan_filter_set(struct rte_eth_dev * dev,uint16_t vlan_id,int on)828 txgbevf_vlan_filter_set(struct rte_eth_dev *dev, uint16_t vlan_id, int on)
829 {
830 struct txgbe_hw *hw = TXGBE_DEV_HW(dev);
831 struct txgbe_vfta *shadow_vfta = TXGBE_DEV_VFTA(dev);
832 uint32_t vid_idx = 0;
833 uint32_t vid_bit = 0;
834 int ret = 0;
835
836 PMD_INIT_FUNC_TRACE();
837
838 /* vind is not used in VF driver, set to 0, check txgbe_set_vfta_vf */
839 ret = hw->mac.set_vfta(hw, vlan_id, 0, !!on, false);
840 if (ret) {
841 PMD_INIT_LOG(ERR, "Unable to set VF vlan");
842 return ret;
843 }
844 vid_idx = (uint32_t)((vlan_id >> 5) & 0x7F);
845 vid_bit = (uint32_t)(1 << (vlan_id & 0x1F));
846
847 /* Save what we set and restore it after device reset */
848 if (on)
849 shadow_vfta->vfta[vid_idx] |= vid_bit;
850 else
851 shadow_vfta->vfta[vid_idx] &= ~vid_bit;
852
853 return 0;
854 }
855
856 static void
txgbevf_vlan_strip_queue_set(struct rte_eth_dev * dev,uint16_t queue,int on)857 txgbevf_vlan_strip_queue_set(struct rte_eth_dev *dev, uint16_t queue, int on)
858 {
859 struct txgbe_hw *hw = TXGBE_DEV_HW(dev);
860 uint32_t ctrl;
861
862 PMD_INIT_FUNC_TRACE();
863
864 if (queue >= hw->mac.max_rx_queues)
865 return;
866
867 ctrl = rd32(hw, TXGBE_RXCFG(queue));
868 txgbe_dev_save_rx_queue(hw, queue);
869 if (on)
870 ctrl |= TXGBE_RXCFG_VLAN;
871 else
872 ctrl &= ~TXGBE_RXCFG_VLAN;
873 wr32(hw, TXGBE_RXCFG(queue), 0);
874 msec_delay(100);
875 txgbe_dev_store_rx_queue(hw, queue);
876 wr32m(hw, TXGBE_RXCFG(queue),
877 TXGBE_RXCFG_VLAN | TXGBE_RXCFG_ENA, ctrl);
878
879 txgbe_vlan_hw_strip_bitmap_set(dev, queue, on);
880 }
881
882 static int
txgbevf_vlan_offload_config(struct rte_eth_dev * dev,int mask)883 txgbevf_vlan_offload_config(struct rte_eth_dev *dev, int mask)
884 {
885 struct txgbe_rx_queue *rxq;
886 uint16_t i;
887 int on = 0;
888
889 /* VF function only support hw strip feature, others are not support */
890 if (mask & RTE_ETH_VLAN_STRIP_MASK) {
891 for (i = 0; i < dev->data->nb_rx_queues; i++) {
892 rxq = dev->data->rx_queues[i];
893 on = !!(rxq->offloads & RTE_ETH_RX_OFFLOAD_VLAN_STRIP);
894 txgbevf_vlan_strip_queue_set(dev, i, on);
895 }
896 }
897
898 return 0;
899 }
900
901 static int
txgbevf_vlan_offload_set(struct rte_eth_dev * dev,int mask)902 txgbevf_vlan_offload_set(struct rte_eth_dev *dev, int mask)
903 {
904 txgbe_config_vlan_strip_on_all_queues(dev, mask);
905
906 txgbevf_vlan_offload_config(dev, mask);
907
908 return 0;
909 }
910
911 static int
txgbevf_dev_rx_queue_intr_enable(struct rte_eth_dev * dev,uint16_t queue_id)912 txgbevf_dev_rx_queue_intr_enable(struct rte_eth_dev *dev, uint16_t queue_id)
913 {
914 struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev);
915 struct rte_intr_handle *intr_handle = pci_dev->intr_handle;
916 struct txgbe_interrupt *intr = TXGBE_DEV_INTR(dev);
917 struct txgbe_hw *hw = TXGBE_DEV_HW(dev);
918 uint32_t vec = TXGBE_MISC_VEC_ID;
919
920 if (rte_intr_allow_others(intr_handle))
921 vec = TXGBE_RX_VEC_START;
922 intr->mask_misc &= ~(1 << vec);
923 RTE_SET_USED(queue_id);
924 wr32(hw, TXGBE_VFIMC, ~intr->mask_misc);
925
926 rte_intr_enable(intr_handle);
927
928 return 0;
929 }
930
931 static int
txgbevf_dev_rx_queue_intr_disable(struct rte_eth_dev * dev,uint16_t queue_id)932 txgbevf_dev_rx_queue_intr_disable(struct rte_eth_dev *dev, uint16_t queue_id)
933 {
934 struct txgbe_interrupt *intr = TXGBE_DEV_INTR(dev);
935 struct txgbe_hw *hw = TXGBE_DEV_HW(dev);
936 struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev);
937 struct rte_intr_handle *intr_handle = pci_dev->intr_handle;
938 uint32_t vec = TXGBE_MISC_VEC_ID;
939
940 if (rte_intr_allow_others(intr_handle))
941 vec = TXGBE_RX_VEC_START;
942 intr->mask_misc |= (1 << vec);
943 RTE_SET_USED(queue_id);
944 wr32(hw, TXGBE_VFIMS, intr->mask_misc);
945
946 return 0;
947 }
948
949 static void
txgbevf_set_ivar_map(struct txgbe_hw * hw,int8_t direction,uint8_t queue,uint8_t msix_vector)950 txgbevf_set_ivar_map(struct txgbe_hw *hw, int8_t direction,
951 uint8_t queue, uint8_t msix_vector)
952 {
953 uint32_t tmp, idx;
954
955 if (direction == -1) {
956 /* other causes */
957 msix_vector |= TXGBE_VFIVAR_VLD;
958 tmp = rd32(hw, TXGBE_VFIVARMISC);
959 tmp &= ~0xFF;
960 tmp |= msix_vector;
961 wr32(hw, TXGBE_VFIVARMISC, tmp);
962 } else {
963 /* rx or tx cause */
964 /* Workaround for ICR lost */
965 idx = ((16 * (queue & 1)) + (8 * direction));
966 tmp = rd32(hw, TXGBE_VFIVAR(queue >> 1));
967 tmp &= ~(0xFF << idx);
968 tmp |= (msix_vector << idx);
969 wr32(hw, TXGBE_VFIVAR(queue >> 1), tmp);
970 }
971 }
972
973 static void
txgbevf_configure_msix(struct rte_eth_dev * dev)974 txgbevf_configure_msix(struct rte_eth_dev *dev)
975 {
976 struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev);
977 struct rte_intr_handle *intr_handle = pci_dev->intr_handle;
978 struct txgbe_hw *hw = TXGBE_DEV_HW(dev);
979 uint32_t q_idx;
980 uint32_t vector_idx = TXGBE_MISC_VEC_ID;
981 uint32_t base = TXGBE_MISC_VEC_ID;
982
983 /* Configure VF other cause ivar */
984 txgbevf_set_ivar_map(hw, -1, 1, vector_idx);
985
986 /* won't configure msix register if no mapping is done
987 * between intr vector and event fd.
988 */
989 if (!rte_intr_dp_is_en(intr_handle))
990 return;
991
992 if (rte_intr_allow_others(intr_handle)) {
993 base = TXGBE_RX_VEC_START;
994 vector_idx = TXGBE_RX_VEC_START;
995 }
996
997 /* Configure all RX queues of VF */
998 for (q_idx = 0; q_idx < dev->data->nb_rx_queues; q_idx++) {
999 /* Force all queue use vector 0,
1000 * as TXGBE_VF_MAXMSIVECTOR = 1
1001 */
1002 txgbevf_set_ivar_map(hw, 0, q_idx, vector_idx);
1003 rte_intr_vec_list_index_set(intr_handle, q_idx,
1004 vector_idx);
1005 if (vector_idx < base + rte_intr_nb_efd_get(intr_handle)
1006 - 1)
1007 vector_idx++;
1008 }
1009
1010 /* As RX queue setting above show, all queues use the vector 0.
1011 * Set only the ITR value of TXGBE_MISC_VEC_ID.
1012 */
1013 wr32(hw, TXGBE_ITR(TXGBE_MISC_VEC_ID),
1014 TXGBE_ITR_IVAL(TXGBE_QUEUE_ITR_INTERVAL_DEFAULT)
1015 | TXGBE_ITR_WRDSA);
1016 }
1017
1018 static int
txgbevf_add_mac_addr(struct rte_eth_dev * dev,struct rte_ether_addr * mac_addr,__rte_unused uint32_t index,__rte_unused uint32_t pool)1019 txgbevf_add_mac_addr(struct rte_eth_dev *dev, struct rte_ether_addr *mac_addr,
1020 __rte_unused uint32_t index,
1021 __rte_unused uint32_t pool)
1022 {
1023 struct txgbe_hw *hw = TXGBE_DEV_HW(dev);
1024 int err;
1025
1026 /*
1027 * On a VF, adding again the same MAC addr is not an idempotent
1028 * operation. Trap this case to avoid exhausting the [very limited]
1029 * set of PF resources used to store VF MAC addresses.
1030 */
1031 if (memcmp(hw->mac.perm_addr, mac_addr,
1032 sizeof(struct rte_ether_addr)) == 0)
1033 return -1;
1034 err = txgbevf_set_uc_addr_vf(hw, 2, mac_addr->addr_bytes);
1035 if (err != 0)
1036 PMD_DRV_LOG(ERR, "Unable to add MAC address "
1037 RTE_ETHER_ADDR_PRT_FMT " - err=%d",
1038 RTE_ETHER_ADDR_BYTES(mac_addr), err);
1039 return err;
1040 }
1041
1042 static void
txgbevf_remove_mac_addr(struct rte_eth_dev * dev,uint32_t index)1043 txgbevf_remove_mac_addr(struct rte_eth_dev *dev, uint32_t index)
1044 {
1045 struct txgbe_hw *hw = TXGBE_DEV_HW(dev);
1046 struct rte_ether_addr *perm_addr =
1047 (struct rte_ether_addr *)hw->mac.perm_addr;
1048 struct rte_ether_addr *mac_addr;
1049 uint32_t i;
1050 int err;
1051
1052 /*
1053 * The TXGBE_VF_SET_MACVLAN command of the txgbe-pf driver does
1054 * not support the deletion of a given MAC address.
1055 * Instead, it imposes to delete all MAC addresses, then to add again
1056 * all MAC addresses with the exception of the one to be deleted.
1057 */
1058 (void)txgbevf_set_uc_addr_vf(hw, 0, NULL);
1059
1060 /*
1061 * Add again all MAC addresses, with the exception of the deleted one
1062 * and of the permanent MAC address.
1063 */
1064 for (i = 0, mac_addr = dev->data->mac_addrs;
1065 i < hw->mac.num_rar_entries; i++, mac_addr++) {
1066 /* Skip the deleted MAC address */
1067 if (i == index)
1068 continue;
1069 /* Skip NULL MAC addresses */
1070 if (rte_is_zero_ether_addr(mac_addr))
1071 continue;
1072 /* Skip the permanent MAC address */
1073 if (memcmp(perm_addr, mac_addr,
1074 sizeof(struct rte_ether_addr)) == 0)
1075 continue;
1076 err = txgbevf_set_uc_addr_vf(hw, 2, mac_addr->addr_bytes);
1077 if (err != 0)
1078 PMD_DRV_LOG(ERR,
1079 "Adding again MAC address "
1080 RTE_ETHER_ADDR_PRT_FMT " failed "
1081 "err=%d",
1082 RTE_ETHER_ADDR_BYTES(mac_addr), err);
1083 }
1084 }
1085
1086 static int
txgbevf_set_default_mac_addr(struct rte_eth_dev * dev,struct rte_ether_addr * addr)1087 txgbevf_set_default_mac_addr(struct rte_eth_dev *dev,
1088 struct rte_ether_addr *addr)
1089 {
1090 struct txgbe_hw *hw = TXGBE_DEV_HW(dev);
1091
1092 hw->mac.set_rar(hw, 0, (void *)addr, 0, 0);
1093
1094 return 0;
1095 }
1096
1097 static int
txgbevf_dev_set_mtu(struct rte_eth_dev * dev,uint16_t mtu)1098 txgbevf_dev_set_mtu(struct rte_eth_dev *dev, uint16_t mtu)
1099 {
1100 struct txgbe_hw *hw;
1101 uint32_t max_frame = mtu + RTE_ETHER_HDR_LEN + RTE_ETHER_CRC_LEN;
1102 struct rte_eth_dev_data *dev_data = dev->data;
1103
1104 hw = TXGBE_DEV_HW(dev);
1105
1106 if (mtu < RTE_ETHER_MIN_MTU ||
1107 max_frame > RTE_ETHER_MAX_JUMBO_FRAME_LEN)
1108 return -EINVAL;
1109
1110 /* If device is started, refuse mtu that requires the support of
1111 * scattered packets when this feature has not been enabled before.
1112 */
1113 if (dev_data->dev_started && !dev_data->scattered_rx &&
1114 (max_frame + 2 * RTE_VLAN_HLEN >
1115 dev->data->min_rx_buf_size - RTE_PKTMBUF_HEADROOM)) {
1116 PMD_INIT_LOG(ERR, "Stop port first.");
1117 return -EINVAL;
1118 }
1119
1120 /*
1121 * When supported by the underlying PF driver, use the TXGBE_VF_SET_MTU
1122 * request of the version 2.0 of the mailbox API.
1123 * For now, use the TXGBE_VF_SET_LPE request of the version 1.0
1124 * of the mailbox API.
1125 */
1126 if (txgbevf_rlpml_set_vf(hw, max_frame))
1127 return -EINVAL;
1128
1129 return 0;
1130 }
1131
1132 static int
txgbevf_get_reg_length(struct rte_eth_dev * dev __rte_unused)1133 txgbevf_get_reg_length(struct rte_eth_dev *dev __rte_unused)
1134 {
1135 int count = 0;
1136 int g_ind = 0;
1137 const struct reg_info *reg_group;
1138
1139 while ((reg_group = txgbevf_regs[g_ind++]))
1140 count += txgbe_regs_group_count(reg_group);
1141
1142 return count;
1143 }
1144
1145 static int
txgbevf_get_regs(struct rte_eth_dev * dev,struct rte_dev_reg_info * regs)1146 txgbevf_get_regs(struct rte_eth_dev *dev,
1147 struct rte_dev_reg_info *regs)
1148 {
1149 struct txgbe_hw *hw = TXGBE_DEV_HW(dev);
1150 uint32_t *data = regs->data;
1151 int g_ind = 0;
1152 int count = 0;
1153 const struct reg_info *reg_group;
1154
1155 if (data == NULL) {
1156 regs->length = txgbevf_get_reg_length(dev);
1157 regs->width = sizeof(uint32_t);
1158 return 0;
1159 }
1160
1161 /* Support only full register dump */
1162 if (regs->length == 0 ||
1163 regs->length == (uint32_t)txgbevf_get_reg_length(dev)) {
1164 regs->version = hw->mac.type << 24 | hw->revision_id << 16 |
1165 hw->device_id;
1166 while ((reg_group = txgbevf_regs[g_ind++]))
1167 count += txgbe_read_regs_group(dev, &data[count],
1168 reg_group);
1169 return 0;
1170 }
1171
1172 return -ENOTSUP;
1173 }
1174
1175 static int
txgbevf_dev_promiscuous_enable(struct rte_eth_dev * dev)1176 txgbevf_dev_promiscuous_enable(struct rte_eth_dev *dev)
1177 {
1178 struct txgbe_hw *hw = TXGBE_DEV_HW(dev);
1179 int ret;
1180
1181 switch (hw->mac.update_xcast_mode(hw, TXGBEVF_XCAST_MODE_PROMISC)) {
1182 case 0:
1183 ret = 0;
1184 break;
1185 case TXGBE_ERR_FEATURE_NOT_SUPPORTED:
1186 ret = -ENOTSUP;
1187 break;
1188 default:
1189 ret = -EAGAIN;
1190 break;
1191 }
1192
1193 return ret;
1194 }
1195
1196 static int
txgbevf_dev_promiscuous_disable(struct rte_eth_dev * dev)1197 txgbevf_dev_promiscuous_disable(struct rte_eth_dev *dev)
1198 {
1199 struct txgbe_hw *hw = TXGBE_DEV_HW(dev);
1200 int ret;
1201
1202 switch (hw->mac.update_xcast_mode(hw, TXGBEVF_XCAST_MODE_NONE)) {
1203 case 0:
1204 ret = 0;
1205 break;
1206 case TXGBE_ERR_FEATURE_NOT_SUPPORTED:
1207 ret = -ENOTSUP;
1208 break;
1209 default:
1210 ret = -EAGAIN;
1211 break;
1212 }
1213
1214 return ret;
1215 }
1216
1217 static int
txgbevf_dev_allmulticast_enable(struct rte_eth_dev * dev)1218 txgbevf_dev_allmulticast_enable(struct rte_eth_dev *dev)
1219 {
1220 struct txgbe_hw *hw = TXGBE_DEV_HW(dev);
1221 int ret;
1222
1223 switch (hw->mac.update_xcast_mode(hw, TXGBEVF_XCAST_MODE_ALLMULTI)) {
1224 case 0:
1225 ret = 0;
1226 break;
1227 case TXGBE_ERR_FEATURE_NOT_SUPPORTED:
1228 ret = -ENOTSUP;
1229 break;
1230 default:
1231 ret = -EAGAIN;
1232 break;
1233 }
1234
1235 return ret;
1236 }
1237
1238 static int
txgbevf_dev_allmulticast_disable(struct rte_eth_dev * dev)1239 txgbevf_dev_allmulticast_disable(struct rte_eth_dev *dev)
1240 {
1241 struct txgbe_hw *hw = TXGBE_DEV_HW(dev);
1242 int ret;
1243
1244 switch (hw->mac.update_xcast_mode(hw, TXGBEVF_XCAST_MODE_MULTI)) {
1245 case 0:
1246 ret = 0;
1247 break;
1248 case TXGBE_ERR_FEATURE_NOT_SUPPORTED:
1249 ret = -ENOTSUP;
1250 break;
1251 default:
1252 ret = -EAGAIN;
1253 break;
1254 }
1255
1256 return ret;
1257 }
1258
txgbevf_mbx_process(struct rte_eth_dev * dev)1259 static void txgbevf_mbx_process(struct rte_eth_dev *dev)
1260 {
1261 struct txgbe_hw *hw = TXGBE_DEV_HW(dev);
1262 u32 in_msg = 0;
1263
1264 /* peek the message first */
1265 in_msg = rd32(hw, TXGBE_VFMBX);
1266
1267 /* PF reset VF event */
1268 if (in_msg == TXGBE_PF_CONTROL_MSG) {
1269 /* dummy mbx read to ack pf */
1270 if (txgbe_read_mbx(hw, &in_msg, 1, 0))
1271 return;
1272 rte_eth_dev_callback_process(dev, RTE_ETH_EVENT_INTR_RESET,
1273 NULL);
1274 }
1275 }
1276
1277 static int
txgbevf_dev_interrupt_get_status(struct rte_eth_dev * dev)1278 txgbevf_dev_interrupt_get_status(struct rte_eth_dev *dev)
1279 {
1280 uint32_t eicr;
1281 struct txgbe_hw *hw = TXGBE_DEV_HW(dev);
1282 struct txgbe_interrupt *intr = TXGBE_DEV_INTR(dev);
1283 txgbevf_intr_disable(dev);
1284
1285 /* read-on-clear nic registers here */
1286 eicr = rd32(hw, TXGBE_VFICR);
1287 intr->flags = 0;
1288
1289 /* only one misc vector supported - mailbox */
1290 eicr &= TXGBE_VFICR_MASK;
1291 /* Workaround for ICR lost */
1292 intr->flags |= TXGBE_FLAG_MAILBOX;
1293
1294 /* To avoid compiler warnings set eicr to used. */
1295 RTE_SET_USED(eicr);
1296
1297 return 0;
1298 }
1299
1300 static int
txgbevf_dev_interrupt_action(struct rte_eth_dev * dev)1301 txgbevf_dev_interrupt_action(struct rte_eth_dev *dev)
1302 {
1303 struct txgbe_interrupt *intr = TXGBE_DEV_INTR(dev);
1304
1305 if (intr->flags & TXGBE_FLAG_MAILBOX) {
1306 txgbevf_mbx_process(dev);
1307 intr->flags &= ~TXGBE_FLAG_MAILBOX;
1308 }
1309
1310 txgbevf_intr_enable(dev);
1311
1312 return 0;
1313 }
1314
1315 static void
txgbevf_dev_interrupt_handler(void * param)1316 txgbevf_dev_interrupt_handler(void *param)
1317 {
1318 struct rte_eth_dev *dev = (struct rte_eth_dev *)param;
1319
1320 txgbevf_dev_interrupt_get_status(dev);
1321 txgbevf_dev_interrupt_action(dev);
1322 }
1323
1324 /*
1325 * dev_ops for virtual function, bare necessities for basic vf
1326 * operation have been implemented
1327 */
1328 static const struct eth_dev_ops txgbevf_eth_dev_ops = {
1329 .dev_configure = txgbevf_dev_configure,
1330 .dev_start = txgbevf_dev_start,
1331 .dev_stop = txgbevf_dev_stop,
1332 .link_update = txgbevf_dev_link_update,
1333 .stats_get = txgbevf_dev_stats_get,
1334 .xstats_get = txgbevf_dev_xstats_get,
1335 .stats_reset = txgbevf_dev_stats_reset,
1336 .xstats_reset = txgbevf_dev_stats_reset,
1337 .xstats_get_names = txgbevf_dev_xstats_get_names,
1338 .dev_close = txgbevf_dev_close,
1339 .dev_reset = txgbevf_dev_reset,
1340 .promiscuous_enable = txgbevf_dev_promiscuous_enable,
1341 .promiscuous_disable = txgbevf_dev_promiscuous_disable,
1342 .allmulticast_enable = txgbevf_dev_allmulticast_enable,
1343 .allmulticast_disable = txgbevf_dev_allmulticast_disable,
1344 .dev_infos_get = txgbevf_dev_info_get,
1345 .dev_supported_ptypes_get = txgbe_dev_supported_ptypes_get,
1346 .mtu_set = txgbevf_dev_set_mtu,
1347 .vlan_filter_set = txgbevf_vlan_filter_set,
1348 .vlan_strip_queue_set = txgbevf_vlan_strip_queue_set,
1349 .vlan_offload_set = txgbevf_vlan_offload_set,
1350 .rx_queue_setup = txgbe_dev_rx_queue_setup,
1351 .rx_queue_release = txgbe_dev_rx_queue_release,
1352 .tx_queue_setup = txgbe_dev_tx_queue_setup,
1353 .tx_queue_release = txgbe_dev_tx_queue_release,
1354 .rx_queue_intr_enable = txgbevf_dev_rx_queue_intr_enable,
1355 .rx_queue_intr_disable = txgbevf_dev_rx_queue_intr_disable,
1356 .mac_addr_add = txgbevf_add_mac_addr,
1357 .mac_addr_remove = txgbevf_remove_mac_addr,
1358 .set_mc_addr_list = txgbe_dev_set_mc_addr_list,
1359 .rxq_info_get = txgbe_rxq_info_get,
1360 .txq_info_get = txgbe_txq_info_get,
1361 .mac_addr_set = txgbevf_set_default_mac_addr,
1362 .get_reg = txgbevf_get_regs,
1363 .reta_update = txgbe_dev_rss_reta_update,
1364 .reta_query = txgbe_dev_rss_reta_query,
1365 .rss_hash_update = txgbe_dev_rss_hash_update,
1366 .rss_hash_conf_get = txgbe_dev_rss_hash_conf_get,
1367 .tx_done_cleanup = txgbe_dev_tx_done_cleanup,
1368 };
1369
1370 RTE_PMD_REGISTER_PCI(net_txgbe_vf, rte_txgbevf_pmd);
1371 RTE_PMD_REGISTER_PCI_TABLE(net_txgbe_vf, pci_id_txgbevf_map);
1372 RTE_PMD_REGISTER_KMOD_DEP(net_txgbe_vf, "* igb_uio | vfio-pci");
1373