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Searched refs:msix_vector (Results 1 – 12 of 12) sorted by relevance

/dpdk/drivers/net/ena/base/
H A Dena_com.h106 u32 msix_vector; member
154 u32 msix_vector; member
347 u32 msix_vector; member
H A Dena_com.c1417 create_cmd.msix_vector = io_cq->msix_vector; in ena_com_create_io_cq()
1914 io_cq->msix_vector = ctx->msix_vector; in ena_com_create_io_queue()
/dpdk/drivers/net/txgbe/
H A Dtxgbe_ethdev_vf.c951 uint8_t queue, uint8_t msix_vector) in txgbevf_set_ivar_map() argument
957 msix_vector |= TXGBE_VFIVAR_VLD; in txgbevf_set_ivar_map()
960 tmp |= msix_vector; in txgbevf_set_ivar_map()
968 tmp |= (msix_vector << idx); in txgbevf_set_ivar_map()
H A Dtxgbe_ethdev.h540 uint8_t queue, uint8_t msix_vector);
H A Dtxgbe_ethdev.c3670 uint8_t queue, uint8_t msix_vector) in txgbe_set_ivar_map() argument
3676 msix_vector |= TXGBE_IVARMISC_VLD; in txgbe_set_ivar_map()
3680 tmp |= (msix_vector << idx); in txgbe_set_ivar_map()
3688 tmp |= (msix_vector << idx); in txgbe_set_ivar_map()
/dpdk/drivers/net/ngbe/
H A Dngbe_ethdev.h268 uint8_t queue, uint8_t msix_vector);
H A Dngbe_ethdev.c2606 uint8_t queue, uint8_t msix_vector) in ngbe_set_ivar_map() argument
2612 msix_vector |= NGBE_IVARMISC_VLD; in ngbe_set_ivar_map()
2616 tmp |= (msix_vector << idx); in ngbe_set_ivar_map()
2624 tmp |= (msix_vector << idx); in ngbe_set_ivar_map()
/dpdk/drivers/net/e1000/
H A Digb_ethdev.c231 uint8_t queue, uint8_t msix_vector);
232 static void eth_igb_write_ivar(struct e1000_hw *hw, uint8_t msix_vector,
561 igbvf_set_ivar_map(struct e1000_hw *hw, uint8_t msix_vector) in igbvf_set_ivar_map() argument
566 tmp |= (msix_vector & E1000_VTIVAR_MISC_INTR_MASK); in igbvf_set_ivar_map()
5147 eth_igb_write_ivar(struct e1000_hw *hw, uint8_t msix_vector, in eth_igb_write_ivar() argument
5156 val |= (msix_vector | E1000_IVAR_VALID) << offset; in eth_igb_write_ivar()
5163 uint8_t queue, uint8_t msix_vector) in eth_igb_assign_msix_vector() argument
5172 E1000_WRITE_REG(hw, E1000_MSIXBM(msix_vector), tmp); in eth_igb_assign_msix_vector()
5175 eth_igb_write_ivar(hw, msix_vector, queue & 0x7, in eth_igb_assign_msix_vector()
5184 eth_igb_write_ivar(hw, msix_vector, in eth_igb_assign_msix_vector()
/dpdk/drivers/net/ixgbe/
H A Dixgbe_ethdev.c273 uint8_t queue, uint8_t msix_vector);
289 uint8_t queue, uint8_t msix_vector);
5851 uint8_t queue, uint8_t msix_vector) in ixgbevf_set_ivar_map() argument
5857 msix_vector |= IXGBE_IVAR_ALLOC_VAL; in ixgbevf_set_ivar_map()
5860 tmp |= msix_vector; in ixgbevf_set_ivar_map()
5864 msix_vector |= IXGBE_IVAR_ALLOC_VAL; in ixgbevf_set_ivar_map()
5868 tmp |= (msix_vector << idx); in ixgbevf_set_ivar_map()
5886 uint8_t queue, uint8_t msix_vector) in ixgbe_set_ivar_map() argument
5890 msix_vector |= IXGBE_IVAR_ALLOC_VAL; in ixgbe_set_ivar_map()
5908 tmp |= (msix_vector << idx); in ixgbe_set_ivar_map()
[all …]
/dpdk/drivers/net/ena/base/ena_defs/
H A Dena_admin_defs.h300 uint32_t msix_vector; member
/dpdk/drivers/net/igc/
H A Digc_ethdev.c682 bool tx, uint8_t msix_vector) in igc_write_ivar() argument
710 val |= (uint32_t)(msix_vector | IGC_IVAR_VALID) << offset; in igc_write_ivar()
/dpdk/drivers/net/ena/
H A Dena_ethdev.c1287 ctx.msix_vector = -1; in ena_create_io_queue()
1298 ctx.msix_vector = in ena_create_io_queue()