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Searched defs:VectorWidth (Results 1 – 10 of 10) sorted by relevance

/llvm-project-15.0.7/llvm/lib/Transforms/Scalar/
H A DScalarizeMaskedMemIntrin.cpp105 static unsigned adjustForEndian(const DataLayout &DL, unsigned VectorWidth, in adjustForEndian()
176 unsigned VectorWidth = cast<FixedVectorType>(VecType)->getNumElements(); in scalarizeMaskedLoad() local
315 unsigned VectorWidth = cast<FixedVectorType>(VecType)->getNumElements(); in scalarizeMaskedStore() local
432 unsigned VectorWidth = VecType->getNumElements(); in scalarizeMaskedGather() local
562 unsigned VectorWidth = SrcFVTy->getNumElements(); in scalarizeMaskedScatter() local
649 unsigned VectorWidth = VecType->getNumElements(); in scalarizeMaskedExpandLoad() local
777 unsigned VectorWidth = VecType->getNumElements(); in scalarizeMaskedCompressStore() local
/llvm-project-15.0.7/llvm/lib/Target/ARM/
H A DMVETailPredication.cpp214 int VectorWidth = in IsSafeActiveMask() local
358 unsigned VectorWidth = in InsertVCTPIntrinsic() local
/llvm-project-15.0.7/polly/lib/Transform/
H A DScheduleOptimizer.cpp365 int VectorWidth) { in isolateFullPartialTiles()
395 isl::schedule_node Node, unsigned DimToVectorize, int VectorWidth) { in prevectSchedBand()
H A DScheduleTreeTransform.cpp546 static isl::set addExtentConstraints(isl::set Set, int VectorWidth) { in addExtentConstraints()
1114 int VectorWidth) { in getPartialTilePrefixes()
/llvm-project-15.0.7/polly/lib/CodeGen/
H A DBlockGenerators.cpp1043 unsigned VectorWidth = getVectorWidth(); in generateStrideOneLoad() local
1098 int VectorWidth = getVectorWidth(); in generateUnknownStrideLoad() local
1154 int VectorWidth = getVectorWidth(); in copyUnaryInst() local
1229 int VectorWidth = getVectorWidth(); in extractScalarValues() local
1261 int VectorWidth = getVectorWidth(); in copyInstScalarized() local
H A DIslNodeBuilder.cpp426 int VectorWidth = in createMark() local
460 int VectorWidth) { in createForVector()
796 int VectorWidth = in createFor() local
/llvm-project-15.0.7/llvm/lib/Target/X86/
H A DX86InterleavedAccess.cpp614 int VectorWidth = VT.getSizeInBits(); in group2Shuffle() local
/llvm-project-15.0.7/llvm/lib/Target/WebAssembly/
H A DWebAssemblyISelLowering.cpp2627 const SDLoc &DL, unsigned VectorWidth) { in extractSubVector()
/llvm-project-15.0.7/llvm/lib/CodeGen/GlobalISel/
H A DIRTranslator.cpp1495 unsigned VectorWidth = 0; in translateGetElementPtr() local
/llvm-project-15.0.7/clang/lib/CodeGen/
H A DCGBuiltin.cpp5264 if (unsigned VectorWidth = getContext().BuiltinInfo.getRequiredVectorWidth(BuiltinID)) in EmitBuiltinExpr() local