| /llvm-project-15.0.7/llvm/lib/Target/BPF/ |
| H A D | BPFISelLowering.h | 128 bool shouldReduceLoadWidth(SDNode *Load, ISD::LoadExtType ExtTy, in shouldReduceLoadWidth()
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| /llvm-project-15.0.7/llvm/unittests/IR/ |
| H A D | VectorTypesTest.cpp | 96 auto *ExtTy = dyn_cast<FixedVectorType>( in TEST() local
191 auto *ExtTy = dyn_cast<ScalableVectorType>( in TEST() local
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| /llvm-project-15.0.7/llvm/include/llvm/CodeGen/ |
| H A D | BasicTTIImpl.h | 1887 Type *ExtTy = RetTy->getWithNewBitWidth(ExtSize); in getTypeBasedIntrinsicInstrCost() local
1952 Type *ExtTy = MulTy->getWithNewBitWidth(ExtSize); in getTypeBasedIntrinsicInstrCost() local
2322 VectorType *ExtTy = VectorType::get(ResTy, Ty); in getExtendedAddReductionCost() local
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| H A D | TargetLowering.h | 1603 virtual bool shouldReduceLoadWidth(SDNode *Load, ISD::LoadExtType ExtTy, in shouldReduceLoadWidth()
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| /llvm-project-15.0.7/llvm/lib/CodeGen/ |
| H A D | TypePromotion.cpp | 109 IntegerType *ExtTy = nullptr; member in __anone4b1306d0111::IRPromoter
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| H A D | CodeGenPrepare.cpp | 4048 ExtType ExtTy = IsSExt ? SignExtension : ZeroExtension; in addPromotedInst() local
4071 ExtType ExtTy = IsSExt ? SignExtension : ZeroExtension; in getOrigType() local
4283 Type *ExtTy = Ext->getType(); in getAction() local
5682 Type *ExtTy = FirstUser->getType(); in hasSameExtUse() local
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| /llvm-project-15.0.7/llvm/lib/Target/AMDGPU/ |
| H A D | AMDGPUCallLowering.cpp | 326 LLT ExtTy = getLLTForType(*RetInfo.Ty, DL); in lowerReturnVal() local
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| H A D | AMDGPUISelLowering.cpp | 633 ISD::LoadExtType ExtTy, in shouldReduceLoadWidth()
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| /llvm-project-15.0.7/llvm/lib/Target/Hexagon/ |
| H A D | HexagonISelLoweringHVX.cpp | 716 MVT ExtTy = ty(ExtVec); in buildHvxVectorReg() local
1718 MVT ExtTy = typeExtElem(ResTy, 2); in LowerHvxMulh() local
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| H A D | HexagonISelLowering.cpp | 3600 ISD::LoadExtType ExtTy, EVT NewVT) const { in shouldReduceLoadWidth()
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| /llvm-project-15.0.7/llvm/lib/Target/AArch64/AsmParser/ |
| H A D | AArch64AsmParser.cpp | 1982 AArch64_AM::ShiftExtendType ExtTy = AArch64_AM::LSL, in CreateReg()
2001 AArch64_AM::ShiftExtendType ExtTy = AArch64_AM::LSL, in CreateVectorReg()
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| /llvm-project-15.0.7/llvm/lib/IR/ |
| H A D | AutoUpgrade.cpp | 2099 Type *ExtTy = Type::getInt32Ty(C); in UpgradeIntrinsicCall() local
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| /llvm-project-15.0.7/llvm/lib/CodeGen/GlobalISel/ |
| H A D | CombinerHelper.cpp | 3872 LLT ExtTy = MRI.getType(DstReg); in applyExtendThroughPhis() local
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| /llvm-project-15.0.7/llvm/utils/TableGen/ |
| H A D | GlobalISelEmitter.cpp | 4783 const TypeSetByHwMode &ExtTy = Dst->getExtType(I); in importExplicitDefRenderers() local
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| /llvm-project-15.0.7/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | SelectionDAG.cpp | 8620 ISD::LoadExtType ExtTy, bool isExpanding) { in getMaskedLoad()
8714 ISD::LoadExtType ExtTy) { in getMaskedGather()
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| H A D | DAGCombiner.cpp | 19661 ISD::LoadExtType ExtTy = in scalarizeExtractedVectorLoad() local
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| /llvm-project-15.0.7/llvm/lib/Target/AArch64/ |
| H A D | AArch64ISelLowering.cpp | 4172 const EVT &ExtTy, in addRequiredExtensionForVectorMULL()
12531 ISD::LoadExtType ExtTy, in shouldReduceLoadWidth()
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| /llvm-project-15.0.7/llvm/lib/Analysis/ |
| H A D | ScalarEvolution.cpp | 3385 IntegerType *ExtTy = in getUDivExpr() local
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| /llvm-project-15.0.7/llvm/lib/Target/ARM/ |
| H A D | ARMISelLowering.cpp | 9350 const EVT &ExtTy, in AddRequiredExtensionForVMULL()
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| /llvm-project-15.0.7/llvm/lib/Target/X86/ |
| H A D | X86ISelLowering.cpp | 5688 ISD::LoadExtType ExtTy, in shouldReduceLoadWidth()
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