| /llvm-project-15.0.7/llvm/lib/Target/Mips/Disassembler/ |
| H A D | MipsDisassembler.cpp | 1005 const MCDisassembler *Decoder) { in DecodeDEXT()
1047 const MCDisassembler *Decoder) { in DecodeDINS()
1089 const MCDisassembler *Decoder) { in DecodeCRC()
1335 const MCDisassembler *Decoder) { in DecodeCPU16RegsRegisterClass()
1362 const MCDisassembler *Decoder) { in DecodeGPRMM16ZeroRegisterClass()
1372 const MCDisassembler *Decoder) { in DecodeGPRMM16MovePRegisterClass()
1459 const MCDisassembler *Decoder) { in DecodeMem()
1578 const MCDisassembler *Decoder) { in DecodeSyncI()
1847 const MCDisassembler *Decoder) { in DecodeFMem()
2231 const MCDisassembler *Decoder) { in DecodeUImmWithOffsetAndScale()
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| /llvm-project-15.0.7/llvm/lib/Target/SystemZ/Disassembler/ |
| H A D | SystemZDisassembler.cpp | 76 const MCDisassembler *Decoder) { in tryAddingSymbolicOperand()
117 const MCDisassembler *Decoder) { in DecodeADDR64BitRegisterClass()
187 const MCDisassembler *Decoder) { in decodeU1ImmOperand()
193 const MCDisassembler *Decoder) { in decodeU2ImmOperand()
199 const MCDisassembler *Decoder) { in decodeU3ImmOperand()
419 const MCDisassembler *Decoder) { in decodeBDXAddr64Disp12Operand()
425 const MCDisassembler *Decoder) { in decodeBDXAddr64Disp20Operand()
431 const MCDisassembler *Decoder) { in decodeBDLAddr64Disp12Len4Operand()
437 const MCDisassembler *Decoder) { in decodeBDLAddr64Disp12Len8Operand()
443 const MCDisassembler *Decoder) { in decodeBDRAddr64Disp12Operand()
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| /llvm-project-15.0.7/llvm/lib/Target/AArch64/Disassembler/ |
| H A D | AArch64Disassembler.cpp | 408 const MCDisassembler *Decoder) { in DecodeFPR128_loRegisterClass()
464 const MCDisassembler *Decoder) { in DecodeGPR64commonRegisterClass()
489 const MCDisassembler *Decoder) { in DecodeGPR64x8ClassRegisterClass()
615 const MCDisassembler *Decoder) { in DecodeMatrixTileListRegisterClass()
894 const MCDisassembler *Decoder) { in DecodeThreeAddrSRegInstruction()
989 const MCDisassembler *Decoder) { in DecodeUnsignedLdStInstruction()
1246 const MCDisassembler *Decoder) { in DecodeExclusiveLdStInstruction()
1709 const MCDisassembler *Decoder) { in DecodeSystemPStateInstruction()
1790 const MCDisassembler *Decoder) { in DecodeSVELogicalImmInstruction()
1806 const MCDisassembler *Decoder) { in DecodeSImm()
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| /llvm-project-15.0.7/llvm/lib/Target/RISCV/Disassembler/ |
| H A D | RISCVDisassembler.cpp | 63 const MCDisassembler *Decoder) { in DecodeGPRRegisterClass()
143 const MCDisassembler *Decoder) { in DecodeGPRNoX0X2RegisterClass()
175 const MCDisassembler *Decoder) { in DecodeVRRegisterClass()
246 const MCDisassembler *Decoder) { in decodeVMaskReg()
264 const MCDisassembler *Decoder) { in addImplySP()
283 const MCDisassembler *Decoder) { in decodeUImmOperand()
302 const MCDisassembler *Decoder) { in decodeSImmOperand()
333 const MCDisassembler *Decoder) { in decodeCLUIImmOperand()
343 const MCDisassembler *Decoder) { in decodeFRMArg()
376 const MCDisassembler *Decoder) { in decodeRVCInstrSImm()
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| /llvm-project-15.0.7/llvm/lib/Target/PowerPC/Disassembler/ |
| H A D | PPCDisassembler.cpp | 153 const MCDisassembler *Decoder) { in DecodeGPRC_NOR0RegisterClass()
171 const MCDisassembler *Decoder) { in DecodeG8RC_NOX0RegisterClass()
202 const MCDisassembler *Decoder) { in decodeUImmOperand()
211 const MCDisassembler *Decoder) { in decodeSImmOperand()
219 const MCDisassembler *Decoder) { in decodeImmZeroOperand()
237 const MCDisassembler *Decoder) { in decodeMemRIOperands()
273 const MCDisassembler *Decoder) { in decodeMemRIXOperands()
357 const MCDisassembler *Decoder) { in decodeSPE8Operands()
373 const MCDisassembler *Decoder) { in decodeSPE4Operands()
389 const MCDisassembler *Decoder) { in decodeSPE2Operands()
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| /llvm-project-15.0.7/llvm/lib/Target/CSKY/Disassembler/ |
| H A D | CSKYDisassembler.cpp | 110 const MCDisassembler *Decoder) { in DecodeGPRRegisterClass()
229 const MCDisassembler *Decoder) { in decodeUImmOperand()
238 const MCDisassembler *Decoder) { in decodeOImmOperand()
245 const MCDisassembler *Decoder) { in decodeLRW16Imm8()
259 const MCDisassembler *Decoder) { in decodeJMPIXImmOperand()
278 const MCDisassembler *Decoder) { in DecodeRegSeqOperand()
295 const MCDisassembler *Decoder) { in DecodeRegSeqOperandF1()
312 const MCDisassembler *Decoder) { in DecodeRegSeqOperandD1()
329 const MCDisassembler *Decoder) { in DecodeRegSeqOperandF2()
346 const MCDisassembler *Decoder) { in DecodeRegSeqOperandD2()
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| /llvm-project-15.0.7/llvm/lib/Target/VE/Disassembler/ |
| H A D | VEDisassembler.cpp | 317 const MCDisassembler *Decoder) { in DecodeASX()
350 const MCDisassembler *Decoder) { in DecodeAS()
420 const MCDisassembler *Decoder) { in DecodeLoadI32()
426 const MCDisassembler *Decoder) { in DecodeStoreI32()
431 const MCDisassembler *Decoder) { in DecodeLoadI64()
442 const MCDisassembler *Decoder) { in DecodeLoadF32()
517 const MCDisassembler *Decoder) { in DecodeCASI64()
523 const MCDisassembler *Decoder) { in DecodeCASI32()
529 const MCDisassembler *Decoder) { in DecodeCall()
534 const MCDisassembler *Decoder) { in DecodeSIMM7()
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| /llvm-project-15.0.7/llvm/lib/Target/Sparc/Disassembler/ |
| H A D | SparcDisassembler.cpp | 417 const MCDisassembler *Decoder) { in DecodeLoadInt()
430 const MCDisassembler *Decoder) { in DecodeLoadFP()
436 const MCDisassembler *Decoder) { in DecodeLoadDFP()
442 const MCDisassembler *Decoder) { in DecodeLoadQFP()
448 const MCDisassembler *Decoder) { in DecodeLoadCP()
516 const MCDisassembler *Decoder) { in DecodeCall()
526 const MCDisassembler *Decoder) { in DecodeSIMM13()
533 const MCDisassembler *Decoder) { in DecodeJMPL()
567 const MCDisassembler *Decoder) { in DecodeReturn()
595 const MCDisassembler *Decoder) { in DecodeSWAP()
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| /llvm-project-15.0.7/llvm/lib/Target/ARM/Disassembler/ |
| H A D | ARMDisassembler.cpp | 1349 const MCDisassembler *Decoder) { in DecodeGPRwithAPSRRegisterClass()
1364 const MCDisassembler *Decoder) { in DecodeGPRwithZRRegisterClass()
1423 const MCDisassembler *Decoder) { in DecodeGPRPairnospRegisterClass()
1623 const MCDisassembler *Decoder) { in DecodeDPairSpacedRegisterClass()
2042 const MCDisassembler *Decoder) { in DecodeAddrMode2IdxInstruction()
2658 const MCDisassembler *Decoder) { in DecodeT2HintSpaceInstruction()
5846 const MCDisassembler *Decoder) { in DecodeIT()
5984 const MCDisassembler *Decoder) { in DecodeSwap()
6162 const MCDisassembler *Decoder) { in DecodeLDR()
6710 const MCDisassembler *Decoder, unsigned Rn, in DecodeMVE_MEM_pre()
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| /llvm-project-15.0.7/llvm/lib/Target/AVR/Disassembler/ |
| H A D | AVRDisassembler.cpp | 133 const MCDisassembler *Decoder) { in decodeFIOARr()
146 const MCDisassembler *Decoder) { in decodeFIORdA()
159 const MCDisassembler *Decoder) { in decodeFIOBIT()
169 const MCDisassembler *Decoder) { in decodeCallTarget()
177 const MCDisassembler *Decoder) { in decodeFRd()
186 const MCDisassembler *Decoder) { in decodeFLPMX()
195 const MCDisassembler *Decoder) { in decodeFFMULRdRr()
209 const MCDisassembler *Decoder) { in decodeFMOVWRdRr()
222 const MCDisassembler *Decoder) { in decodeFWRdK()
239 const MCDisassembler *Decoder) { in decodeFMUL2RdRr()
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| /llvm-project-15.0.7/llvm/lib/Target/M68k/Disassembler/ |
| H A D | M68kDisassembler.cpp | 42 uint64_t Address, const void *Decoder) { in DecodeRegisterClass()
51 const void *Decoder) { in DecodeDR32RegisterClass()
57 const void *Decoder) { in DecodeDR16RegisterClass()
63 const void *Decoder) { in DecodeDR8RegisterClass()
69 const void *Decoder) { in DecodeAR32RegisterClass()
75 const void *Decoder) { in DecodeAR16RegisterClass()
81 const void *Decoder) { in DecodeXR32RegisterClass()
87 const void *Decoder) { in DecodeXR16RegisterClass()
93 const void *Decoder) { in DecodeCCRCRegisterClass()
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| /llvm-project-15.0.7/llvm/lib/Target/LoongArch/Disassembler/ |
| H A D | LoongArchDisassembler.cpp | 60 const MCDisassembler *Decoder) { in DecodeGPRRegisterClass()
69 const MCDisassembler *Decoder) { in DecodeFPR32RegisterClass()
78 const MCDisassembler *Decoder) { in DecodeFPR64RegisterClass()
87 const MCDisassembler *Decoder) { in DecodeCFRRegisterClass()
96 const MCDisassembler *Decoder) { in DecodeFCSRRegisterClass()
106 const MCDisassembler *Decoder) { in decodeUImmOperand()
115 const MCDisassembler *Decoder) { in decodeSImmOperand()
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| /llvm-project-15.0.7/llvm/lib/Target/XCore/Disassembler/ |
| H A D | XCoreDisassembler.cpp | 198 const MCDisassembler *Decoder) { in DecodeBitpOperand()
210 const MCDisassembler *Decoder) { in DecodeNegImmOperand()
321 const MCDisassembler *Decoder) { in Decode2RInstruction()
347 const MCDisassembler *Decoder) { in DecodeR2RInstruction()
374 const MCDisassembler *Decoder) { in DecodeRUSInstruction()
400 const MCDisassembler *Decoder) { in DecodeRUSSrcDstBitpInstruction()
485 const MCDisassembler *Decoder) { in DecodeL2RInstruction()
513 const MCDisassembler *Decoder) { in Decode3RInstruction()
565 const MCDisassembler *Decoder) { in DecodeL3RInstruction()
622 const MCDisassembler *Decoder) { in DecodeL6RInstruction()
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| /llvm-project-15.0.7/llvm/lib/Target/Hexagon/Disassembler/ |
| H A D | HexagonDisassembler.cpp | 86 const MCDisassembler *Decoder) { in signedDecoder()
549 const MCDisassembler *Decoder) { in DecodeIntRegsLow8RegisterClass()
571 const MCDisassembler *Decoder) { in DecodeGeneralSubRegsRegisterClass()
600 const MCDisassembler *Decoder) { in DecodeDoubleRegsRegisterClass()
641 const MCDisassembler *Decoder) { in DecodeHvxVQRRegisterClass()
697 const MCDisassembler *Decoder) { in DecodeCtrRegs64RegisterClass()
753 const MCDisassembler *Decoder) { in s32_0ImmDecoder()
763 const MCDisassembler *Decoder) { in brtargetDecoder()
836 const MCDisassembler *Decoder) { in DecodeSysRegs64RegisterClass()
851 const MCDisassembler *Decoder) { in DecodeGuestRegsRegisterClass()
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| /llvm-project-15.0.7/llvm/lib/Target/Lanai/Disassembler/ |
| H A D | LanaiDisassembler.cpp | 176 const MCDisassembler *Decoder) { in decodeRiMemoryValue()
189 const MCDisassembler *Decoder) { in decodeRrMemoryValue()
202 const MCDisassembler *Decoder) { in decodeSplsValue()
216 const MCDisassembler *Decoder) { in tryAddingSymbolicOperand()
222 const MCDisassembler *Decoder) { in decodeBranch()
231 const MCDisassembler *Decoder) { in decodeShiftImm()
240 const MCDisassembler *Decoder) { in decodePredicateOperand()
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| /llvm-project-15.0.7/llvm/lib/Target/ARC/Disassembler/ |
| H A D | ARCDisassembler.cpp | 133 const MCDisassembler *Decoder) { in DecodeGPR32RegisterClass()
146 const MCDisassembler *Decoder) { in DecodeGBR32ShortRegister()
181 const MCDisassembler *Decoder) { in DecodeSymbolicOperand()
189 const MCDisassembler *Decoder) { in DecodeSymbolicOperandOff()
199 const MCDisassembler *Decoder) { in DecodeBranchTargetS()
231 const MCDisassembler *Decoder) { in DecodeStLImmInstruction()
248 const MCDisassembler *Decoder) { in DecodeLdLImmInstruction()
266 const MCDisassembler *Decoder) { in DecodeLdRLImmInstruction()
309 const MCDisassembler *Decoder) { in DecodeCCRU6Instruction()
324 const MCDisassembler *Decoder) { in DecodeSOPwithRU6()
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| /llvm-project-15.0.7/llvm/lib/Target/AMDGPU/Disassembler/ |
| H A D | AMDGPUDisassembler.cpp | 79 const MCDisassembler *Decoder) { in decodeSoppBrTarget()
93 const MCDisassembler *Decoder) { in decodeSMEMOffset()
105 const MCDisassembler *Decoder) { in decodeBoolReg()
179 const MCDisassembler *Decoder) { in decodeOperand_VS_16()
186 const MCDisassembler *Decoder) { in decodeOperand_VS_32()
277 const MCDisassembler *Decoder) { in decodeOperand_VS_16_Deferred()
285 const MCDisassembler *Decoder) { in decodeOperand_VS_32_Deferred()
347 const MCDisassembler *Decoder) { in DecodeAVLdSt_32RegisterClass()
354 const MCDisassembler *Decoder) { in DecodeAVLdSt_64RegisterClass()
361 const MCDisassembler *Decoder) { in DecodeAVLdSt_96RegisterClass()
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| /llvm-project-15.0.7/llvm/tools/llvm-readobj/ |
| H A D | ARMWinEHPrinter.h | 33 bool (Decoder::*Routine)(const uint8_t *, unsigned &, unsigned, bool); member
180 Decoder(ScopedPrinter &SW, bool isAArch64) : SW(SW), in Decoder() function
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| H A D | COFFDumper.cpp | 1620 ARM::WinEH::Decoder Decoder(W, Obj->getMachine() == in printUnwindInfo() local
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| /llvm-project-15.0.7/llvm/lib/Target/MSP430/Disassembler/ |
| H A D | MSP430Disassembler.cpp | 75 const MCDisassembler *Decoder) { in DecodeGR8RegisterClass()
93 const MCDisassembler *Decoder) { in DecodeGR16RegisterClass()
112 const MCDisassembler *Decoder) { in DecodeCGImm()
130 const MCDisassembler *Decoder) { in DecodeMemOperand()
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| /llvm-project-15.0.7/llvm/lib/DebugInfo/GSYM/ |
| H A D | ObjectFileTransformer.cpp | 51 DataExtractor Decoder(BuildIDData, Obj.makeTriple().isLittleEndian(), 8); in getUUID() local
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| /llvm-project-15.0.7/llvm/utils/TableGen/ |
| H A D | DecoderEmitter.cpp | 67 std::string Decoder; member
1019 for (const auto &Decoder : Decoders) { in emitDecoderFunction() local
1147 const std::string &Decoder = OpInfo.Decoder; in emitBinaryParser() local
1211 SmallString<256> Decoder; in getDecoderIndex() local
1828 std::string Decoder; in findOperandDecoderMethod() local
1853 std::string Decoder = findOperandDecoderMethod(TypeRecord); in getOpInfo() local
2069 std::string Decoder; in populateInstruction() local
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| /llvm-project-15.0.7/llvm/lib/Target/BPF/Disassembler/ |
| H A D | BPFDisassembler.cpp | 129 const MCDisassembler *Decoder) { in decodeMemoryOpValue()
|