Make sure to initialize the TheDef field!

llvm-svn: 27078

Move CodeGenIntrinsic implementation to CodeGenTarget.cpp with the rest of
the CodeGen* implementations.

Parse the MVT::ValueType for each operand of the intrinsics.

llvm-svn: 27075

getEnumName() missed v8i8, v4i16, and v2i32 types

llvm-svn: 26869

New vector type v2f32.

llvm-svn: 26437

Added x86 integer vector types: 64-bit packed byte integer (v16i8), 64-bit
packed word integer (v8i16), and 64-bit packed doubleword integer (v2i32).

llvm-svn: 26294

PHI and INLINEASM are now builtin instructions provided by Target.td

llvm-svn: 25673

* Remove instruction fields hasInFlag / hasOutFlag and added SNDPInFlag and
SNDPOutFlag to DAG nodes. These properties do not belong to target specific
instructions.
* Added DAG node property SNDPOpt

* Remove instruction fields hasInFlag / hasOutFlag and added SNDPInFlag and
SNDPOutFlag to DAG nodes. These properties do not belong to target specific
instructions.
* Added DAG node property SNDPOptInFlag. It's same as SNDPInFlag except it's
optional. Used by ret / call, etc.

llvm-svn: 25154

show more ...

Added field noResults to Instruction.
Currently tblgen cannot tell which operands in the operand list are results so
it assumes the first one is a result. This is bad. Ideally we would fix this
by se

Added field noResults to Instruction.
Currently tblgen cannot tell which operands in the operand list are results so
it assumes the first one is a result. This is bad. Ideally we would fix this
by separating results from inputs, e.g. (res R32:$dst),
(ops R32:$src1, R32:$src2). But that's a more distruptive change. Adding
'let noResults = 1' is the workaround to tell tblgen that the instruction does
not produces a result. It works for now since tblgen does not support
instructions which produce multiple results.

llvm-svn: 25017

show more ...

* Support for hasInFlag and hasOutFlag (on instructions). Remove nameless FLAG
support which is fragile.
* Fixed a number of bugs.

llvm-svn: 24996

Support for read / write from explicit registers with FlagVT type.

llvm-svn: 24753

* Added an explicit type field to ComplexPattern.
* Renamed MatchingNodes to RootNodes.

llvm-svn: 24636

Added support for ComplexPattern. These are patterns that require C++ pattern
matching code that is not currently auto-generated by tblgen, e.g. X86
addressing mode. Selection routines for complex pa

Added support for ComplexPattern. These are patterns that require C++ pattern
matching code that is not currently auto-generated by tblgen, e.g. X86
addressing mode. Selection routines for complex patterns can return multiple operands, e.g. X86 addressing mode returns 4.

llvm-svn: 24634

show more ...

* Commit the fix (by Chris) for a tblgen type inferencing bug.
* Enhanced tblgen to handle instructions which have chain operand and writes a
chain result.
* Enhanced tblgen to handle instructions wh

* Commit the fix (by Chris) for a tblgen type inferencing bug.
* Enhanced tblgen to handle instructions which have chain operand and writes a
chain result.
* Enhanced tblgen to handle instructions which produces no results. Part of
the change is a temporary hack which relies on instruction property (e.g.
isReturn, isBranch). The proper fix would be to change the .td syntax to
separate results dag from ops dag.

llvm-svn: 24587

show more ...

Support multiple ValueTypes per RegisterClass, needed for upcoming vector
work. This change has no effect on generated code.

llvm-svn: 24563

Nuke CodeGenInstruction's ValueType member, it is no longer used.

llvm-svn: 24556

Add the new vector types to tablegen

llvm-svn: 24514

Initialize this variable on all paths, fixing a crasher in windows. Thanks
to JeffC for pointing this out.

llvm-svn: 24426

Teach tblgen about instruction operands that have multiple MachineInstr
operands, digging into them to find register values (used on X86). Patch
by Evan Cheng!

llvm-svn: 24424

Rename Record::getValueAsListDef to getValueAsListOfDefs, to more accurately
reflect what it is.
Convert some more code over to use it.

llvm-svn: 24072

Do not let getLegalValueTypes return a list with duplicates in it

llvm-svn: 23723

force all instruction operands to be named.

llvm-svn: 23358

Check that operands have unique names. REJECT instructions with broken operand
lists: only don't parse them if they are entirely missing (sparcv9).

llvm-svn: 23355

Add a new Record::getValueAsCode method to mirror the other getValueAs*
methods. Use it to simplify some code.

llvm-svn: 23336

Compute the value types that are natively supported by a target.

llvm-svn: 23282

spell this right

llvm-svn: 23099