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Searched refs:fixed_vector (Results 1 – 25 of 34) sorted by relevance

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/llvm-project-15.0.7/llvm/unittests/CodeGen/GlobalISel/
H A DGISelUtilsTest.cpp23 static const LLT V2S8 = LLT::fixed_vector(2, 8);
24 static const LLT V4S8 = LLT::fixed_vector(4, 8);
25 static const LLT V8S8 = LLT::fixed_vector(8, 8);
27 static const LLT V2S16 = LLT::fixed_vector(2, 16);
122 getGCDType(LLT::fixed_vector(3, 5), LLT::fixed_vector(2, 6))); in TEST()
124 getGCDType(LLT::fixed_vector(2, 6), LLT::fixed_vector(3, 5))); in TEST()
142 EXPECT_EQ(LLT::fixed_vector(4, 2), getGCDType(LLT::fixed_vector(4, 2), S8)); in TEST()
148 EXPECT_EQ(LLT::fixed_vector(4, 2), in TEST()
233 EXPECT_EQ(LLT::fixed_vector(6, 4), getLCMType(LLT::fixed_vector(3, 4), S8)); in TEST()
234 EXPECT_EQ(LLT::fixed_vector(3, 8), getLCMType(S8, LLT::fixed_vector(3, 4))); in TEST()
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H A DLegalizerInfoTest.cpp233 const LLT v2s5 = LLT::fixed_vector(2, 5); in TEST()
234 const LLT v2s8 = LLT::fixed_vector(2, 8); in TEST()
235 const LLT v2s16 = LLT::fixed_vector(2, 16); in TEST()
236 const LLT v2s32 = LLT::fixed_vector(2, 32); in TEST()
237 const LLT v3s32 = LLT::fixed_vector(3, 32); in TEST()
238 const LLT v4s32 = LLT::fixed_vector(4, 32); in TEST()
239 const LLT v8s32 = LLT::fixed_vector(8, 32); in TEST()
244 const LLT v3p0 = LLT::fixed_vector(3, p0); in TEST()
245 const LLT v4p0 = LLT::fixed_vector(4, p0); in TEST()
248 const LLT v2s1 = LLT::fixed_vector(2, 1); in TEST()
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H A DMachineIRBuilderTest.cpp20 B.buildConstant(LLT::fixed_vector(2, 32), 99); in TEST_F()
21 B.buildFConstant(LLT::fixed_vector(2, 32), 2.0); in TEST_F()
54 EXPECT_DEATH(B.buildConstant(LLT::fixed_vector(2, 16), APV32), in TEST_F()
61 EXPECT_DEATH(B.buildConstant(LLT::fixed_vector(2, 16), *CI), in TEST_F()
68 EXPECT_DEATH(B.buildFConstant(LLT::fixed_vector(2, 16), *CF), in TEST_F()
342 LLT V2x32 = LLT::fixed_vector(2, 32); in TEST_F()
348 B.buildMerge(LLT::fixed_vector(4, 32), {RegC0C1, RegC2C3}); in TEST_F()
H A DLegalizerHelperTest.cpp148 LLT V4S32 = LLT::fixed_vector(4, S32); in TEST_F()
1431 LLT v2s32 = LLT::fixed_vector(2, 32); in TEST_F()
1432 LLT v6s32 = LLT::fixed_vector(6, 32); in TEST_F()
1483 LLT v2s32 = LLT::fixed_vector(2, 32); in TEST_F()
1484 LLT v5s32 = LLT::fixed_vector(5, 32); in TEST_F()
3158 LLT V2S32{LLT::fixed_vector(2, 32)}; in TEST_F()
3432 LLT V4S8 = LLT::fixed_vector(4, 8); in TEST_F()
3466 LLT V4S8 = LLT::fixed_vector(4, 8); in TEST_F()
3500 LLT V4S8 = LLT::fixed_vector(4, 8); in TEST_F()
3546 LLT V4S8 = LLT::fixed_vector(4, 8); in TEST_F()
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H A DLegalizerTest.cpp35 auto v2s8 = LLT::fixed_vector(2, 8);
36 auto v2s16 = LLT::fixed_vector(2, 16);
H A DCSETest.cpp63 auto Splat0 = CSEB.buildConstant(LLT::fixed_vector(2, s32), 0); in TEST_F()
68 auto FSplat = CSEB.buildFConstant(LLT::fixed_vector(2, s32), 1.0); in TEST_F()
188 LLT VecTy = LLT::fixed_vector(4, s32); in TEST_F()
H A DPatternMatchTest.cpp60 LLT v4s64 = LLT::fixed_vector(4, s64); in TEST_F()
450 LLT v2s32 = LLT::fixed_vector(2, 32); in TEST_F()
561 LLT v4s64 = LLT::fixed_vector(4, s64); in TEST_F()
591 LLT v4s64 = LLT::fixed_vector(4, s64); in TEST_F()
663 LLT v4s64 = LLT::fixed_vector(4, 64); in TEST_F()
/llvm-project-15.0.7/llvm/lib/Target/X86/
H A DX86LegalizerInfo.cpp297 const LLT v4s32 = LLT::fixed_vector(4, 32); in setLegalizerInfoSSE1()
298 const LLT v2s64 = LLT::fixed_vector(2, 64); in setLegalizerInfoSSE1()
330 const LLT v16s8 = LLT::fixed_vector(16, 8); in setLegalizerInfoSSE2()
331 const LLT v8s16 = LLT::fixed_vector(8, 16); in setLegalizerInfoSSE2()
332 const LLT v4s32 = LLT::fixed_vector(4, 32); in setLegalizerInfoSSE2()
333 const LLT v2s64 = LLT::fixed_vector(2, 64); in setLegalizerInfoSSE2()
335 const LLT v32s8 = LLT::fixed_vector(32, 8); in setLegalizerInfoSSE2()
337 const LLT v8s32 = LLT::fixed_vector(8, 32); in setLegalizerInfoSSE2()
338 const LLT v4s64 = LLT::fixed_vector(4, 64); in setLegalizerInfoSSE2()
380 const LLT v4s32 = LLT::fixed_vector(4, 32); in setLegalizerInfoSSE41()
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/llvm-project-15.0.7/llvm/unittests/CodeGen/
H A DLowLevelTypeTest.cpp112 EXPECT_EQ(LLT::fixed_vector(2, 32), in TEST()
120 EXPECT_EQ(LLT::fixed_vector(2, 32), in TEST()
138 const LLT V2S32 = LLT::fixed_vector(2, 32); in TEST()
139 const LLT V2S64 = LLT::fixed_vector(2, 64); in TEST()
141 const LLT V2P0 = LLT::fixed_vector(2, P0); in TEST()
142 const LLT V2P1 = LLT::fixed_vector(2, P1); in TEST()
181 const LLT V2P0 = LLT::fixed_vector(2, P0); in TEST()
182 const LLT V3P0 = LLT::fixed_vector(3, P0); in TEST()
313 EXPECT_EQ(LLT::fixed_vector(2, 32), LLT::fixed_vector(4, 32).divide(2)); in TEST()
330 EXPECT_EQ(LLT::fixed_vector(4, 32), in TEST()
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/llvm-project-15.0.7/llvm/lib/Target/SPIRV/
H A DSPIRVLegalizerInfo.cpp72 const LLT v16s8 = LLT::fixed_vector(16, 8); in SPIRVLegalizerInfo()
73 const LLT v16s1 = LLT::fixed_vector(16, 1); in SPIRVLegalizerInfo()
75 const LLT v8s64 = LLT::fixed_vector(8, 64); in SPIRVLegalizerInfo()
78 const LLT v8s8 = LLT::fixed_vector(8, 8); in SPIRVLegalizerInfo()
79 const LLT v8s1 = LLT::fixed_vector(8, 1); in SPIRVLegalizerInfo()
84 const LLT v4s8 = LLT::fixed_vector(4, 8); in SPIRVLegalizerInfo()
85 const LLT v4s1 = LLT::fixed_vector(4, 1); in SPIRVLegalizerInfo()
90 const LLT v3s8 = LLT::fixed_vector(3, 8); in SPIRVLegalizerInfo()
91 const LLT v3s1 = LLT::fixed_vector(3, 1); in SPIRVLegalizerInfo()
96 const LLT v2s8 = LLT::fixed_vector(2, 8); in SPIRVLegalizerInfo()
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H A DSPIRVPreLegalizer.cpp316 NewT = LLT::fixed_vector(2, NewT); in createNewIdReg()
/llvm-project-15.0.7/llvm/lib/Target/AArch64/GISel/
H A DAArch64LegalizerInfo.cpp50 const LLT v16s8 = LLT::fixed_vector(16, 8); in AArch64LegalizerInfo()
51 const LLT v8s8 = LLT::fixed_vector(8, 8); in AArch64LegalizerInfo()
52 const LLT v4s8 = LLT::fixed_vector(4, 8); in AArch64LegalizerInfo()
53 const LLT v8s16 = LLT::fixed_vector(8, 16); in AArch64LegalizerInfo()
54 const LLT v4s16 = LLT::fixed_vector(4, 16); in AArch64LegalizerInfo()
55 const LLT v2s16 = LLT::fixed_vector(2, 16); in AArch64LegalizerInfo()
56 const LLT v2s32 = LLT::fixed_vector(2, 32); in AArch64LegalizerInfo()
57 const LLT v4s32 = LLT::fixed_vector(4, 32); in AArch64LegalizerInfo()
58 const LLT v2s64 = LLT::fixed_vector(2, 64); in AArch64LegalizerInfo()
59 const LLT v2p0 = LLT::fixed_vector(2, p0); in AArch64LegalizerInfo()
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H A DAArch64InstructionSelector.cpp1801 if (Ty == LLT::fixed_vector(2, 64)) { in selectVectorSHL()
1855 if (Ty == LLT::fixed_vector(2, 64)) { in selectVectorAshrLshr()
3436 if (VecTy == LLT::fixed_vector(8, 8)) in select()
3502 if (VecTy == LLT::fixed_vector(16, 8)) in selectReduction()
3520 if (VecTy == LLT::fixed_vector(2, 32)) in selectReduction()
5632 if (Ty == LLT::fixed_vector(8, S8)) in selectIntrinsicWithSideEffects()
5644 else if (Ty == LLT::fixed_vector(2, S64) || Ty == LLT::fixed_vector(2, P0)) in selectIntrinsicWithSideEffects()
5656 if (Ty == LLT::fixed_vector(8, S8)) in selectIntrinsicWithSideEffects()
5668 else if (Ty == LLT::fixed_vector(2, S64) || Ty == LLT::fixed_vector(2, P0)) in selectIntrinsicWithSideEffects()
5683 if (Ty == LLT::fixed_vector(8, S8)) in selectIntrinsicWithSideEffects()
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H A DAArch64PostLegalizerLowering.cpp708 if (SrcTy == LLT::fixed_vector(2, LLT::scalar(32))) { in applyDupLane()
/llvm-project-15.0.7/llvm/lib/Target/AMDGPU/
H A DAMDGPULegalizerInfo.cpp445 const LLT V2S8 = LLT::fixed_vector(2, 8); in AMDGPULegalizerInfo()
446 const LLT V2S16 = LLT::fixed_vector(2, 16); in AMDGPULegalizerInfo()
447 const LLT V4S16 = LLT::fixed_vector(4, 16); in AMDGPULegalizerInfo()
449 const LLT V2S32 = LLT::fixed_vector(2, 32); in AMDGPULegalizerInfo()
450 const LLT V3S32 = LLT::fixed_vector(3, 32); in AMDGPULegalizerInfo()
451 const LLT V4S32 = LLT::fixed_vector(4, 32); in AMDGPULegalizerInfo()
452 const LLT V5S32 = LLT::fixed_vector(5, 32); in AMDGPULegalizerInfo()
453 const LLT V6S32 = LLT::fixed_vector(6, 32); in AMDGPULegalizerInfo()
454 const LLT V7S32 = LLT::fixed_vector(7, 32); in AMDGPULegalizerInfo()
455 const LLT V8S32 = LLT::fixed_vector(8, 32); in AMDGPULegalizerInfo()
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H A DAMDGPUGlobalISelUtils.cpp76 if (Ty == LLT::fixed_vector(2, 16) || Ty == LLT::scalar(64)) in hasAtomicFaddRtnForTy()
H A DAMDGPUArgumentUsageInfo.cpp96 &AMDGPU::SGPR_128RegClass, LLT::fixed_vector(4, 32)); in getPreloadedValue()
H A DAMDGPUPreLegalizerCombiner.cpp135 const LLT V2S16 = LLT::fixed_vector(2, 16); in applyClampI64ToI16()
H A DAMDGPURegisterBankInfo.cpp1046 return LLT::fixed_vector(128 / EltTy.getSizeInBits(), EltTy); in widen96To128()
1784 return B.buildMerge(LLT::fixed_vector(NumElts, S32), WideRegs).getReg(0); in handleD16VData()
2097 LLT MergeTy = LLT::fixed_vector(Ops.size(), EltTy); in foldInsertEltToCmpSelect()
2387 if (DstTy != LLT::scalar(16) && DstTy != LLT::fixed_vector(2, 16)) in applyMappingImpl()
2620 if (DstTy != LLT::fixed_vector(2, 16)) in applyMappingImpl()
2752 LLT Vec32 = LLT::fixed_vector(2 * SrcTy.getNumElements(), 32); in applyMappingImpl()
2869 LLT Vec32 = LLT::fixed_vector(2 * VecTy.getNumElements(), 32); in applyMappingImpl()
3896 if (DstTy == LLT::fixed_vector(2, 16)) { in getInstrMapping()
/llvm-project-15.0.7/llvm/include/llvm/Support/
H A DLowLevelTypeImpl.h74 static LLT fixed_vector(unsigned NumElements, unsigned ScalarSizeInBits) { in fixed_vector() function
80 static LLT fixed_vector(unsigned NumElements, LLT ScalarTy) { in fixed_vector() function
219 return fixed_vector(Factor, *this); in multiplyElements()
/llvm-project-15.0.7/llvm/lib/Target/Mips/
H A DMipsLegalizerInfo.cpp75 const LLT v16s8 = LLT::fixed_vector(16, 8); in MipsLegalizerInfo()
76 const LLT v8s16 = LLT::fixed_vector(8, 16); in MipsLegalizerInfo()
77 const LLT v4s32 = LLT::fixed_vector(4, 32); in MipsLegalizerInfo()
78 const LLT v2s64 = LLT::fixed_vector(2, 64); in MipsLegalizerInfo()
/llvm-project-15.0.7/llvm/lib/CodeGen/GlobalISel/
H A DLegalizeMutations.cpp104 TypeIdx, LLT::fixed_vector(NewNumElements, VecTy.getElementType())); in moreElementsToNextPow2()
H A DLegacyLegalizerInfo.cpp345 IntermediateType = LLT::fixed_vector(Aspect.Type.getNumElements(), in findVectorLegalAction()
359 LLT::fixed_vector(NumElementsAndAction.first, in findVectorLegalAction()
H A DUtils.cpp915 return LLT::fixed_vector(LCMSize / OrigElt.getSizeInBits(), OrigElt); in getLCMType()
920 return LLT::fixed_vector(LCMSize / OrigSize, OrigTy); in getLCMType()
979 return LLT::fixed_vector(GCD / OrigElt.getSizeInBits(), OrigElt); in getGCDType()
/llvm-project-15.0.7/llvm/include/llvm/CodeGen/GlobalISel/
H A DLegalizerInfo.h1089 TypeIdx, LLT::fixed_vector(MinElements, VecTy.getElementType())); in clampMinNumElements()
1108 TypeIdx, LLT::fixed_vector(NewSize, VecTy.getElementType())); in alignNumElementsTo()

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