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Revision tags: llvmorg-20.1.0, llvmorg-20.1.0-rc3, llvmorg-20.1.0-rc2, llvmorg-20.1.0-rc1, llvmorg-21-init, llvmorg-19.1.7, llvmorg-19.1.6, llvmorg-19.1.5, llvmorg-19.1.4, llvmorg-19.1.3, llvmorg-19.1.2, llvmorg-19.1.1, llvmorg-19.1.0, llvmorg-19.1.0-rc4, llvmorg-19.1.0-rc3, llvmorg-19.1.0-rc2, llvmorg-19.1.0-rc1, llvmorg-20-init, llvmorg-18.1.8, llvmorg-18.1.7, llvmorg-18.1.6, llvmorg-18.1.5, llvmorg-18.1.4, llvmorg-18.1.3, llvmorg-18.1.2, llvmorg-18.1.1, llvmorg-18.1.0, llvmorg-18.1.0-rc4, llvmorg-18.1.0-rc3, llvmorg-18.1.0-rc2, llvmorg-18.1.0-rc1, llvmorg-19-init, llvmorg-17.0.6, llvmorg-17.0.5, llvmorg-17.0.4, llvmorg-17.0.3, llvmorg-17.0.2, llvmorg-17.0.1, llvmorg-17.0.0, llvmorg-17.0.0-rc4, llvmorg-17.0.0-rc3, llvmorg-17.0.0-rc2, llvmorg-17.0.0-rc1, llvmorg-18-init, llvmorg-16.0.6, llvmorg-16.0.5, llvmorg-16.0.4, llvmorg-16.0.3, llvmorg-16.0.2, llvmorg-16.0.1, llvmorg-16.0.0, llvmorg-16.0.0-rc4, llvmorg-16.0.0-rc3, llvmorg-16.0.0-rc2, llvmorg-16.0.0-rc1, llvmorg-17-init, llvmorg-15.0.7, llvmorg-15.0.6, llvmorg-15.0.5, llvmorg-15.0.4, llvmorg-15.0.3, llvmorg-15.0.2, llvmorg-15.0.1, llvmorg-15.0.0, llvmorg-15.0.0-rc3, llvmorg-15.0.0-rc2, llvmorg-15.0.0-rc1, llvmorg-16-init, llvmorg-14.0.6, llvmorg-14.0.5, llvmorg-14.0.4, llvmorg-14.0.3, llvmorg-14.0.2 |
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3754f601 |
| 12-Apr-2022 |
Matt Arsenault <[email protected]> |
GlobalISel: Implement MoreElements for select of vector conditions
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95c2bcbf |
| 12-Apr-2022 |
Matt Arsenault <[email protected]> |
GlobalISel: Handle widening umulo/smulo condition outputs
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Revision tags: llvmorg-14.0.1, llvmorg-14.0.0, llvmorg-14.0.0-rc4, llvmorg-14.0.0-rc3, llvmorg-14.0.0-rc2, llvmorg-14.0.0-rc1, llvmorg-15-init, llvmorg-13.0.1, llvmorg-13.0.1-rc3, llvmorg-13.0.1-rc2 |
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| #
29f88b93 |
| 23-Dec-2021 |
Petar Avramovic <[email protected]> |
[GlobalISel] Rework more/fewer elements for vectors
Artifact combiner is not able to access individual elements after using LCMTy style merge/unmerge, extract and insert to change vector number of e
[GlobalISel] Rework more/fewer elements for vectors
Artifact combiner is not able to access individual elements after using LCMTy style merge/unmerge, extract and insert to change vector number of elements (pad with undef or split to sub-vector instructions). Use unmerge to individual elements instead and then merge elements into requested types. Change argument lowering for vectors and moreElementsVector to use buildPadVectorWithUndefElements and buildDeleteTrailingVectorElements. FewerElementsVector had a few helpers that had different behavior, introduce new helper for most of the opcodes. FewerElementsVector helper is more flexible since it can create leftover instruction smaller then requested type (useful in case target wants to avoid pad with undef and use fewer registers). If target does not want leftover of different type it should call more elements first. Some helpers were performing more elements first to have split without leftover. Opcodes that used this helper use clampMaxNumElementsStrict (does more elements first) in LegalizerInfo to avoid test changes. Fixes failures caused by failing to combine artifacts created during more/fewer elements vector.
Differential Revision: https://reviews.llvm.org/D114198
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Revision tags: llvmorg-13.0.1-rc1 |
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8bde5e58 |
| 27-Sep-2021 |
Amara Emerson <[email protected]> |
Delay outgoing register assignments to last.
The delayed stack protector feature which is currently used for SDAG (and thus allows for more commonly generating tail calls) depends on being able to e
Delay outgoing register assignments to last.
The delayed stack protector feature which is currently used for SDAG (and thus allows for more commonly generating tail calls) depends on being able to extract the tail call into a separate return block. To do this it also has to extract the vreg->physreg copies that set up the call's arguments, since if it doesn't then the call inst ends up using undefined physregs in it's new spliced block.
SelectionDAG implementations can do this because they delay emitting register copies until *after* the stack arguments are set up. GISel however just processes and emits the arguments in IR order, so stack arguments always end up last, and thus this breaks the code that looks for any register arg copies that precede the call instruction.
This patch adds a thunk argument to the assignValueToReg() and custom assignment hooks. For outgoing arguments, register assignments use this return param to return a thunk that does the actual generating of the copies. We collect these until all the outgoing stack assignments have been done and then execute them, so that the copies (and perhaps some artifacts like G_SEXTs) are placed after any stores.
Differential Revision: https://reviews.llvm.org/D110610
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Revision tags: llvmorg-13.0.0, llvmorg-13.0.0-rc4, llvmorg-13.0.0-rc3, llvmorg-13.0.0-rc2, llvmorg-13.0.0-rc1, llvmorg-14-init, llvmorg-12.0.1, llvmorg-12.0.1-rc4, llvmorg-12.0.1-rc3, llvmorg-12.0.1-rc2, llvmorg-12.0.1-rc1, llvmorg-12.0.0, llvmorg-12.0.0-rc5, llvmorg-12.0.0-rc4, llvmorg-12.0.0-rc3, llvmorg-12.0.0-rc2, llvmorg-11.1.0, llvmorg-11.1.0-rc3, llvmorg-12.0.0-rc1, llvmorg-13-init, llvmorg-11.1.0-rc2, llvmorg-11.1.0-rc1, llvmorg-11.0.1, llvmorg-11.0.1-rc2, llvmorg-11.0.1-rc1 |
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64bef13f |
| 08-Oct-2020 |
Konstantin Schwarz <[email protected]> |
[GlobalISel] Look through truncs and extends in narrowScalarShift
If a G_SHL is fed by a G_CONSTANT, the lower and upper bits of the source can be shifted individually by the constant shift amount.
[GlobalISel] Look through truncs and extends in narrowScalarShift
If a G_SHL is fed by a G_CONSTANT, the lower and upper bits of the source can be shifted individually by the constant shift amount.
However in case the shift amount came from a G_TRUNC(G_CONSTANT), the generic shift legalization code was used, producing intermediate shifts that are potentially illegal on some targets.
This change teaches narrowScalarShift to look through G_TRUNCs and G_*EXTs.
Reviewed By: paquette
Differential Revision: https://reviews.llvm.org/D89100
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57b9107e |
| 06-Aug-2021 |
Jay Foad <[email protected]> |
[GlobalISel] Improve widening of cttz/cttz_zero_undef
Differential Revision: https://reviews.llvm.org/D107631
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cd2594e1 |
| 04-Aug-2021 |
Jay Foad <[email protected]> |
[GlobalISel] Improve legalization of narrow CTTZ
Differential Revision: https://reviews.llvm.org/D107457
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97c42639 |
| 10-Jul-2021 |
Amara Emerson <[email protected]> |
[AArch64][GlobalISel] Implement moreElements legalization for G_SHUFFLE_VECTOR.
Differential Revision: https://reviews.llvm.org/D103301
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9b057f64 |
| 08-Jul-2021 |
Matt Arsenault <[email protected]> |
GlobalISel: Track original argument index in ArgInfo
SelectionDAG's equivalents in ISD::InputArg/OutputArg track the original argument index. Mips relies on this, and its currently reinventing its o
GlobalISel: Track original argument index in ArgInfo
SelectionDAG's equivalents in ISD::InputArg/OutputArg track the original argument index. Mips relies on this, and its currently reinventing its own parallel CallLowering infrastructure which tracks these indexes on the side. Add this to help move towards deleting the custom mips handling.
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fae05692 |
| 20-May-2021 |
Matt Arsenault <[email protected]> |
CodeGen: Print/parse LLTs in MachineMemOperands
This will currently accept the old number of bytes syntax, and convert it to a scalar. This should be removed in the near future (I think I converted
CodeGen: Print/parse LLTs in MachineMemOperands
This will currently accept the old number of bytes syntax, and convert it to a scalar. This should be removed in the near future (I think I converted all of the tests already, but likely missed a few).
Not sure what the exact syntax and policy should be. We can continue printing the number of bytes for non-generic instructions to avoid test churn and only allow non-scalar types for generic instructions.
This will currently print the LLT in parentheses, but accept parsing the existing integers and implicitly converting to scalar. The parentheses are a bit ugly, but the parser logic seems unable to deal without either parentheses or some keyword to indicate the start of a type.
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d5e14ba8 |
| 24-Jun-2021 |
Sander de Smalen <[email protected]> |
[GlobalISel] NFC: Change LLT::vector to take ElementCount.
This also adds new interfaces for the fixed- and scalable case: * LLT::fixed_vector * LLT::scalable_vector
The strategy for migrating to t
[GlobalISel] NFC: Change LLT::vector to take ElementCount.
This also adds new interfaces for the fixed- and scalable case: * LLT::fixed_vector * LLT::scalable_vector
The strategy for migrating to the new interfaces was as follows: * If the new LLT is a (modified) clone of another LLT, taking the same number of elements, then use LLT::vector(OtherTy.getElementCount()) or if the number of elements is halfed/doubled, it uses .divideCoefficientBy(2) or operator*. That is because there is no reason to specifically restrict the types to 'fixed_vector'. * If the algorithm works on the number of elements (as unsigned), then just use fixed_vector. This will need to be fixed up in the future when modifying the algorithm to also work for scalable vectors, and will need then need additional tests to confirm the behaviour works the same for scalable vectors. * If the test used the '/*Scalable=*/true` flag of LLT::vector, then this is replaced by LLT::scalable_vector.
Reviewed By: aemerson
Differential Revision: https://reviews.llvm.org/D104451
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31a9659d |
| 07-Jun-2021 |
Matt Arsenault <[email protected]> |
GlobalISel: Avoid use of G_INSERT in insertParts
G_INSERT legalization is incomplete and doesn't work very well. Instead try to use sequences of G_MERGE_VALUES/G_UNMERGE_VALUES padding with undef va
GlobalISel: Avoid use of G_INSERT in insertParts
G_INSERT legalization is incomplete and doesn't work very well. Instead try to use sequences of G_MERGE_VALUES/G_UNMERGE_VALUES padding with undef values (although this can get pretty large).
For the case of load/store narrowing, this is still performing the load/stores in irregularly sized pieces. It might be cleaner to split this down into equal sized pieces, and rely on load/store merging to optimize it.
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aaac2682 |
| 29-May-2021 |
Daniel Sanders <[email protected]> |
[globalisel][legalizer] Separate the deprecated LegalizerInfo from the current one
It's still in use in a few places so we can't delete it yet but there's not many at this point.
Differential Revis
[globalisel][legalizer] Separate the deprecated LegalizerInfo from the current one
It's still in use in a few places so we can't delete it yet but there's not many at this point.
Differential Revision: https://reviews.llvm.org/D103352
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08d31ff4 |
| 27-May-2021 |
Jessica Paquette <[email protected]> |
Fix unit test after 324af79dbc6066
Needed to add in an extra parameter to calls to `libcall`.
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42a84d22 |
| 01-Apr-2021 |
Daniel Sanders <[email protected]> |
Revert "[globalisel][unittests] Rename setUp() to avoid potential mix up with SetUp() from gtest"
Forgot to apply commit message changes from phabricator
This reverts commit 3a016e31ecef7eeb876b540
Revert "[globalisel][unittests] Rename setUp() to avoid potential mix up with SetUp() from gtest"
Forgot to apply commit message changes from phabricator
This reverts commit 3a016e31ecef7eeb876b540c928a25a7c5d2e07a.
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3a016e31 |
| 31-Mar-2021 |
Daniel Sanders <[email protected]> |
[globalisel][unittests] Rename setUp() to avoid potential mix up with SetUp() from gtest
Also, make it structurally required so it can't be forgotten and re-introduce the bug that led to the rotten
[globalisel][unittests] Rename setUp() to avoid potential mix up with SetUp() from gtest
Also, make it structurally required so it can't be forgotten and re-introduce the bug that led to the rotten green tests.
Differential Revision: https://reviews.llvm.org/D99692
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f5e9be6f |
| 26-Mar-2021 |
Amara Emerson <[email protected]> |
[GlobalISel] Implement lowering for G_ROTR and G_ROTL.
This is a straightforward port.
Differential Revision: https://reviews.llvm.org/D99449
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4c6ab48f |
| 10-Mar-2021 |
Christudasan Devadasan <[email protected]> |
GlobalISel: Try to combine G_[SU]DIV and G_[SU]REM
It is good to have a combined `divrem` instruction when the `div` and `rem` are computed from identical input operands. Some targets can lower them
GlobalISel: Try to combine G_[SU]DIV and G_[SU]REM
It is good to have a combined `divrem` instruction when the `div` and `rem` are computed from identical input operands. Some targets can lower them through a single expansion that computes both division and remainder. It effectively reduces the number of instructions than individually expanding them.
Reviewed By: arsenm, paquette
Differential Revision: https://reviews.llvm.org/D96013
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fd82cbcf |
| 09-Feb-2021 |
Matt Arsenault <[email protected]> |
GlobalISel: Merge and cleanup more AMDGPU call lowering code
This merges more AMDGPU ABI lowering code into the generic call lowering. Start cleaning up by factoring away more of the pack/unpack log
GlobalISel: Merge and cleanup more AMDGPU call lowering code
This merges more AMDGPU ABI lowering code into the generic call lowering. Start cleaning up by factoring away more of the pack/unpack logic into the buildCopy{To|From}Parts functions. These could use more improvement, and the SelectionDAG versions are significantly more complex, and we'll eventually have to emulate all of those cases too.
This is mostly NFC, but does result in some minor instruction reordering. It also removes some of the limitations with mismatched sizes the old code had. However, similarly to the merge on the input, this is forcing gfx6/gfx7 to use the gfx8+ ABI (which is what we actually want, but SelectionDAG is stuck using the weird emergent ABI).
This also changes the load/store size for stack passed EVTs for AArch64, which makes it consistent with the DAG behavior.
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8f956a5e |
| 22-Feb-2021 |
Cassie Jones <[email protected]> |
[GlobalISel] Implement narrowScalar for SADDE/SSUBE/UADDE/USUBE
Reviewed By: arsenm
Differential Revision: https://reviews.llvm.org/D96673
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e1532649 |
| 22-Feb-2021 |
Cassie Jones <[email protected]> |
[GlobalISel] Implement narrowScalar for SADDO/SSUBO
Reviewed By: arsenm
Differential Revision: https://reviews.llvm.org/D96672
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c63b33b7 |
| 22-Feb-2021 |
Cassie Jones <[email protected]> |
[GlobalISel] Implement narrowScalar for UADDO/USUBO
Reviewed By: arsenm
Differential Revision: https://reviews.llvm.org/D96671
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98754e29 |
| 12-Feb-2021 |
Paul Robinson <[email protected]> |
[RGT][GlobalIsel] Add missing setUp() calls to legalizer unittests
Some of these accidentally disabled tests failed as a result; updated tests per @qcolombet instructions. A small number needed addi
[RGT][GlobalIsel] Add missing setUp() calls to legalizer unittests
Some of these accidentally disabled tests failed as a result; updated tests per @qcolombet instructions. A small number needed additional updates because legalization has actually changed since they were written.
Found by the Rotten Green Tests project.
Differential Revision: https://reviews.llvm.org/D95257
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f22f4557 |
| 28-Jan-2021 |
Cassie Jones <[email protected]> |
[GlobalISel] Implement widenScalar for carry-in add/sub
These are widened to a wider UADDE/USUBE, with the overflow value unused, and with the same synthesis of a new overflow value as for the O ope
[GlobalISel] Implement widenScalar for carry-in add/sub
These are widened to a wider UADDE/USUBE, with the overflow value unused, and with the same synthesis of a new overflow value as for the O operations.
Reviewed By: paquette
Differential Revision: https://reviews.llvm.org/D95326
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c9466ede |
| 22-Jan-2021 |
Mitch Phillips <[email protected]> |
Revert "Revert "[GlobalISel] LegalizerHelper - Extract widenScalarAddoSubo method""
This reverts commit 554b3211fefd09b56b64357b9edd66c78ae200b5.
Differential Revision: https://reviews.llvm.org/D95
Revert "Revert "[GlobalISel] LegalizerHelper - Extract widenScalarAddoSubo method""
This reverts commit 554b3211fefd09b56b64357b9edd66c78ae200b5.
Differential Revision: https://reviews.llvm.org/D95035
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