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/llvm-project-15.0.7/llvm/test/CodeGen/VE/Scalar/
H A Dshr.ll8 ;;; <result> = lshr <ty> <op1>, <op2> ; yields ty:result
9 ;;; <result> = lshr exact <ty> <op1>, <op2> ; yields ty:result
31 ;;; <result> = lshr i32 4, 1 ; yields i32:result = 2
32 ;;; <result> = lshr i32 4, 2 ; yields i32:result = 1
33 ;;; <result> = lshr i8 4, 3 ; yields i8:result = 0
34 ;;; <result> = lshr i8 -2, 1 ; yields i8:result = 0x7F
42 ;;; <result> = ashr <ty> <op1>, <op2> ; yields ty:result
65 ;;; <result> = ashr i32 4, 1 ; yields i32:result = 2
66 ;;; <result> = ashr i32 4, 2 ; yields i32:result = 1
67 ;;; <result> = ashr i8 4, 3 ; yields i8:result = 0
[all …]
H A Dshl.ll6 ;;; <result> = shl <ty> <op1>, <op2> ; yields ty:result
7 ;;; <result> = shl nuw <ty> <op1>, <op2> ; yields ty:result
8 ;;; <result> = shl nsw <ty> <op1>, <op2> ; yields ty:result
9 ;;; <result> = shl nuw nsw <ty> <op1>, <op2> ; yields ty:result
32 ;;; <result> = shl i32 4, %var ; yields i32: 4 << %var
33 ;;; <result> = shl i32 4, 2 ; yields i32: 16
34 ;;; <result> = shl i32 1, 10 ; yields i32: 1024
37 ;;; ; yields: result=<2 x i32> < i32 2, i32 4>
H A Dfp_fneg.ll6 ;;; <result> = fneg [fast-math flags]* <ty> <op1> ; yields ty:result
23 ;;; <result> = fneg float %val ; yields float:result = -%var
H A Dfp_frem.ll6 ;;; <result> = frem [fast-math flags]* <ty> <op1>, <op2> ; yields ty:result
27 ;;; <result> = frem float 4.0, %var ; yields float:result = 4.0 % %var
H A Dselect.ll7 ;;; ; yields ty
36 ;;; %X = select i1 true, i8 17, i8 42 ; yields i8:17
/llvm-project-15.0.7/lld/test/MachO/
H A Dexport-options.s8 ## Check that mixing exported and unexported symbol options yields an error
33 ## Check that an exported literal name with no symbol definition yields an error
/llvm-project-15.0.7/llvm/test/CodeGen/M68k/Arith/
H A Dmul64.ll5 ; yields saner expansion for i64 mul
/llvm-project-15.0.7/mlir/test/Transforms/
H A Dscf-replace-with-new-yields.mlir2 // RUN: mlir-opt -allow-unregistered-dialect -test-scf-for-utils=test-replace-with-new-yields -mlir…
/llvm-project-15.0.7/llvm/test/Assembler/
H A D2002-08-16-ConstExprInlined.ll2 ; ConstExpr reference. Disassembling this program assembled yields invalid
/llvm-project-15.0.7/mlir/include/mlir/Dialect/SPIRV/IR/
H A DSPIRVMiscOps.td65 Each consumption of Result <id> yields an arbitrary, possibly different
/llvm-project-15.0.7/mlir/include/mlir/Interfaces/
H A DParallelCombiningOpInterface.td21 above and yields values to its parent op without itself returning an SSA
/llvm-project-15.0.7/llvm/docs/
H A DLangRef.rst121 %0 = add i32 %X, %X ; yields i32:%0
122 %1 = add i32 %0, %0 ; yields i32:%1
9349 <result> = shl i32 4, 2 ; yields i32: 16
9350 <result> = shl i32 1, 10 ; yields i32: 1024
9399 <result> = lshr i32 4, 1 ; yields i32:result = 2
9400 <result> = lshr i32 4, 2 ; yields i32:result = 1
9401 <result> = lshr i8 4, 3 ; yields i8:result = 0
9451 <result> = ashr i32 4, 1 ; yields i32:result = 2
9453 <result> = ashr i8 4, 3 ; yields i8:result = 0
11567 <result> = freeze ty <val> ; yields ty:result
[all …]
/llvm-project-15.0.7/clang-tools-extra/docs/clang-tidy/checks/cppcoreguidelines/
H A Downing-memory.rst141 // Calling the function with an owner still yields a false positive.
154 // Code, that yields a false positive.
/llvm-project-15.0.7/llvm/test/CodeGen/X86/
H A Dforce-align-stack-alloca.ll44 ; allocating 28 bytes for calling f yields a 4-byte adjustment:
/llvm-project-15.0.7/mlir/cmake/modules/
H A DMLIRDetectPythonEnv.cmake44 # installed via pip, which typically yields a much more recent version than
/llvm-project-15.0.7/mlir/test/mlir-linalg-ods-gen/
H A Dtest-linalg-ods-yaml-gen.yaml191 # IMPL: yields.push_back(block.getArgument(0));
323 # IMPL-NEXT: yields.push_back([[VAL1]])
/llvm-project-15.0.7/mlir/include/mlir/Dialect/MLProgram/IR/
H A DMLProgramOps.td37 yields values with the same arity and types as the `FunctionType` results
386 terminated by an `output` op which yields values with the same arity and
/llvm-project-15.0.7/polly/test/ScopInfo/
H A Drun-time-check-many-parameters.ll41 ; Expressing the minimal element itself yields a rather complex isl_pw_aff which
/llvm-project-15.0.7/clang-tools-extra/docs/clang-tidy/checks/bugprone/
H A Dsizeof-expression.rst8 The ``sizeof`` operator yields the size (in bytes) of its operand, which may be
/llvm-project-15.0.7/mlir/lib/Dialect/SparseTensor/Transforms/
H A DSparsification.cpp1417 SmallVector<Value, 4> yields; in genWhileInduction() local
1419 yields.push_back(codegen.redVal); in genWhileInduction()
1423 yields.push_back(codegen.expCount); in genWhileInduction()
1426 assert(y == yields.size()); in genWhileInduction()
1427 builder.create<scf::YieldOp>(loc, yields); in genWhileInduction()
/llvm-project-15.0.7/llvm/lib/Target/PowerPC/
H A DREADME_P9.txt403 ; yields <n x <ty>>
419 ; yields <ty>
/llvm-project-15.0.7/mlir/include/mlir/Dialect/X86Vector/
H A DX86Vector.td322 to one element of the higher part in the destination vector yields the full
/llvm-project-15.0.7/mlir/include/mlir/Dialect/Bufferization/IR/
H A DBufferizationOps.td36 result of an `alloc_tensor` op yields an undefined value.
/llvm-project-15.0.7/llvm/lib/Target/AMDGPU/
H A DAMDGPUInstrInfo.td282 // mulhi24 yields the high-order 16 bits of the 48-bit result. Here's an example
/llvm-project-15.0.7/mlir/docs/
H A DBufferDeallocationInternals.md230 Applying the BufferDeallocation pass to the program above yields the following
299 Applying BufferDeallocation yields the following output:

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