Lines Matching refs:yields
121 %0 = add i32 %X, %X ; yields i32:%0
122 %1 = add i32 %0, %0 ; yields i32:%1
8674 <result> = fneg [fast-math flags]* <ty> <op1> ; yields ty:result
8701 <result> = fneg float %val ; yields float:result = -%var
8726 <result> = add <ty> <op1>, <op2> ; yields ty:result
8727 <result> = add nuw <ty> <op1>, <op2> ; yields ty:result
8728 <result> = add nsw <ty> <op1>, <op2> ; yields ty:result
8729 <result> = add nuw nsw <ty> <op1>, <op2> ; yields ty:result
8765 <result> = add i32 4, %var ; yields i32:result = 4 + %var
8777 <result> = fadd [fast-math flags]* <ty> <op1>, <op2> ; yields ty:result
8806 <result> = fadd float 4.0, %var ; yields float:result = 4.0 + %var
8818 <result> = sub <ty> <op1>, <op2> ; yields ty:result
8819 <result> = sub nuw <ty> <op1>, <op2> ; yields ty:result
8820 <result> = sub nsw <ty> <op1>, <op2> ; yields ty:result
8821 <result> = sub nuw nsw <ty> <op1>, <op2> ; yields ty:result
8860 <result> = sub i32 4, %var ; yields i32:result = 4 - %var
8861 <result> = sub i32 0, %val ; yields i32:result = -%var
8873 <result> = fsub [fast-math flags]* <ty> <op1>, <op2> ; yields ty:result
8902 <result> = fsub float 4.0, %var ; yields float:result = 4.0 - %var
8903 <result> = fsub float -0.0, %val ; yields float:result = -%var
8915 <result> = mul <ty> <op1>, <op2> ; yields ty:result
8916 <result> = mul nuw <ty> <op1>, <op2> ; yields ty:result
8917 <result> = mul nsw <ty> <op1>, <op2> ; yields ty:result
8918 <result> = mul nuw nsw <ty> <op1>, <op2> ; yields ty:result
8958 <result> = mul i32 4, %var ; yields i32:result = 4 * %var
8970 <result> = fmul [fast-math flags]* <ty> <op1>, <op2> ; yields ty:result
8999 <result> = fmul float 4.0, %var ; yields float:result = 4.0 * %var
9011 <result> = udiv <ty> <op1>, <op2> ; yields ty:result
9012 <result> = udiv exact <ty> <op1>, <op2> ; yields ty:result
9047 <result> = udiv i32 4, %var ; yields i32:result = 4 / %var
9059 <result> = sdiv <ty> <op1>, <op2> ; yields ty:result
9060 <result> = sdiv exact <ty> <op1>, <op2> ; yields ty:result
9096 <result> = sdiv i32 4, %var ; yields i32:result = 4 / %var
9108 <result> = fdiv [fast-math flags]* <ty> <op1>, <op2> ; yields ty:result
9137 <result> = fdiv float 4.0, %var ; yields float:result = 4.0 / %var
9149 <result> = urem <ty> <op1>, <op2> ; yields ty:result
9183 <result> = urem i32 4, %var ; yields i32:result = 4 % %var
9195 <result> = srem <ty> <op1>, <op2> ; yields ty:result
9242 <result> = srem i32 4, %var ; yields i32:result = 4 % %var
9254 <result> = frem [fast-math flags]* <ty> <op1>, <op2> ; yields ty:result
9287 <result> = frem float 4.0, %var ; yields float:result = 4.0 % %var
9310 <result> = shl <ty> <op1>, <op2> ; yields ty:result
9311 <result> = shl nuw <ty> <op1>, <op2> ; yields ty:result
9312 <result> = shl nsw <ty> <op1>, <op2> ; yields ty:result
9313 <result> = shl nuw nsw <ty> <op1>, <op2> ; yields ty:result
9348 <result> = shl i32 4, %var ; yields i32: 4 << %var
9349 <result> = shl i32 4, 2 ; yields i32: 16
9350 <result> = shl i32 1, 10 ; yields i32: 1024
9352 …<result> = shl <2 x i32> < i32 1, i32 1>, < i32 1, i32 2> ; yields: result=<2 x i32> < i32 2, i3…
9365 <result> = lshr <ty> <op1>, <op2> ; yields ty:result
9366 <result> = lshr exact <ty> <op1>, <op2> ; yields ty:result
9399 <result> = lshr i32 4, 1 ; yields i32:result = 2
9400 <result> = lshr i32 4, 2 ; yields i32:result = 1
9401 <result> = lshr i8 4, 3 ; yields i8:result = 0
9402 <result> = lshr i8 -2, 1 ; yields i8:result = 0x7F
9404 …<result> = lshr <2 x i32> < i32 -2, i32 4>, < i32 1, i32 2> ; yields: result=<2 x i32> < i32 0x7…
9416 <result> = ashr <ty> <op1>, <op2> ; yields ty:result
9417 <result> = ashr exact <ty> <op1>, <op2> ; yields ty:result
9451 <result> = ashr i32 4, 1 ; yields i32:result = 2
9452 <result> = ashr i32 4, 2 ; yields i32:result = 1
9453 <result> = ashr i8 4, 3 ; yields i8:result = 0
9454 <result> = ashr i8 -2, 1 ; yields i8:result = -1
9456 …<result> = ashr <2 x i32> < i32 -2, i32 4>, < i32 1, i32 3> ; yields: result=<2 x i32> < i32 -1,…
9468 <result> = and <ty> <op1>, <op2> ; yields ty:result
9505 <result> = and i32 4, %var ; yields i32:result = 4 & %var
9506 <result> = and i32 15, 40 ; yields i32:result = 8
9507 <result> = and i32 4, 8 ; yields i32:result = 0
9519 <result> = or <ty> <op1>, <op2> ; yields ty:result
9556 <result> = or i32 4, %var ; yields i32:result = 4 | %var
9557 <result> = or i32 15, 40 ; yields i32:result = 47
9558 <result> = or i32 4, 8 ; yields i32:result = 12
9570 <result> = xor <ty> <op1>, <op2> ; yields ty:result
9608 <result> = xor i32 4, %var ; yields i32:result = 4 ^ %var
9609 <result> = xor i32 15, 40 ; yields i32:result = 39
9610 <result> = xor i32 4, 8 ; yields i32:result = 12
9611 <result> = xor i32 %V, -1 ; yields i32:result = ~%V
9633 <result> = extractelement <n x <ty>> <val>, <ty2> <idx> ; yields <ty>
9634 <result> = extractelement <vscale x n x <ty>> <val>, <ty2> <idx> ; yields <ty>
9665 <result> = extractelement <4 x i32> %vec, i32 0 ; yields i32
9677 <result> = insertelement <n x <ty>> <val>, <ty> <elt>, <ty2> <idx> ; yields <n x <ty>>
9678 …<result> = insertelement <vscale x n x <ty>> <val>, <ty> <elt>, <ty2> <idx> ; yields <vscale x n x…
9710 <result> = insertelement <4 x i32> %vec, i32 1, i32 0 ; yields <4 x i32>
9722 … <result> = shufflevector <n x <ty>> <v1>, <n x <ty>> <v2>, <m x i32> <mask> ; yields <m x <ty>>
9723 …e x n x <ty>> <v1>, <vscale x n x <ty>> v2, <vscale x m x i32> <mask> ; yields <vscale x m x <ty>>
9768 <4 x i32> <i32 0, i32 4, i32 1, i32 5> ; yields <4 x i32>
9770 … <4 x i32> <i32 0, i32 1, i32 2, i32 3> ; yields <4 x i32> - Identity shuffle.
9772 <4 x i32> <i32 0, i32 1, i32 2, i32 3> ; yields <4 x i32>
9774 … <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7 > ; yields <8 x i32>
9826 <result> = extractvalue {i32, float} %agg, 0 ; yields i32
9838 …<result> = insertvalue <aggregate type> <val>, <ty> <elt>, <idx>{, <idx>}* ; yields <aggregate …
9869 %agg1 = insertvalue {i32, float} undef, i32 1, 0 ; yields {i32 1, float undef}
9870 %agg2 = insertvalue {i32, float} %agg1, float %val, 1 ; yields {i32 1, float %val}
9871 … %agg3 = insertvalue {i32, {float}} undef, float %val, 1, 0 ; yields {i32 undef, {float %val}}
9893 … [, <ty> <NumElements>] [, align <alignment>] [, addrspace(<num>)] ; yields type addrspace(num…
9948 %ptr = alloca i32 ; yields ptr
9949 %ptr = alloca i32, i32 4 ; yields ptr
9950 %ptr = alloca i32, i32 4, align 1024 ; yields ptr
9951 %ptr = alloca i32, align 1024 ; yields ptr
10084 %ptr = alloca i32 ; yields ptr
10085 store i32 3, ptr %ptr ; yields void
10086 %val = load i32, ptr %ptr ; yields i32:val = i32 3
10098 …<alignment>][, !nontemporal !<nontemp_node>][, !invariant.group !<empty_node>] ; yields void
10099 …e("<target-scope>")] <ordering>, align <alignment> [, !invariant.group !<empty_node>] ; yields void
10178 %ptr = alloca i32 ; yields ptr
10179 store i32 3, ptr %ptr ; yields void
10180 %val = load i32, ptr %ptr ; yields i32:val = i32 3
10192 fence [syncscope("<target-scope>")] <ordering> ; yields void
10234 fence acquire ; yields void
10235 fence syncscope("singlethread") seq_cst ; yields void
10236 fence syncscope("agent") seq_cst ; yields void
10248 …("<target-scope>")] <success ordering> <failure ordering>[, align <alignment>] ; yields { ty, i1 }
10314 %orig = load atomic i32, ptr %ptr unordered, align 4 ; yields i32
10320 … %val_success = cmpxchg ptr %ptr, i32 %cmp, i32 %squared acq_rel monotonic ; yields { i32, i1 }
10338 … <pointer>, <ty> <value> [syncscope("<target-scope>")] <ordering>[, align <alignment>] ; yields ty
10417 %old = atomicrmw add ptr %ptr, i32 1 acquire ; yields i32
10661 <result> = trunc <ty> <value> to <ty2> ; yields ty2
10690 %X = trunc i32 257 to i8 ; yields i8:1
10691 %Y = trunc i32 123 to i1 ; yields i1:true
10692 %Z = trunc i32 122 to i1 ; yields i1:false
10693 %W = trunc <2 x i16> <i16 8, i16 7> to <2 x i8> ; yields <i8 8, i8 7>
10705 <result> = zext <ty> <value> to <ty2> ; yields ty2
10733 %X = zext i32 257 to i64 ; yields i64:257
10734 %Y = zext i1 true to i32 ; yields i32:1
10735 %Z = zext <2 x i16> <i16 8, i16 7> to <2 x i32> ; yields <i32 8, i32 7>
10747 <result> = sext <ty> <value> to <ty2> ; yields ty2
10776 %X = sext i8 -1 to i16 ; yields i16 :65535
10777 %Y = sext i1 true to i32 ; yields i32:-1
10778 %Z = sext <2 x i16> <i16 8, i16 7> to <2 x i32> ; yields <i32 8, i32 7>
10788 <result> = fptrunc <ty> <value> to <ty2> ; yields ty2
10817 %X = fptrunc double 16777217.0 to float ; yields float:16777216.0
10818 %Y = fptrunc double 1.0E+300 to half ; yields half:+infinity
10828 <result> = fpext <ty> <value> to <ty2> ; yields ty2
10857 %X = fpext float 3.125 to double ; yields double:3.125000e+00
10858 %Y = fpext double %X to fp128 ; yields fp128:0xL00000000000000004000900000000000
10868 <result> = fptoui <ty> <value> to <ty2> ; yields ty2
10898 %X = fptoui double 123.0 to i32 ; yields i32:123
10899 %Y = fptoui float 1.0E+300 to i1 ; yields undefined:1
10900 %Z = fptoui float 1.04E+17 to i8 ; yields undefined:1
10910 <result> = fptosi <ty> <value> to <ty2> ; yields ty2
10940 %X = fptosi double -123.0 to i32 ; yields i32:-123
10941 %Y = fptosi float 1.0E-247 to i1 ; yields undefined:1
10942 %Z = fptosi float 1.04E+17 to i8 ; yields undefined:1
10952 <result> = uitofp <ty> <value> to <ty2> ; yields ty2
10983 %X = uitofp i32 257 to float ; yields float:257.0
10984 %Y = uitofp i8 -1 to double ; yields double:255.0
10994 <result> = sitofp <ty> <value> to <ty2> ; yields ty2
11024 %X = sitofp i32 257 to float ; yields float:257.0
11025 %Y = sitofp i8 -1 to double ; yields double:-1.0
11037 <result> = ptrtoint <ty> <value> to <ty2> ; yields ty2
11069 %X = ptrtoint ptr %P to i8 ; yields truncation on 32-bit architecture
11070 … %Y = ptrtoint ptr %P to i64 ; yields zero extension on 32-bit architecture
11071 …%Z = ptrtoint <4 x ptr> %P to <4 x i64>; yields vector zero extension for a vector of addresses on…
11083 …eable !<deref_bytes_node>][, !dereferenceable_or_null !<deref_bytes_node>] ; yields ty2
11123 %X = inttoptr i32 255 to ptr ; yields zero extension on 64-bit architecture
11124 %Y = inttoptr i32 255 to ptr ; yields no-op on 32-bit architecture
11125 %Z = inttoptr i64 0 to ptr ; yields truncation on 32-bit architecture
11126 %Z = inttoptr <4 x i32> %G to <4 x ptr>; yields truncation of vector G to four pointers
11138 <result> = bitcast <ty> <value> to <ty2> ; yields ty2
11180 %X = bitcast i8 255 to i8 ; yields i8 :-1
11181 %Y = bitcast i32* %x to i16* ; yields i16*:%x
11182 %Z = bitcast <2 x i32> %V to i64; ; yields i64: %V (depends on endianess)
11183 %Z = bitcast <2 x i32*> %V to <2 x i64*> ; yields <2 x i64*>
11195 <result> = addrspacecast <pty> <ptrval> to <pty2> ; yields pty2
11248 <result> = icmp <cond> <ty> <op1>, <op2> ; yields i1 or <N x i1>:result
11285 code given as ``cond``. The comparison performed always yields either an
11290 #. ``eq``: yields ``true`` if the operands are equal, ``false``
11292 #. ``ne``: yields ``true`` if the operands are unequal, ``false``
11294 #. ``ugt``: interprets the operands as unsigned values and yields
11296 #. ``uge``: interprets the operands as unsigned values and yields
11298 #. ``ult``: interprets the operands as unsigned values and yields
11300 #. ``ule``: interprets the operands as unsigned values and yields
11302 #. ``sgt``: interprets the operands as signed values and yields ``true``
11304 #. ``sge``: interprets the operands as signed values and yields ``true``
11306 #. ``slt``: interprets the operands as signed values and yields ``true``
11308 #. ``sle``: interprets the operands as signed values and yields ``true``
11323 <result> = icmp eq i32 4, 5 ; yields: result=false
11324 <result> = icmp ne ptr %X, %X ; yields: result=false
11325 <result> = icmp ult i16 4, 5 ; yields: result=true
11326 <result> = icmp sgt i16 4, 5 ; yields: result=false
11327 <result> = icmp ule i16 -4, 5 ; yields: result=false
11328 <result> = icmp sge i16 4, 5 ; yields: result=false
11340 <result> = fcmp [fast-math flags]* <cond> <ty> <op1>, <op2> ; yields i1 or <N x i1>:result
11392 always yields an :ref:`i1 <t_integer>` result, as follows:
11394 #. ``false``: always yields ``false``, regardless of operands.
11395 #. ``oeq``: yields ``true`` if both operands are not a QNAN and ``op1``
11397 #. ``ogt``: yields ``true`` if both operands are not a QNAN and ``op1``
11399 #. ``oge``: yields ``true`` if both operands are not a QNAN and ``op1``
11401 #. ``olt``: yields ``true`` if both operands are not a QNAN and ``op1``
11403 #. ``ole``: yields ``true`` if both operands are not a QNAN and ``op1``
11405 #. ``one``: yields ``true`` if both operands are not a QNAN and ``op1``
11407 #. ``ord``: yields ``true`` if both operands are not a QNAN.
11408 #. ``ueq``: yields ``true`` if either operand is a QNAN or ``op1`` is
11410 #. ``ugt``: yields ``true`` if either operand is a QNAN or ``op1`` is
11412 #. ``uge``: yields ``true`` if either operand is a QNAN or ``op1`` is
11414 #. ``ult``: yields ``true`` if either operand is a QNAN or ``op1`` is
11416 #. ``ule``: yields ``true`` if either operand is a QNAN or ``op1`` is
11418 #. ``une``: yields ``true`` if either operand is a QNAN or ``op1`` is
11420 #. ``uno``: yields ``true`` if either operand is a QNAN.
11421 #. ``true``: always yields ``true``, regardless of operands.
11437 <result> = fcmp oeq float 4.0, 5.0 ; yields: result=false
11438 <result> = fcmp one float 4.0, 5.0 ; yields: result=true
11439 <result> = fcmp olt float 4.0, 5.0 ; yields: result=true
11440 <result> = fcmp ueq double 1.0, 2.0 ; yields: result=false
11513 … <result> = select [fast-math flags] selty <cond>, <ty> <val1>, <ty> <val2> ; yields ty
11554 %X = select i1 true, i8 17, i8 42 ; yields i8:17
11567 <result> = freeze ty <val> ; yields ty:result
11760 call i32 (ptr, ...) @printf(ptr %msg, i32 12, i8 42) ; yields i32
11761 %X = tail call i32 @foo() ; yields i32
11762 %Y = tail call fastcc i32 @foo() ; yields i32
11766 %r = call %struct.A @foo() ; yields { i32, i8 }
11767 %gr = extractvalue %struct.A %r, 0 ; yields i32
11768 %gr1 = extractvalue %struct.A %r, 1 ; yields i8
16683 … %r2 = call float @llvm.fmuladd.f32(float %a, float %b, float %c) ; yields float:r2 = (a * b) + c
17816 %a = call i8 @llvm.fptoui.sat.i8.f32(float 123.9) ; yields i8: 123
17817 %b = call i8 @llvm.fptoui.sat.i8.f32(float -5.7) ; yields i8: 0
17818 %c = call i8 @llvm.fptoui.sat.i8.f32(float 377.0) ; yields i8: 255
17819 %d = call i8 @llvm.fptoui.sat.i8.f32(float 0xFFF8000000000000) ; yields i8: 0
17869 %a = call i8 @llvm.fptosi.sat.i8.f32(float 23.9) ; yields i8: 23
17870 %b = call i8 @llvm.fptosi.sat.i8.f32(float -130.8) ; yields i8: -128
17871 %c = call i8 @llvm.fptosi.sat.i8.f32(float 999.0) ; yields i8: 127
17872 %d = call i8 @llvm.fptosi.sat.i8.f32(float 0xFFF8000000000000) ; yields i8: 0
22273 always yields an :ref:`i1 <t_integer>` result, as follows:
22277 - "``oeq``": yields ``true`` if both operands are not a NAN and ``op1``
22279 - "``ogt``": yields ``true`` if both operands are not a NAN and ``op1``
22281 - "``oge``": yields ``true`` if both operands are not a NAN and ``op1``
22283 - "``olt``": yields ``true`` if both operands are not a NAN and ``op1``
22285 - "``ole``": yields ``true`` if both operands are not a NAN and ``op1``
22287 - "``one``": yields ``true`` if both operands are not a NAN and ``op1``
22289 - "``ord``": yields ``true`` if both operands are not a NAN.
22290 - "``ueq``": yields ``true`` if either operand is a NAN or ``op1`` is
22292 - "``ugt``": yields ``true`` if either operand is a NAN or ``op1`` is
22294 - "``uge``": yields ``true`` if either operand is a NAN or ``op1`` is
22296 - "``ult``": yields ``true`` if either operand is a NAN or ``op1`` is
22298 - "``ule``": yields ``true`` if either operand is a NAN or ``op1`` is
22300 - "``une``": yields ``true`` if either operand is a NAN or ``op1`` is
22302 - "``uno``": yields ``true`` if either operand is a NAN.
23517 element. Each check yields an :ref:`i1 <t_integer>` result, which is ``true``,