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Searched refs:isTypeLegal (Results 1 – 25 of 50) sorted by relevance

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/llvm-project-15.0.7/llvm/lib/CodeGen/SelectionDAG/
H A DResourcePriorityQueue.cpp94 if (TLI->isTypeLegal(VT) in numberRCValPredInSU()
132 if (TLI->isTypeLegal(VT) in numberRCValSuccInSU()
327 if (TLI->isTypeLegal(VT) in rawRegPressureDelta()
339 if (TLI->isTypeLegal(VT) && TLI->getRegClassFor(VT) in rawRegPressureDelta()
476 if (TLI->isTypeLegal(VT)) { in scheduledNode()
487 if (TLI->isTypeLegal(VT)) { in scheduledNode()
H A DLegalizeTypesGeneric.cpp110 while (!isTypeLegal(NVT)) { in ExpandRes_BITCAST()
120 if (isTypeLegal(NVT)) { in ExpandRes_BITCAST()
352 if (!isTypeLegal(NVT)) { in ExpandOp_BITCAST()
534 isTypeLegal(CondLHSVT) && in SplitRes_Select()
H A DFastISel.cpp248 if (!TLI.isTypeLegal(VT)) { in getRegForValue()
459 if (!TLI.isTypeLegal(VT)) { in selectBinaryOp()
1387 if (!TLI.isTypeLegal(DstVT)) in selectCast()
1391 if (!TLI.isTypeLegal(SrcVT)) in selectCast()
1412 !TLI.isTypeLegal(SrcEVT) || !TLI.isTypeLegal(DstEVT)) in selectBitCast()
1444 if (ETy == MVT::Other || !TLI.isTypeLegal(ETy)) in selectFreeze()
1619 if (!TLI.isTypeLegal(IntVT)) in selectFNeg()
1653 if (!TLI.isTypeLegal(VT) && VT != MVT::i1) in selectExtractValue()
2161 if (VT == MVT::Other || !TLI.isTypeLegal(VT)) { in handlePHINodesInSuccessorBlocks()
H A DLegalizeTypes.cpp139 } else if (isTypeLegal(Res.getValueType()) || IgnoreNodeResults(&Node)) { in PerformExpensiveChecks()
460 if (!isTypeLegal(Node.getValueType(i))) { in run()
469 !isTypeLegal(Node.getOperand(i).getValueType())) { in run()
H A DLegalizeVectorTypes.cpp2208 if (TLI.isTypeLegal(SrcVT) && !TLI.isTypeLegal(SplitSrcVT) && in SplitVecRes_ExtendOp()
2209 TLI.isTypeLegal(NewSrcVT) && TLI.isTypeLegal(SplitLoVT)) { in SplitVecRes_ExtendOp()
3449 if (isTypeLegal(LoOutVT) || in SplitVecOp_TruncateHelper()
4316 if (TLI.isTypeLegal(InWidenVT)) { in WidenVecRes_Convert()
4603 if (TLI.isTypeLegal(NewInVT)) { in WidenVecRes_BITCAST()
4868 TLI.isTypeLegal(WideMaskVT)) { in WidenVecRes_LOAD()
5551 if (TLI.isTypeLegal(FixedVT) && in WidenVecOp_EXTEND()
5700 if (TLI.isTypeLegal(WideDstVT)) { in WidenVecOp_FP_TO_XINT_SAT()
5726 if (TLI.isTypeLegal(NewVT)) { in WidenVecOp_BITCAST()
5745 if (TLI.isTypeLegal(NewVT)) { in WidenVecOp_BITCAST()
[all …]
H A DDAGCombiner.cpp5304 if (!TLI.isTypeLegal(XVT)) in hoistLogicOpWithSameOpcodeHands()
5995 if (!TLI.isTypeLegal(VT)) in combineShiftAnd1ToBitTest()
16607 if (isTypeLegal(STMemType)) in getTruncatedStoreValue()
17543 if (DC->isTypeLegal(VT)) in ShrinkLoadReplaceStoreWithStore()
18399 if (TLI.isTypeLegal(Ty) && TLI.isTypeLegal(MemVT) && in tryStoreMergeOfConstants()
20173 if (!isTypeLegal(VecVT) || in reduceBuildVecExtToExtBuildVec()
20478 if (!isTypeLegal(VT)) in reduceBuildVecToShuffle()
20872 if (TLI.isTypeLegal(OpVT)) in combineConcatVectorOfScalars()
21088 !TLI.isTypeLegal(VT)) in combineConcatVectorOfCasts()
21167 if (!TLI.isTypeLegal(NVT) || !TLI.isTypeLegal(Scalar.getValueType())) in visitCONCAT_VECTORS()
[all …]
H A DInstrEmitter.cpp106 if (TLI->isTypeLegal(VT)) in EmitCopyFromReg()
212 if (i < NumResults && TLI->isTypeLegal(Node->getSimpleValueType(i))) { in CreateVirtualRegisters()
392 TLI->isTypeLegal(OpVT) in AddOperand()
H A DLegalizeDAG.cpp446 TLI.isTypeLegal(MVT::i32)) { in OptimizeFloatStore()
456 if (TLI.isTypeLegal(MVT::i64)) { in OptimizeFloatStore()
463 if (TLI.isTypeLegal(MVT::i32) && !ST->isVolatile()) { in OptimizeFloatStore()
643 if (TLI.isTypeLegal(StVT)) { in LegalizeStoreOps()
881 if (TLI.isTypeLegal(SrcVT) || // Same as SrcVT == LoadVT? in LegalizeLoadOps()
1536 if (TLI.isTypeLegal(IVT)) { in getSignAsIntValue()
2331 if (SrcVT == MVT::i32 && TLI.isTypeLegal(MVT::f64) && in ExpandLegalINT_TO_FP()
3043 if (!TLI.isTypeLegal(EltVT)) { in ExpandNode()
3342 assert(TLI.isTypeLegal(HalfType)); in ExpandNode()
3806 assert(TLI.isTypeLegal(VT.getScalarType())&& "Element type must be legal"); in ExpandNode()
[all …]
H A DLegalizeIntegerTypes.cpp335 if (!TLI.isTypeLegal(SVT)) in PromoteIntRes_AtomicCmpSwap()
465 if (isTypeLegal(WideOutVT)) { in PromoteIntRes_BITCAST()
559 if (!OVT.isVector() && TLI.isTypeLegal(NVT) && in PromoteIntRes_CTLZ()
610 if (!OVT.isVector() && TLI.isTypeLegal(NVT) && in PromoteIntRes_CTTZ()
1061 if (TLI.isTypeLegal(PromotedType)) { in PromoteIntRes_DIVFIX()
1885 assert(!((NumElts & 1) && (!TLI.isTypeLegal(VecVT))) && in PromoteIntOp_BUILD_VECTOR()
4181 (Action == TargetLowering::Legal && TLI.isTypeLegal(NVT)) || in ExpandIntRes_Shift()
4816 if (TLI.isTypeLegal(LHSLo.getValueType()) && in IntegerExpandSetCCOperands()
4817 TLI.isTypeLegal(RHSLo.getValueType())) in IntegerExpandSetCCOperands()
4823 if (TLI.isTypeLegal(LHSHi.getValueType()) && in IntegerExpandSetCCOperands()
[all …]
/llvm-project-15.0.7/llvm/lib/CodeGen/
H A DTargetLoweringBase.cpp925 assert(isTypeLegal(VT)); in canOpTrap()
1124 if (!TLI->isTypeLegal(NewVT)) in getVectorTypeBreakdownMVT()
1149 if (isTypeLegal(*I)) in isLegalRC()
1312 if (isTypeLegal(IVT)) { in computeRegisterProperties()
1323 if (isTypeLegal(MVT::f64)) { in computeRegisterProperties()
1347 if (!isTypeLegal(MVT::f64)) { in computeRegisterProperties()
1356 if (!isTypeLegal(MVT::f32)) { in computeRegisterProperties()
1366 if (!isTypeLegal(MVT::f16)) { in computeRegisterProperties()
1395 if (isTypeLegal(VT)) in computeRegisterProperties()
1453 if (isTypeLegal(NVT)) { in computeRegisterProperties()
[all …]
H A DAnalysis.cpp269 TLI.isTypeLegal(EVT::getEVT(T1)) && TLI.isTypeLegal(EVT::getEVT(T2))); in isNoopBitcast()
/llvm-project-15.0.7/llvm/lib/Target/X86/
H A DX86FastISel.cpp239 if (!isTypeLegal(RetTy, RetVT)) in foldX86XALUIntrinsic()
1539 if (!TLI.isTypeLegal(DstVT)) in X86SelectZExt()
1597 if (!TLI.isTypeLegal(DstVT)) in X86SelectSExt()
1837 if (!isTypeLegal(I->getType(), VT)) in X86SelectShift()
1924 if (!isTypeLegal(I->getType(), VT)) in X86SelectDivRem()
2524 if (!TLI.isTypeLegal(SrcVT)) in X86SelectTrunc()
2668 if (!isTypeLegal(RetTy, VT)) in fastLowerIntrinsicCall()
2799 if (!isTypeLegal(RetTy, VT)) in fastLowerIntrinsicCall()
2863 if (!isTypeLegal(RetTy, VT)) in fastLowerIntrinsicCall()
2988 if (!isTypeLegal(RetTy, VT)) in fastLowerIntrinsicCall()
[all …]
/llvm-project-15.0.7/llvm/include/llvm/CodeGen/
H A DTargetLowering.h696 return isTypeLegal(VT) ? VT : MVT::INVALID_SIMPLE_VALUE_TYPE; in hasFastEqualityCompare()
937 bool isTypeLegal(EVT VT) const { in isTypeLegal() function
1166 return (VT == MVT::Other || isTypeLegal(VT)) &&
1180 return (VT == MVT::Other || isTypeLegal(VT)) &&
1194 return (VT == MVT::Other || isTypeLegal(VT)) &&
1265 return (!isTypeLegal(VT) || getOperationAction(Op, VT) == Expand); in isOperationExpand()
1270 return (VT == MVT::Other || isTypeLegal(VT)) && in isOperationLegal()
1321 return isTypeLegal(ValVT) && in isTruncStoreLegalOrCustom()
1448 } while (!isTypeLegal(NVT) || in getTypeToPromoteTo()
2735 if (!Load->hasOneUse() && (isTypeLegal(LoadVT) || !isTypeLegal(VT)) && in isExtLoad()
[all …]
/llvm-project-15.0.7/llvm/lib/Target/ARM/
H A DARMFastISel.cpp186 bool isTypeLegal(Type *Ty, MVT &VT);
671 bool ARMFastISel::isTypeLegal(Type *Ty, MVT &VT) { in isTypeLegal() function in ARMFastISel
680 return TLI.isTypeLegal(VT); in isTypeLegal()
684 if (isTypeLegal(Ty, VT)) return true; in isLoadTypeLegal()
1530 if (!isTypeLegal(Ty, DstVT)) in SelectIToFP()
1575 if (!isTypeLegal(RetTy, DstVT)) in SelectFPToI()
1604 if (!isTypeLegal(I->getType(), VT)) in SelectSelect()
1681 if (!isTypeLegal(Ty, VT)) in SelectDiv()
1710 if (!isTypeLegal(Ty, VT)) in SelectRem()
2210 else if (!isTypeLegal(RetTy, RetVT)) in ARMEmitLibcall()
[all …]
/llvm-project-15.0.7/llvm/lib/Target/RISCV/
H A DRISCVTargetTransformInfo.cpp270 if (!isTypeLegal(Src) || !isTypeLegal(Dst)) in getCastInstrCost()
H A DRISCVGatherScatterLowering.cpp99 if (!TLI->isTypeLegal(DataVT)) in isLegalTypeAndAlignment()
H A DRISCVISelLowering.cpp486 if (!isTypeLegal(VT)) in RISCVTargetLowering()
541 if (!isTypeLegal(VT)) in RISCVTargetLowering()
721 if (!isTypeLegal(VT)) in RISCVTargetLowering()
729 if (!isTypeLegal(VT)) in RISCVTargetLowering()
738 if (!isTypeLegal(VT)) in RISCVTargetLowering()
2942 if (!isTypeLegal(VT)) in isShuffleMaskLegal()
3145 if (isTypeLegal(VT) && isTypeLegal(Op0VT)) in LowerOperation()
3176 if (!isTypeLegal(BVT)) in LowerOperation()
5240 if (!isTypeLegal(VecEVT)) in lowerVECREDUCE()
5372 if (!isTypeLegal(VecEVT)) in lowerVPREDUCE()
[all …]
/llvm-project-15.0.7/llvm/lib/Target/PowerPC/
H A DPPCFastISel.cpp141 bool isTypeLegal(Type *Ty, MVT &VT);
270 bool PPCFastISel::isTypeLegal(Type *Ty, MVT &VT) { in isTypeLegal() function in PPCFastISel
279 return TLI.isTypeLegal(VT); in isTypeLegal()
285 if (isTypeLegal(Ty, VT)) return true; in isLoadTypeLegal()
1066 if (!isTypeLegal(DstTy, DstVT)) in SelectIToFP()
1191 if (!isTypeLegal(DstTy, DstVT)) in SelectFPToI()
1204 if (!isTypeLegal(SrcTy, SrcVT)) in SelectFPToI()
1577 else if (!isTypeLegal(RetTy, RetVT) && RetVT != MVT::i16 && in fastLowerCall()
1623 if (!isTypeLegal(ArgTy, ArgVT) && ArgVT != MVT::i16 && ArgVT != MVT::i8) in fastLowerCall()
/llvm-project-15.0.7/llvm/lib/Target/Mips/
H A DMipsFastISel.cpp172 bool isTypeLegal(Type *Ty, MVT &VT);
591 bool MipsFastISel::isTypeLegal(Type *Ty, MVT &VT) { in isTypeLegal() function in MipsFastISel
600 return TLI.isTypeLegal(VT); in isTypeLegal()
607 if (isTypeLegal(Ty, VT)) in isTypeSupported()
619 if (isTypeLegal(Ty, VT)) in isLoadTypeLegal()
1098 if (!isTypeLegal(DstTy, DstVT)) in selectFPToInt()
1106 if (!isTypeLegal(SrcTy, SrcVT)) in selectFPToInt()
1522 if (!isTypeLegal(Val->getType(), VT) && in fastLowerCall()
/llvm-project-15.0.7/llvm/lib/Target/AArch64/
H A DAArch64FastISel.cpp183 bool isTypeLegal(Type *Ty, MVT &VT);
538 if (!isTypeLegal(CFP->getType(), VT)) in fastMaterializeFloatZero()
975 return TLI.isTypeLegal(VT); in isTypeLegal()
986 if (isTypeLegal(Ty, VT)) in isTypeSupported()
3340 if (!isTypeLegal(RetTy, RetVT)) in foldXALUIntrinsic()
3564 if (!isTypeLegal(II->getType(), VT)) in fastLowerIntrinsicCall()
3600 if (!isTypeLegal(RetTy, VT)) in fastLowerIntrinsicCall()
3626 if (!isTypeLegal(RetTy, VT)) in fastLowerIntrinsicCall()
4733 if (!isTypeLegal(I->getType(), RetVT)) in selectBitCast()
4808 if (!isTypeLegal(I->getType(), VT)) in selectSDiv()
[all …]
H A DAArch64ISelLowering.cpp4124 if (isTypeLegal(OpVT) && !isTypeLegal(ArgVT)) { in LowerBITCAST()
10659 if (!isTypeLegal(VT) || !VT.isScalableVector()) in LowerDUPQLane()
11478 isTypeLegal(Op.getValueType()) && in LowerCONCAT_VECTORS()
11674 if (!isTypeLegal(VT)) in LowerINSERT_SUBVECTOR()
13400 assert(isTypeLegal(SplitVT)); in LowerSVEStructLoad()
16310 TLI.isTypeLegal(Op.getValueType()) && in getPTest()
18992 if (!TLI.isTypeLegal(Base.getValueType())) in performScatterStoreCombine()
19002 if (!TLI.isTypeLegal(Offset.getValueType())) in performScatterStoreCombine()
19095 if (!TLI.isTypeLegal(Base.getValueType())) in performGatherLoadCombine()
19999 if (VT.isScalableVector() && !isTypeLegal(VT) && isTypeLegal(SrcVT)) { in ReplaceBITCASTResults()
[all …]
/llvm-project-15.0.7/llvm/include/llvm/Analysis/
H A DTargetTransformInfo.h748 bool isTypeLegal(Type *Ty) const;
1626 virtual bool isTypeLegal(Type *Ty) = 0;
2072 bool isTypeLegal(Type *Ty) override { return Impl.isTypeLegal(Ty); } in isTypeLegal() function
/llvm-project-15.0.7/llvm/lib/Analysis/
H A DVectorUtils.cpp636 !TTI->isTypeLegal(I.getOperand(0)->getType())) in computeMinimumValueSizes()
645 if (TTI && isa<TruncInst>(&I) && TTI->isTypeLegal(I.getType())) in computeMinimumValueSizes()
H A DTargetTransformInfo.cpp486 bool TargetTransformInfo::isTypeLegal(Type *Ty) const { in isTypeLegal() function in TargetTransformInfo
487 return TTIImpl->isTypeLegal(Ty); in isTypeLegal()
/llvm-project-15.0.7/llvm/lib/CodeGen/GlobalISel/
H A DLoadStoreOpt.cpp318 (TLI->isTypeLegal(StoreEVT))) in mergeStores()

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