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Searched refs:isTriviallyReMaterializable (Results 1 – 10 of 10) sorted by relevance

/llvm-project-15.0.7/llvm/lib/CodeGen/
H A DRegAllocScore.cpp84 return MF.getSubtarget().getInstrInfo()->isTriviallyReMaterializable( in calculateRegAllocScore()
H A DMachineLICM.cpp233 bool isTriviallyReMaterializable(const MachineInstr &MI) const;
668 bool MachineLICMBase::isTriviallyReMaterializable( in isTriviallyReMaterializable() function in MachineLICMBase
670 if (!TII->isTriviallyReMaterializable(MI)) in isTriviallyReMaterializable()
1176 if (isTriviallyReMaterializable(MI)) in IsProfitableToHoist()
1229 if (!isTriviallyReMaterializable(MI) && in IsProfitableToHoist()
H A DLiveRangeEdit.cpp74 if (!TII.isTriviallyReMaterializable(*DefMI)) in checkRematerializable()
387 TII.isTriviallyReMaterializable(*MI)) { in eliminateDeadDef()
H A DCalcSpillWeights.cpp124 if (!TII.isTriviallyReMaterializable(*MI)) in isRematerializable()
H A DTargetRegisterInfo.cpp74 if (MI && TII->isTriviallyReMaterializable(*MI) && in shouldRegionSplitForVirtReg()
H A DRegisterCoalescer.cpp1309 if (!TII->isTriviallyReMaterializable(*DefMI)) in reMaterializeTrivialDef()
/llvm-project-15.0.7/llvm/lib/Target/AMDGPU/
H A DGCNSchedStrategy.h301 bool isTriviallyReMaterializable(const MachineInstr &MI);
H A DGCNSchedStrategy.cpp897 if (Op->getSubReg() != 0 || !isTriviallyReMaterializable(*Def)) in collectRematerializableInstructions()
1108 bool PreRARematStage::isTriviallyReMaterializable(const MachineInstr &MI) { in isTriviallyReMaterializable() function in PreRARematStage
1109 if (!DAG.TII->isTriviallyReMaterializable(MI)) in isTriviallyReMaterializable()
/llvm-project-15.0.7/llvm/lib/Target/WebAssembly/
H A DWebAssemblyRegStackify.cpp259 return Def.isAsCheapAsAMove() && TII->isTriviallyReMaterializable(Def); in shouldRematerialize()
/llvm-project-15.0.7/llvm/include/llvm/CodeGen/
H A DTargetInstrInfo.h123 bool isTriviallyReMaterializable(const MachineInstr &MI) const { in isTriviallyReMaterializable() function