| /llvm-project-15.0.7/llvm/lib/DebugInfo/PDB/Native/ |
| H A D | NativeSymbolEnumerator.cpp | 83 assert(Record.Value.isSignedIntN(BT.getLength() * 8)); in getValue()
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| /llvm-project-15.0.7/llvm/lib/Target/Mips/ |
| H A D | MipsSEISelDAGToDAG.cpp | 562 if (( Signed && ImmValue.isSignedIntN(ImmBitSize)) || in selectVSplatCommon()
1132 if (SplatValue.isSignedIntN(10)) { in trySelect()
1137 } else if (SplatValue.isSignedIntN(16) && in trySelect()
1167 } else if (SplatValue.isSignedIntN(32) && SplatBitSize == 32) { in trySelect()
1188 } else if (SplatValue.isSignedIntN(32) && SplatBitSize == 64 && in trySelect()
1216 } else if (SplatValue.isSignedIntN(64)) { in trySelect()
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| H A D | MipsInstructionSelector.cpp | 161 if (Imm.isSignedIntN(16)) { in materialize32BitImm()
457 if (OffsetValue.isSignedIntN(16)) { in select()
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| /llvm-project-15.0.7/lldb/source/Utility/ |
| H A D | Scalar.cpp | 658 fits = integer.isSignedIntN(byte_size * 8); in SetValueFromCString()
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| /llvm-project-15.0.7/clang/include/clang/Basic/ |
| H A D | TargetInfo.h | 1058 return Value.isSignedIntN(32) && ImmSet.contains(Value.getZExtValue()); in isValidAsmImmediate()
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| /llvm-project-15.0.7/llvm/lib/Target/Hexagon/ |
| H A D | HexagonConstPropagation.cpp | 2896 if (!constToInt(L.Value, A) || !A.isSignedIntN(64)) in rewriteHexConstDefs()
2916 if (A.isSignedIntN(8)) { in rewriteHexConstDefs()
3018 if (!constToInt(LI.Value, A) || !A.isSignedIntN(8)) in rewriteHexConstUses()
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| /llvm-project-15.0.7/mlir/lib/Conversion/ArithmeticToSPIRV/ |
| H A D | ArithmeticToSPIRV.cpp | 234 if (srcAttr.getValue().isSignedIntN(dstType.getWidth())) { in convertIntegerAttr()
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| /llvm-project-15.0.7/llvm/include/llvm/ADT/ |
| H A D | APInt.h | 420 bool isSignedIntN(unsigned N) const { return getSignificantBits() <= N; } in isSignedIntN() function
|
| /llvm-project-15.0.7/mlir/lib/Target/SPIRV/Serialization/ |
| H A D | Serializer.cpp | 808 bool isSigned = value.isSignedIntN(bitwidth); in prepareConstantInt()
|
| /llvm-project-15.0.7/llvm/lib/Target/PowerPC/ |
| H A D | PPCLoopInstrFormPrep.cpp | 1330 if (ConstInt.isSignedIntN(16) && ConstInt.srem(4) != 0) in runOnLoop()
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| H A D | PPCInstrInfo.cpp | 4492 if (III.SignedImm && !ActualValue.isSignedIntN(III.ImmWidth)) in isImmElgibleForForwarding()
4991 if (!ActualValue.isSignedIntN(III.ImmWidth)) in transformToImmFormFedByLI()
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| H A D | PPCISelLowering.cpp | 16700 if (!ConstNode->getAPIntValue().isSignedIntN(64)) in decomposeMulByConstant()
17609 if (ConstImm.isSignedIntN(32)) { // Flag to handle 32-bit constants. in computeFlagsForAddressComputation()
17614 if (ConstImm.isSignedIntN(34)) // Flag to handle 34-bit constants. in computeFlagsForAddressComputation()
17628 if (ConstImm.isSignedIntN(16)) { in computeFlagsForAddressComputation()
17633 if (ConstImm.isSignedIntN(34)) in computeFlagsForAddressComputation()
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| /llvm-project-15.0.7/llvm/lib/CodeGen/ |
| H A D | CodeGenPrepare.cpp | 3906 !isIVIncrement(ScaleReg, &LI) && CI->getValue().isSignedIntN(64)) { in matchScaledValue()
3967 if (Offset.isSignedIntN(64)) { in matchScaledValue()
4774 if (CI->getValue().isSignedIntN(64)) { in matchAddr()
|
| /llvm-project-15.0.7/llvm/lib/Target/X86/ |
| H A D | X86ISelDAGToDAG.cpp | 662 if (Imm->getAPIntValue().isSignedIntN(8)) in IsProfitableToFold()
687 (-Imm->getAPIntValue()).isSignedIntN(8)) in IsProfitableToFold()
691 (-Imm->getAPIntValue()).isSignedIntN(8) && in IsProfitableToFold()
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| H A D | X86ISelLowering.cpp | 23755 if ((COp0 && !COp0->getAPIntValue().isSignedIntN(8)) || in EmitCmp()
23756 (COp1 && !COp1->getAPIntValue().isSignedIntN(8))) { in EmitCmp()
24886 if (Op1ValPlusOne.isSignedIntN(32) && in LowerSETCC()
24887 (!Op1Val.isSignedIntN(8) || Op1ValPlusOne.isSignedIntN(8))) { in LowerSETCC()
46923 if (Val.isSignedIntN(DstBitsPerElt)) in combineVectorPack()
53077 if (Mask.isSignedIntN(32)) { in combineCMP()
53586 (V.getConstantOperandAPInt(0).isSignedIntN(32) && in pushAddIntoCmovOfConsts()
53587 V.getConstantOperandAPInt(1).isSignedIntN(32)); in pushAddIntoCmovOfConsts()
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| /llvm-project-15.0.7/llvm/lib/Support/ |
| H A D | APInt.cpp | 938 if (isSignedIntN(width)) in truncSSat()
|
| /llvm-project-15.0.7/llvm/lib/Target/RISCV/ |
| H A D | RISCVISelLowering.cpp | 9478 if (ShrunkMask.isSignedIntN(12)) in targetShrinkDemandedConstant()
9512 else if (!C->isOpaque() && MinSignedBits <= 32 && !ShrunkMask.isSignedIntN(32)) in targetShrinkDemandedConstant()
12324 if (Subtarget.hasStdExtZba() && !Imm.isSignedIntN(12) && in decomposeMulByConstant()
12334 if (!Imm.isSignedIntN(12) && Imm.countTrailingZeros() < 12) { in decomposeMulByConstant()
12362 if (C1.isSignedIntN(12) && !(C1 * C2).isSignedIntN(12)) in isMulAddWithConstProfitable()
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| /llvm-project-15.0.7/polly/lib/Analysis/ |
| H A D | ScopBuilder.cpp | 2224 if (ValAPInt.isSignedIntN(32)) in foldSizeConstantsToRight()
|
| /llvm-project-15.0.7/llvm/lib/Target/NVPTX/ |
| H A D | NVPTXInstrInfo.td | 716 return v.isSignedIntN(32);
726 return v.isSignedIntN(16);
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| H A D | NVPTXISelLowering.cpp | 4766 return Val.isSignedIntN(OptSize); in AreMulWideOperandsDemotable()
|
| /llvm-project-15.0.7/llvm/lib/Target/M68k/ |
| H A D | M68kISelLowering.cpp | 1736 if (!Mask.isSignedIntN(32)) // Avoid large immediates. in EmitTest()
|
| /llvm-project-15.0.7/llvm/lib/Target/AArch64/AsmParser/ |
| H A D | AArch64AsmParser.cpp | 4407 if (!IsXReg && !(Simm.isIntN(32) || Simm.isSignedIntN(32))) in parseOperand()
|
| /llvm-project-15.0.7/clang/lib/Sema/ |
| H A D | SemaOpenMP.cpp | 9391 return Signed ? Result->isSignedIntN(Bits) : Result->isIntN(Bits); in fitsInto()
|