| /llvm-project-15.0.7/llvm/lib/CodeGen/ |
| H A D | LivePhysRegs.cpp | 85 if (O->isDebug()) in stepForward()
295 if (!MO->isReg() || !MO->isDef() || MO->isDebug()) in recomputeLivenessFlags()
324 if (!MO->isReg() || !MO->readsReg() || MO->isDebug()) in recomputeLivenessFlags()
|
| H A D | LiveRangeShrink.cpp | 141 if (!MO.isReg() || MO.isDebug()) in runOnMachineFunction()
174 if (!MO.isReg() || MO.isDead() || MO.isDebug()) in runOnMachineFunction()
|
| H A D | MachineOperand.cpp | 101 assert((!Val || !isDebug()) && "Marking a debug operation as def"); in setIsDef()
241 bool isDebug) { in ChangeToRegister() argument
254 isDebug = true; in ChangeToRegister()
269 IsDebug = isDebug; in ChangeToRegister()
|
| H A D | MachineCopyPropagation.cpp | 768 ReadRegister(Reg.asMCReg(), MI, MO.isDebug() ? DebugUse : RegularUse); in ForwardCopyPropagateBlock()
970 if (MO.isDebug()) { in BackwardCopyPropagateBlock()
|
| H A D | MachineVerifier.cpp | 1965 if (!MO->isDebug()) in visitMachineOperand()
1967 } else if (MO->isDebug()) { in visitMachineOperand()
2688 MODef.isEarlyClobber() || MODef.isDebug()) in checkPHIOps()
2701 MO0.isDebug() || MO0.isTied()) in checkPHIOps()
|
| H A D | MachineInstr.cpp | 1838 if (MO.isDebug()) in addRegisterKilled()
|
| /llvm-project-15.0.7/llvm/include/llvm/CodeGen/ |
| H A D | MachineRegisterInfo.h | 1017 (SkipDebug && op->isDebug())) in defusechain_iterator()
1032 assert(!Op->isDebug() && "Can't have debug defs"); in advance()
1037 (SkipDebug && Op->isDebug()))) in advance()
1125 (SkipDebug && op->isDebug())) in defusechain_instr_iterator()
1140 assert(!Op->isDebug() && "Can't have debug defs"); in advance()
1145 (SkipDebug && Op->isDebug()))) in advance()
|
| H A D | MachineOperand.h | 445 bool isDebug() const { in isDebug() function
511 assert((!Val || !isDebug()) && "Marking a debug operation as kill");
771 bool isUndef = false, bool isDebug = false);
804 unsigned SubReg = 0, bool isDebug = false,
818 Op.IsDebug = isDebug;
|
| H A D | LiveRegUnits.h | 169 return MOP.isRegMask() || (MOP.isReg() && !MOP.isDebug() && in phys_regs_and_masks()
|
| H A D | MachineInstrBuilder.h | 534 getDebugRegState(RegOp.isDebug()) | in getRegState()
|
| /llvm-project-15.0.7/llvm/lib/Target/Hexagon/ |
| H A D | HexagonGenInsert.cpp | 83 inline static bool isDebug() { in isDebug() function
786 if (isDebug()) { in findRecordInsertForms()
851 if (isDebug()) { in findRecordInsertForms()
901 if (isDebug()) { in findRecordInsertForms()
918 if (isDebug()) in collectInBlock()
1511 BTLoc.trace(isDebug()); in runOnMachineFunction()
1519 if (isDebug()) { in runOnMachineFunction()
1542 if (isDebug()) { in runOnMachineFunction()
1555 if (isDebug()) { in runOnMachineFunction()
1568 if (isDebug()) { in runOnMachineFunction()
|
| H A D | HexagonSplitDouble.cpp | 617 Op.isDead(), Op.isUndef(), Op.isEarlyClobber(), SR, Op.isDebug(), in createHalfInstr()
|
| H A D | HexagonHardwareLoops.cpp | 1100 if (MO.isDebug()) in removeIfDead()
|
| /llvm-project-15.0.7/llvm/lib/Target/AArch64/ |
| H A D | AArch64LoadStoreOptimizer.cpp | 804 return MOP.isReg() && MOP.isDef() && !MOP.isDebug() && MOP.getReg() && in forAllMIsUntilDef()
871 if (MOP.isReg() && !MOP.isDebug() && MOP.getReg() && in mergePairedInsns()
883 if (MOP.isReg() && !MOP.isDebug() && MOP.getReg() && in mergePairedInsns()
906 return !MOP.isReg() || MOP.isDebug() || !MOP.getReg() || in mergePairedInsns()
1352 return MOP.isReg() && !MOP.isDebug() && MOP.getReg() && in canRenameUpToDef()
1418 if (!MOP.isReg() || !MOP.isDef() || MOP.isDebug() || !MOP.getReg() || in canRenameUpToDef()
1431 if (!MOP.isReg() || MOP.isDebug() || !MOP.getReg() || in canRenameUpToDef()
|
| /llvm-project-15.0.7/llvm/unittests/CodeGen/ |
| H A D | MachineInstrTest.cpp | 410 ASSERT_TRUE(MI->getOperand(0).isDebug()); in TEST()
411 ASSERT_TRUE(MI->getOperand(1).isDebug()); in TEST()
|
| /llvm-project-15.0.7/llvm/lib/Target/X86/ |
| H A D | X86VZeroUpper.cpp | 164 if (MO.isDebug()) in hasYmmOrZmmReg()
|
| /llvm-project-15.0.7/lld/ELF/ |
| H A D | InputSection.cpp | 820 const bool isDebug = isDebugSection(*this); in relocateNonAlloc() local
822 isDebug && (name == ".debug_loc" || name == ".debug_ranges"); in relocateNonAlloc()
823 const bool isDebugLine = isDebug && name == ".debug_line"; in relocateNonAlloc()
853 (isDebug && (type == target.symbolicRel || expr == R_DTPREL))) { in relocateNonAlloc()
|
| /llvm-project-15.0.7/llvm/lib/Target/AMDGPU/ |
| H A D | AMDGPUInstructionSelector.cpp | 252 MO.isEarlyClobber(), 0, MO.isDebug(), in getSubOperand64()
|
| H A D | SIInstrInfo.cpp | 2262 bool IsDebug = RegOp.isDebug(); in swapRegAndNonRegOperand()
|