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Searched refs:getRegInfo (Results 1 – 25 of 376) sorted by relevance

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/llvm-project-15.0.7/llvm/tools/llvm-exegesis/lib/
H A DParallelSnippetGenerator.cpp193 BitVector ImplicitUses(State.getRegInfo().getNumRegs()); in generateCodeTemplates()
194 BitVector ImplicitDefs(State.getRegInfo().getNumRegs()); in generateCodeTemplates()
207 getAliasedBits(State.getRegInfo(), ImplicitUses); in generateCodeTemplates()
209 getAliasedBits(State.getRegInfo(), ImplicitDefs); in generateCodeTemplates()
210 BitVector Defs(State.getRegInfo().getNumRegs()); in generateCodeTemplates()
221 .concat(debugString(State.getRegInfo(), in generateCodeTemplates()
224 .concat(debugString(State.getRegInfo(), ForbiddenRegisters)) in generateCodeTemplates()
226 .concat(debugString(State.getRegInfo(), ImplicitUseAliases)), in generateCodeTemplates()
235 const auto DefAliases = getAliasedBits(State.getRegInfo(), Defs); in generateCodeTemplates()
/llvm-project-15.0.7/llvm/unittests/tools/llvm-exegesis/Mips/
H A DRegisterAliasingTest.cpp28 const auto &RegInfo = State.getRegInfo(); in TEST_F()
44 const auto &RegInfo = State.getRegInfo(); in TEST_F()
63 const auto &RegInfo = State.getRegInfo(); in TEST_F()
/llvm-project-15.0.7/llvm/unittests/tools/llvm-exegesis/X86/
H A DRegisterAliasingTest.cpp29 const auto &RegInfo = State.getRegInfo(); in TEST_F()
45 const auto &RegInfo = State.getRegInfo(); in TEST_F()
62 const auto &RegInfo = State.getRegInfo(); in TEST_F()
/llvm-project-15.0.7/llvm/lib/Target/WebAssembly/
H A DWebAssemblyFixBrTableDefaults.cpp61 auto ExtMI = MF.getRegInfo().getVRegDef(MI.getOperand(0).getReg()); in fixBrTableIndex()
67 if (MF.getRegInfo().use_nodbg_empty(ExtDefReg)) { in fixBrTableIndex()
74 MF.getRegInfo().createVirtualRegister(&WebAssembly::I32RegClass); in fixBrTableIndex()
126 MachineRegisterInfo &MRI = MF.getRegInfo(); in fixBrTableDefault()
H A DWebAssemblyRegNumbering.cpp67 MachineRegisterInfo &MRI = MF.getRegInfo(); in runOnMachineFunction()
87 unsigned NumVRegs = MF.getRegInfo().getNumVirtRegs(); in runOnMachineFunction()
/llvm-project-15.0.7/llvm/lib/Target/Mips/
H A DMipsMachineFunction.cpp57 MF.getRegInfo().createVirtualRegister(&getGlobalBaseRegClass(MF)); in getGlobalBaseReg()
75 MachineRegisterInfo &RegInfo = MF.getRegInfo(); in initGlobalBaseReg()
87 MF.getRegInfo().addLiveIn(Mips::T9_64); in initGlobalBaseReg()
115 MF.getRegInfo().addLiveIn(Mips::T9); in initGlobalBaseReg()
150 MF.getRegInfo().addLiveIn(Mips::V0); in initGlobalBaseReg()
H A DMipsRegisterBankInfo.cpp206 const MachineRegisterInfo &MRI = MF.getRegInfo(); in skipCopiesOutgoing()
220 const MachineRegisterInfo &MRI = MF.getRegInfo(); in skipCopiesIncoming()
233 const MachineRegisterInfo &MRI = MI->getMF()->getRegInfo(); in AmbiguousRegDefUseContainer()
367 const MachineRegisterInfo &MRI = MF.getRegInfo(); in setTypesAccordingToPhysicalRegister()
433 const MachineRegisterInfo &MRI = MF.getRegInfo(); in getInstrMapping()
737 LegalizationArtifactCombiner ArtCombiner(B, MF->getRegInfo(), LegInfo); in applyMappingImpl()
/llvm-project-15.0.7/llvm/lib/Target/ARC/
H A DARCExpandPseudos.cpp65 Register AddrReg = MF.getRegInfo().createVirtualRegister(&ARC::GPR32RegClass); in expandStore()
90 Register Ra = MF.getRegInfo().createVirtualRegister(&ARC::GPR32RegClass); in expandCTLZ()
91 Register Rb = MF.getRegInfo().createVirtualRegister(&ARC::GPR32RegClass); in expandCTLZ()
118 Register R = MF.getRegInfo().createVirtualRegister(&ARC::GPR32RegClass); in expandCTTZ()
/llvm-project-15.0.7/llvm/lib/Target/NVPTX/
H A DNVPTXPeephole.cpp84 const auto &MRI = MF.getRegInfo(); in isCVTAToLocalCombinationCandidate()
112 const auto &MRI = MF.getRegInfo(); in CombineCVTAToLocal()
157 const auto &MRI = MF.getRegInfo(); in runOnMachineFunction()
/llvm-project-15.0.7/llvm/lib/Target/SPIRV/
H A DSPIRVInstrInfo.cpp50 auto &MRI = MI.getMF()->getRegInfo(); in isTypeDeclInstr()
193 auto &MRI = I->getMF()->getRegInfo(); in copyPhysReg()
201 auto &MRI = MI.getMF()->getRegInfo(); in expandPostRAPseudo()
H A DSPIRVDuplicatesTracker.cpp25 MachineInstr *MI = MF->getRegInfo().getUniqueVRegDef(R); in prebuildReg2Entry()
47 const MachineRegisterInfo &MRI = U.first->getRegInfo(); in buildDepsGraph()
H A DSPIRVGlobalRegistry.cpp62 auto &MRI = MIRBuilder.getMF().getRegInfo(); in createTypeVReg()
134 Res = CurMF->getRegInfo().createGenericVirtualRegister(LLTy); in getOrCreateConstIntReg()
193 Res = MF.getRegInfo().createGenericVirtualRegister(LLTy); in buildConstantInt()
238 Res = MF.getRegInfo().createGenericVirtualRegister(LLT::scalar(BitWidth)); in buildConstantFP()
271 CurMF->getRegInfo().createGenericVirtualRegister(LLTy); in getOrCreateConsIntVector()
711 .addDef(createTypeVReg(CurMF->getRegInfo())) in getOrCreateSPIRVIntegerType()
733 .addDef(createTypeVReg(CurMF->getRegInfo())); in getOrCreateSPIRVBoolType()
755 .addDef(createTypeVReg(CurMF->getRegInfo())) in getOrCreateSPIRVVectorType()
782 .addDef(createTypeVReg(CurMF->getRegInfo())) in getOrCreateSPIRVPointerType()
800 Res = CurMF->getRegInfo().createGenericVirtualRegister(LLTy); in getOrCreateUndef()
H A DSPIRVPreLegalizer.cpp43 MachineRegisterInfo &MRI = MF.getRegInfo(); in addConstantsToTrack()
98 MachineRegisterInfo &MRI = MF.getRegInfo(); in foldConstantsIntoIntrinsics()
222 MachineRegisterInfo &MRI = MF.getRegInfo(); in generateAssignInstrs()
241 insertAssignInstr(Reg, Ty, nullptr, GR, MIB, MF.getRegInfo()); in generateAssignInstrs()
352 MachineRegisterInfo &MRI = MF.getRegInfo(); in processInstrsWithTypeFolding()
383 MachineRegisterInfo &MRI = MF.getRegInfo(); in processSwitches()
/llvm-project-15.0.7/llvm/lib/CodeGen/
H A DLivePhysRegs.cpp176 const MachineRegisterInfo &MRI = MF.getRegInfo(); in addCalleeSavedRegs()
251 const MachineRegisterInfo &MRI = MF.getRegInfo(); in computeLiveIns()
262 const MachineRegisterInfo &MRI = MF.getRegInfo(); in addLiveIns()
283 const MachineRegisterInfo &MRI = MF.getRegInfo(); in recomputeLivenessFlags()
H A DSwiftErrorValueTracking.cpp37 auto VReg = MF->getRegInfo().createVirtualRegister(RC); in getOrCreateVReg()
59 Register VReg = MF->getRegInfo().createVirtualRegister(RC); in getOrCreateVRegDefAt()
133 Register VReg = MF->getRegInfo().createVirtualRegister(RC); in createEntriesInEntryBlock()
243 UpwardsUse ? UUseVReg : MF->getRegInfo().createVirtualRegister(RC); in propagateVRegs()
H A DLiveIntervalCalc.cpp44 const MachineRegisterInfo *MRI = getRegInfo(); in calculate()
125 const MachineRegisterInfo *MRI = getRegInfo(); in createDeadDefs()
138 const MachineRegisterInfo *MRI = getRegInfo(); in extendToUses()
H A DRegAllocPBQP.cpp456 if (!MF.getRegInfo().isAllocatable(DstReg)) in apply()
569 const MachineRegisterInfo &MRI = MF.getRegInfo(); in findVRegIntervalsToAlloc()
583 const MCPhysReg *CSR = MF.getRegInfo().getCalleeSavedRegs(); in isACalleeSavedRegister()
595 const MachineRegisterInfo &MRI = G.getMetadata().MF.getRegInfo(); in initializeGraph()
758 MachineRegisterInfo &MRI = MF.getRegInfo(); in finalizeAlloc()
770 if (!VRM.getRegInfo().isReserved(CandidateReg)) { in finalizeAlloc()
812 MF.getRegInfo().freezeReservedRegs(MF); in runOnMachineFunction()
891 const MachineRegisterInfo &MRI = G.getMetadata().MF.getRegInfo(); in PrintNodeInfo()
H A DTargetFrameLoweringImpl.cpp101 const MCPhysReg *CSRegs = MF.getRegInfo().getCalleeSavedRegs(); in determineCalleeSaves()
126 const MachineRegisterInfo &MRI = MF.getRegInfo(); in determineCalleeSaves()
H A DVirtRegMap.cpp64 MRI = &mf.getRegInfo(); in runOnMachineFunction()
79 unsigned NumRegs = MF->getRegInfo().getNumVirtRegs(); in grow()
90 assert(!getRegInfo().isReserved(physReg) && in assignVirt2Phys()
131 const TargetRegisterClass* RC = MF->getRegInfo().getRegClass(virtReg); in assignVirt2StackSlot()
260 MRI = &MF->getRegInfo(); in runOnMachineFunction()
H A DCalcSpillWeights.cpp36 MachineRegisterInfo &MRI = MF.getRegInfo(); in calculateSpillWeightsAndHints()
131 return any_of(VRM.getRegInfo().reg_operands(LI.reg()), in isLiveAtStatepointVarArg()
150 MachineRegisterInfo &MRI = MF.getRegInfo(); in weightCalcHelper()
/llvm-project-15.0.7/llvm/lib/Target/PowerPC/
H A DPPCRegisterInfo.cpp212 bool SaveR2 = MF->getRegInfo().isAllocatable(PPC::X2) && in getCalleeSavedRegs()
548 const MachineRegisterInfo *MRI = &MF.getRegInfo(); in getRegAllocationHints()
814 NegSizeReg = MF.getRegInfo().createVirtualRegister(G8RC); in prepareDynamicAlloca()
822 NegSizeReg = MF.getRegInfo().createVirtualRegister(G8RC); in prepareDynamicAlloca()
831 NegSizeReg = MF.getRegInfo().createVirtualRegister(GPRC); in prepareDynamicAlloca()
839 NegSizeReg = MF.getRegInfo().createVirtualRegister(GPRC); in prepareDynamicAlloca()
947 Reg = MF.getRegInfo().createVirtualRegister(LP64 ? G8RC : GPRC); in lowerCRSpilling()
1607 Register SRegHi = MF.getRegInfo().createVirtualRegister(RC), in eliminateFrameIndex()
1608 SReg = MF.getRegInfo().createVirtualRegister(RC); in eliminateFrameIndex()
1762 MachineRegisterInfo &MRI = MBB->getParent()->getRegInfo(); in materializeFrameBaseRegister()
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/llvm-project-15.0.7/llvm/include/llvm/CodeGen/
H A DMachineOutliner.h79 assert(MBB->getParent()->getRegInfo().tracksLiveness() && in initFromEndOfBlockToStartOfSeq()
96 assert(MBB->getParent()->getRegInfo().tracksLiveness() && in initInSeq()
/llvm-project-15.0.7/llvm/tools/llvm-reduce/deltas/
H A DReduceInstructionsMIR.cpp30 auto MRI = &MBB.getParent()->getRegInfo(); in getPrevDefOfRCInMBB()
69 auto MRI = &MF.getRegInfo(); in extractInstrFromFunction()
/llvm-project-15.0.7/llvm/lib/Target/AMDGPU/
H A DGCNRegPressure.h222 auto &MRI = (*R.begin())->getParent()->getParent()->getRegInfo(); in getLiveRegMap()
252 MI.getParent()->getParent()->getRegInfo()); in getLiveRegsAfter()
258 MI.getParent()->getParent()->getRegInfo()); in getLiveRegsBefore()
H A DSIFrameLowering.cpp184 MF->getRegInfo().addLiveIn(GitPtrLo); in buildGitPtr()
219 MachineRegisterInfo &MRI = MF.getRegInfo(); in emitEntryFunctionFlatScratchInit()
270 MachineRegisterInfo &MRI = MF.getRegInfo(); in emitEntryFunctionFlatScratchInit()
353 MachineRegisterInfo &MRI = MF.getRegInfo(); in getEntryFunctionReservedScratchRsrcReg()
422 MachineRegisterInfo &MRI = MF.getRegInfo(); in emitEntryFunctionPrologue()
712 MachineRegisterInfo &MRI = MF.getRegInfo(); in buildScratchExecCopy()
753 MachineRegisterInfo &MRI = MF.getRegInfo(); in emitPrologue()
967 MachineRegisterInfo &MRI = MF.getRegInfo(); in emitEpilogue()
1113 MachineRegisterInfo &MRI = MF.getRegInfo(); in processFunctionBeforeFrameFinalized()
1219 MachineRegisterInfo &MRI = MF.getRegInfo(); in processFunctionBeforeFrameIndicesReplaced()
[all …]

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