Searched refs:getMatchingSuperRegClass (Results 1 – 15 of 15) sorted by relevance
| /llvm-project-15.0.7/llvm/lib/Target/X86/ |
| H A D | X86RegisterInfo.h | 61 getMatchingSuperRegClass(const TargetRegisterClass *A,
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| H A D | X86RegisterInfo.cpp | 97 X86RegisterInfo::getMatchingSuperRegClass(const TargetRegisterClass *A, in getMatchingSuperRegClass() function in X86RegisterInfo
106 return X86GenRegisterInfo::getMatchingSuperRegClass(A, B, SubIdx); in getMatchingSuperRegClass()
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| /llvm-project-15.0.7/llvm/lib/CodeGen/ |
| H A D | DetectDeadLanes.cpp | 181 return !TRI.getMatchingSuperRegClass(SrcRC, DstRC, SrcSubIdx); in isCrossCopy()
183 return !TRI.getMatchingSuperRegClass(DstRC, SrcRC, DstSubIdx); in isCrossCopy()
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| H A D | TargetRegisterInfo.cpp | 303 TargetRegisterInfo::getMatchingSuperRegClass(const TargetRegisterClass *A, in getMatchingSuperRegClass() function in TargetRegisterInfo
407 return TRI.getMatchingSuperRegClass(SrcRC, DefRC, SrcSubReg) != nullptr; in shareSameRegisterFile()
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| H A D | MachineCombiner.cpp | 179 return TRI->getMatchingSuperRegClass(SrcRC, DstRC, SrcSub) != nullptr; in isTransientMI()
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| H A D | TailDuplicator.cpp | 417 ConstrRC = TRI->getMatchingSuperRegClass(MappedRC, OrigRC, in duplicateInstruction()
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| H A D | RegisterCoalescer.cpp | 513 NewRC = TRI.getMatchingSuperRegClass(DstRC, SrcRC, DstSub); in setRegisters()
517 NewRC = TRI.getMatchingSuperRegClass(SrcRC, DstRC, SrcSub); in setRegisters()
1430 NewRC = TRI->getMatchingSuperRegClass(NewRC, DefRC, NewIdx); in reMaterializeTrivialDef()
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| H A D | TwoAddressInstructionPass.cpp | 1505 assert(TRI->getMatchingSuperRegClass(RC, MRI->getRegClass(RegA), in processTiedPairs()
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| H A D | MachineInstr.cpp | 911 CurRC = TRI->getMatchingSuperRegClass(CurRC, OpRC, SubIdx); in getRegClassConstraintEffect()
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| H A D | MachineVerifier.cpp | 2149 DRC = TRI->getMatchingSuperRegClass(SuperRC, DRC, SubIdx); in visitMachineOperand()
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| /llvm-project-15.0.7/llvm/include/llvm/CodeGen/ |
| H A D | TargetRegisterInfo.h | 599 getMatchingSuperRegClass(const TargetRegisterClass *A,
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| /llvm-project-15.0.7/llvm/lib/Target/AMDGPU/ |
| H A D | SIInstrInfo.h | 1194 return RC == TRI->getMatchingSuperRegClass(RC, &TRC, P.SubReg); in isOfRegClass()
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| H A D | SIRegisterInfo.cpp | 2733 getMatchingSuperRegClass(SuperRC, SubRC, SubIdx); in getCompatibleSubRegClass()
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| H A D | SIInstrInfo.cpp | 4958 DRC = RI.getMatchingSuperRegClass(SuperRC, DRC, MO.getSubReg()); in isLegalRegOperand()
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| /llvm-project-15.0.7/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | InstrEmitter.cpp | 658 TRI->getMatchingSuperRegClass(RC, TRC, SubIdx); in EmitRegSequence()
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