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Searched refs:getInstructionIndex (Results 1 – 25 of 44) sorted by relevance

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/llvm-project-15.0.7/llvm/lib/Target/WebAssembly/
H A DWebAssemblyRegStackify.cpp274 LIS.getInstructionIndex(*Insert))) in getVRegDef()
292 LI.getVNInfoAt(LIS.getInstructionIndex(*Def).getRegSlot()); in hasOneUse()
295 const auto &Result = LI.Query(LIS.getInstructionIndex(*I.getParent())); in hasOneUse()
438 VNInfo *OneUseVNI = LI.getVNInfoBefore(LIS.getInstructionIndex(*OneUseInst)); in oneUseDominatesOtherUses()
445 VNInfo *UseVNI = LI.getVNInfoBefore(LIS.getInstructionIndex(*UseInst)); in oneUseDominatesOtherUses()
544 LI.removeSegment(LIS.getInstructionIndex(*Def).getRegSlot(), in moveForSingleUse()
545 LIS.getInstructionIndex(*Op.getParent()).getRegSlot(), in moveForSingleUse()
587 IsDead = !LI.liveAt(LIS.getInstructionIndex(Def).getDeadSlot()); in rematerializeCheapDef()
594 SlotIndex Idx = LIS.getInstructionIndex(Def).getRegSlot(); in rematerializeCheapDef()
653 SlotIndex DefIdx = LIS.getInstructionIndex(*Def).getRegSlot(); in moveAndTeeForMultiUse()
H A DWebAssemblyMemIntrinsicResults.cpp94 SlotIndex FromIdx = LIS.getInstructionIndex(MI).getRegSlot(); in replaceDominatedUses()
108 SlotIndex WhereIdx = LIS.getInstructionIndex(*Where); in replaceDominatedUses()
H A DWebAssemblyOptimizeLiveIntervals.cpp117 LIS.removeVRegDefAt(LI, LIS.getInstructionIndex(MI).getRegSlot()); in runOnMachineFunction()
/llvm-project-15.0.7/llvm/lib/Target/AMDGPU/
H A DSIOptimizeExecMaskingPreRA.cpp93 SlotIndex AndIdx = LIS->getInstructionIndex(And).getRegSlot(); in isDefBetween()
94 SlotIndex SelIdx = LIS->getInstructionIndex(Sel).getRegSlot(); in isDefBetween()
189 SlotIndex SelIdx = LIS->getInstructionIndex(*Sel); in optimizeVcndVcmpPair()
219 SlotIndex CmpIdx = LIS->getInstructionIndex(*Cmp); in optimizeVcndVcmpPair()
350 SlotIndex StartIdx = LIS->getInstructionIndex(SaveExecMI); in optimizeElseBranch()
351 SlotIndex EndIdx = LIS->getInstructionIndex(*AndExecMI); in optimizeElseBranch()
H A DGCNRegPressure.h217 auto SI = SII.getInstructionIndex(*I); in getLiveRegMap()
251 return getLiveRegs(LIS.getInstructionIndex(MI).getDeadSlot(), LIS, in getLiveRegsAfter()
257 return getLiveRegs(LIS.getInstructionIndex(MI).getBaseIndex(), LIS, in getLiveRegsBefore()
H A DGCNPreRAOptimizations.cpp194 if (SlotIndex::isEarlierInstr(LIS->getInstructionIndex(*Def1), in processReg()
195 LIS->getInstructionIndex(*Def0))) in processReg()
H A DGCNNSAReassign.cpp307 MinInd = MaxInd = LIS->getInstructionIndex(*MI); in runOnMachineFunction()
333 return LIS->getInstructionIndex(*C.first) < I; in runOnMachineFunction()
336 LIS->getInstructionIndex(*I->first) < MaxInd; ++I) { in runOnMachineFunction()
H A DGCNIterativeScheduler.cpp57 OS << LIS->getInstructionIndex(*I); in printRegion()
64 OS << LIS->getInstructionIndex(*I); in printRegion()
69 if (LIS) OS << LIS->getInstructionIndex(*End) << '\t'; in printRegion()
383 auto SlotIdx = LIS->getInstructionIndex(*MI).getRegSlot(); in scheduleRegion()
H A DGCNRegPressure.cpp214 auto SI = LIS.getInstructionIndex(*MO.getParent()).getBaseIndex(); in getUsedRegMask()
362 SlotIndex SI = LIS.getInstructionIndex(*NextMI).getBaseIndex(); in advanceBeforeNext()
463 const auto &SI = LIS.getInstructionIndex(*LastTrackedMI).getBaseIndex(); in isValid()
H A DSIFormMemoryClauses.cpp338 SlotIndex ClauseLiveInIdx = LIS->getInstructionIndex(MI); in runOnMachineFunction()
340 LIS->getInstructionIndex(*LastClauseInst).getNextIndex(); in runOnMachineFunction()
H A DSIWholeQuadMode.cpp320 LiveQueryResult UseLRQ = LR.Query(LIS->getInstructionIndex(UseMI)); in markDefs()
403 LiveQueryResult LRQ = LR.Query(LIS->getInstructionIndex(*MI)); in markDefs()
459 const VNInfo *Value = LR.Query(LIS->getInstructionIndex(MI)).valueIn(); in markOperand()
1102 SlotIndex FirstIdx = First != MBBE ? LIS->getInstructionIndex(*First) in prepareInsertion()
1105 Last != MBBE ? LIS->getInstructionIndex(*Last) : LIS->getMBBEndIdx(&MBB); in prepareInsertion()
1125 SlotIndex Next = LIS->getInstructionIndex(*NextI); in prepareInsertion()
/llvm-project-15.0.7/llvm/lib/CodeGen/
H A DLiveRangeEdit.cpp166 DefIdx = LIS.getInstructionIndex(*RM.OrigMI); in canRematerializeAt()
227 if (!allUsesAvailableAt(DefMI, LIS.getInstructionIndex(*DefMI), in foldAsLoad()
228 LIS.getInstructionIndex(*UseMI))) in foldAsLoad()
262 SlotIndex Idx = LIS.getInstructionIndex(MI).getRegSlot(); in useIsKill()
278 SlotIndex Idx = LIS.getInstructionIndex(*MI).getRegSlot(); in eliminateDeadDef()
H A DRenameIndependentSubregs.cpp189 SlotIndex Pos = LIS->getInstructionIndex(*MO.getParent()); in findComponents()
223 SlotIndex Pos = LIS->getInstructionIndex(*MI); in rewriteOperands()
355 SlotIndex Pos = LIS->getInstructionIndex(*MO.getParent()); in computeMainRangesFixFlags()
360 SlotIndex Pos = LIS->getInstructionIndex(*MO.getParent()).getDeadSlot(); in computeMainRangesFixFlags()
H A DLiveIntervals.cpp237 RegMaskSlots.push_back(Indexes->getInstructionIndex(MI).getRegSlot()); in computeRegMasks()
248 Indexes->getInstructionIndex(MBB.back()).getRegSlot()); in computeRegMasks()
473 SlotIndex Idx = getInstructionIndex(UseMI).getRegSlot(); in shrinkToUses()
578 SlotIndex Idx = getInstructionIndex(*UseMI).getRegSlot(); in shrinkToUses()
879 SlotIndex(getInstructionIndex(startInst).getRegSlot()), in addSegmentToEndOfBlock()
1494 SlotIndex Idx = Indexes->getInstructionIndex(*MII); in findLastUseBefore()
1517 SlotIndex OldIndex = Indexes->getInstructionIndex(MI); in handleMove()
1541 SlotIndex OldIndex = Indexes->getInstructionIndex(*I, true); in handleMoveIntoNewBundle()
1552 const SlotIndex Index = getInstructionIndex(BundleStart); in handleMoveIntoNewBundle()
1589 SlotIndex instrIdx = getInstructionIndex(MI); in repairOldRegInRange()
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H A DLiveIntervalCalc.cpp37 Indexes.getInstructionIndex(MI).getRegSlot(MO.isEarlyClobber()); in createDeadDef()
189 UseIdx = Indexes->getInstructionIndex(*MI).getRegSlot(isEarlyClobber); in extendToUses()
H A DRegisterCoalescer.cpp895 SlotIndex UseIdx = LIS->getInstructionIndex(*UseMI); in removeCopyByCommutingDef()
1294 SlotIndex CopyIdx = LIS->getInstructionIndex(*CopyMI); in reMaterializeTrivialDef()
1465 SlotIndex CurrIdx = LIS->getInstructionIndex(NewMI); in reMaterializeTrivialDef()
1491 SlotIndex CurrIdx = LIS->getInstructionIndex(NewMI); in reMaterializeTrivialDef()
1544 SlotIndex NewMIIdx = LIS->getInstructionIndex(NewMI); in reMaterializeTrivialDef()
1558 SlotIndex NewMIIdx = LIS->getInstructionIndex(NewMI); in reMaterializeTrivialDef()
1624 SlotIndex Idx = LIS->getInstructionIndex(*CopyMI); in eliminateUndefCopy()
1685 SlotIndex UseIdx = LIS->getInstructionIndex(MI); in eliminateUndefCopy()
1815 : LIS->getInstructionIndex(*UseMI); in updateRegDefsUses()
1830 dbgs() << LIS->getInstructionIndex(*UseMI) << "\t"; in updateRegDefsUses()
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H A DInlineSpiller.cpp379 SlotIndex Idx = LIS.getInstructionIndex(CopyMI); in hoistSpillInsideBB()
464 SlotIndex Idx = LIS.getInstructionIndex(MI); in eliminateRedundantSpills()
574 SlotIndex UseIdx = LIS.getInstructionIndex(MI).getRegSlot(true); in reMaterializeFor()
780 SlotIndex Idx = LIS.getInstructionIndex(*I).getRegSlot(); in dumpMachineInstrRangeWithSlotIndex()
908 SlotIndex Idx = LIS.getInstructionIndex(*MI).getRegSlot(); in foldMemoryOperand()
1091 SlotIndex Idx = LIS.getInstructionIndex(MI).getRegSlot(); in spillAroundUses()
1241 SlotIndex Idx = LIS.getInstructionIndex(Spill); in addToMergeableSpills()
1254 SlotIndex Idx = LIS.getInstructionIndex(Spill); in rmFromMergeableSpills()
1302 SlotIndex PIdx = LIS.getInstructionIndex(*PrevSpill); in rmRedundantSpills()
1303 SlotIndex CIdx = LIS.getInstructionIndex(*CurrentSpill); in rmRedundantSpills()
H A DSlotIndexes.cpp187 startIdx = getInstructionIndex(*--Begin); in repairIndexesInRange()
193 endIdx = getInstructionIndex(*End); in repairIndexesInRange()
H A DRegisterPressure.cpp315 return LIS->getInstructionIndex(*IdxPos).getRegSlot(); in getCurrSlot()
583 SlotIndex SlotIdx = LIS.getInstructionIndex(MI); in detectDeadDefs()
801 SlotIdx = LIS->getInstructionIndex(*CurrPos).getRegSlot(); in recede()
867 SlotIdx = LIS->getInstructionIndex(*CurrPos).getRegSlot(); in recedeSkipDebugValues()
887 SlotIndex SlotIdx = LIS->getInstructionIndex(*CurrPos).getRegSlot(); in recede()
1048 SlotIdx = LIS->getInstructionIndex(*MI).getRegSlot(); in bumpUpwardPressure()
1233 SlotIndex InstSlot = LIS->getInstructionIndex(*MI).getRegSlot(); in findUseBetween()
1289 SlotIdx = LIS->getInstructionIndex(*MI).getRegSlot(); in bumpDownwardPressure()
H A DStackColoring.cpp784 LLVM_DEBUG(Indexes->getInstructionIndex(MI).print(dbgs())); in collectMarkers()
883 SlotIndex ThisIndex = Indexes->getInstructionIndex(MI); in calculateLiveIntervals()
1062 SlotIndex Index = Indexes->getInstructionIndex(I); in remapInstructions()
1183 SlotIndex Index = Indexes->getInstructionIndex(I); in removeInvalidSlotRanges()
H A DVirtRegMap.cpp391 SlotIndex BaseIndex = LIS->getInstructionIndex(MI); in readsUndefSubreg()
514 SlotIndex MIIndex = LIS->getInstructionIndex(MI); in subRegLiveThrough()
/llvm-project-15.0.7/llvm/lib/Transforms/Utils/
H A DPromoteMemoryToRegister.cpp194 unsigned getInstructionIndex(const Instruction *I) { in getInstructionIndex() function in __anon7bf1eae50111::LargeBlockInfo
381 StoreIndex = LBI.getInstructionIndex(OnlyStore); in rewriteSingleStoreAlloca()
383 if (unsigned(StoreIndex) > LBI.getInstructionIndex(LI)) { in rewriteSingleStoreAlloca()
471 StoresByIndex.push_back(std::make_pair(LBI.getInstructionIndex(SI), SI)); in promoteSingleBlockAlloca()
484 unsigned LoadIdx = LBI.getInstructionIndex(LI); in promoteSingleBlockAlloca()
/llvm-project-15.0.7/llvm/include/llvm/CodeGen/
H A DLiveIntervals.h220 SlotIndex getInstructionIndex(const MachineInstr &Instr) const { in getInstructionIndex() function
221 return Indexes->getInstructionIndex(Instr); in getInstructionIndex()
H A DSlotIndexes.h384 SlotIndex getInstructionIndex(const MachineInstr &MI,
620 : getInstructionIndex(mbb->front()).listEntry();
/llvm-project-15.0.7/llvm/test/CodeGen/AMDGPU/
H A Dregcoalesce-dbg.mir4 # LIS->getInstructionIndex with a DBG_VALUE instruction, which does not have

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