| /llvm-project-15.0.7/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | LegalizeDAG.cpp | 330 SDValue Result = DAG.getExtLoad( in ExpandConstantFP() 751 SDValue Result = DAG.getExtLoad(NewExtType, dl, Node->getValueType(0), in LegalizeLoadOps() 791 Lo = DAG.getExtLoad(ISD::ZEXTLOAD, dl, Node->getValueType(0), Chain, Ptr, in LegalizeLoadOps() 798 Hi = DAG.getExtLoad(ExtType, dl, Node->getValueType(0), Chain, Ptr, in LegalizeLoadOps() 819 Hi = DAG.getExtLoad(ExtType, dl, Node->getValueType(0), Chain, Ptr, in LegalizeLoadOps() 826 Lo = DAG.getExtLoad(ISD::ZEXTLOAD, dl, Node->getValueType(0), Chain, Ptr, in LegalizeLoadOps() 888 SDValue Load = DAG.getExtLoad(MidExtType, dl, LoadVT, Chain, Ptr, in LegalizeLoadOps() 906 SDValue Result = DAG.getExtLoad(ISD::ZEXTLOAD, dl, ILoadVT, Chain, in LegalizeLoadOps() 925 SDValue Result = DAG.getExtLoad(ISD::EXTLOAD, dl, in LegalizeLoadOps() 2513 SDValue Load = DAG.getExtLoad( in ExpandLegalINT_TO_FP() [all …]
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| H A D | DAGCombiner.cpp | 1282 return DAG.getExtLoad(ExtType, DL, PVT, in PromoteOperand() 1518 SDValue NewLD = DAG.getExtLoad(ExtType, DL, PVT, in PromoteLoad() 11556 SDValue SplitLoad = DAG.getExtLoad( in CombineExtLoad() 11632 SDValue ExtLoad = DAG.getExtLoad(ISD::ZEXTLOAD, SDLoc(Load), VT, in CombineZExtLogicopShiftLoad() 12585 SDValue ExtLoad = DAG.getExtLoad(ExtType, SDLoc(N), in visitANY_EXTEND() 13081 SDValue ExtLoad = DAG.getExtLoad(ISD::SEXTLOAD, SDLoc(N), VT, in visitSIGN_EXTEND_INREG() 13098 SDValue ExtLoad = DAG.getExtLoad(ISD::SEXTLOAD, SDLoc(N), VT, in visitSIGN_EXTEND_INREG() 15838 SDValue ExtLoad = DAG.getExtLoad(ISD::EXTLOAD, SDLoc(N), VT, in visitFP_EXTEND() 16848 SDValue NewLoad = DAG.getExtLoad( in visitLOAD() 18770 NewLoad = DAG.getExtLoad(ISD::EXTLOAD, LoadDL, ExtendedTy, in tryStoreMergeOfLoads() [all …]
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| H A D | TargetLowering.cpp | 8235 DAG.getExtLoad(ISD::EXTLOAD, SL, LoadVT, Chain, BasePTR, in scalarizeVectorLoad() 8271 DAG.getExtLoad(ExtType, SL, DstEltVT, Chain, BasePTR, in scalarizeVectorLoad() 8439 DAG.getExtLoad(ISD::EXTLOAD, dl, RegVT, Chain, Ptr, in expandUnalignedLoad() 8454 Load = DAG.getExtLoad(LD->getExtensionType(), dl, VT, TF, StackBase, in expandUnalignedLoad() 8483 Lo = DAG.getExtLoad(ISD::ZEXTLOAD, dl, VT, Chain, Ptr, LD->getPointerInfo(), in expandUnalignedLoad() 8488 Hi = DAG.getExtLoad(HiExtType, dl, VT, Chain, Ptr, in expandUnalignedLoad() 8493 Hi = DAG.getExtLoad(HiExtType, dl, VT, Chain, Ptr, LD->getPointerInfo(), in expandUnalignedLoad() 8498 Lo = DAG.getExtLoad(ISD::ZEXTLOAD, dl, VT, Chain, Ptr, in expandUnalignedLoad() 8597 SDValue Load = DAG.getExtLoad( in expandUnalignedStore()
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| H A D | LegalizeIntegerTypes.cpp | 772 SDValue Res = DAG.getExtLoad(ExtType, dl, NVT, N->getChain(), N->getBasePtr(), in PromoteIntRes_LOAD() 3545 Lo = DAG.getExtLoad(ExtType, dl, NVT, Ch, Ptr, N->getPointerInfo(), MemVT, in ExpandIntRes_LOAD() 3578 Hi = DAG.getExtLoad(ExtType, dl, NVT, Ch, Ptr, in ExpandIntRes_LOAD() 3595 Hi = DAG.getExtLoad(ExtType, dl, NVT, Ch, Ptr, N->getPointerInfo(), in ExpandIntRes_LOAD() 3603 Lo = DAG.getExtLoad(ISD::ZEXTLOAD, dl, NVT, Ch, Ptr, in ExpandIntRes_LOAD()
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| H A D | LegalizeVectorTypes.cpp | 3085 return DAG.getExtLoad( in SplitVecOp_EXTRACT_VECTOR_ELT() 6532 DAG.getExtLoad(ExtType, dl, EltVT, Chain, BasePtr, LD->getPointerInfo(), in GenWidenVectorExtLoads() 6539 Ops[i] = DAG.getExtLoad(ExtType, dl, EltVT, Chain, NewBasePtr, in GenWidenVectorExtLoads()
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| H A D | LegalizeFloatTypes.cpp | 1648 Hi = DAG.getExtLoad(LD->getExtensionType(), dl, NVT, Chain, Ptr, in ExpandFloatRes_LOAD()
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| H A D | SelectionDAG.cpp | 6884 Value = DAG.getExtLoad( in getMemcpyLoadsAndStores() 7841 SDValue SelectionDAG::getExtLoad(ISD::LoadExtType ExtType, const SDLoc &dl, in getExtLoad() function in SelectionDAG 7852 SDValue SelectionDAG::getExtLoad(ISD::LoadExtType ExtType, const SDLoc &dl, in getExtLoad() function in SelectionDAG
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| /llvm-project-15.0.7/llvm/include/llvm/CodeGen/ |
| H A D | SelectionDAG.h | 1232 getExtLoad(ISD::LoadExtType ExtType, const SDLoc &dl, EVT VT, SDValue Chain, 1239 getExtLoad(ISD::LoadExtType ExtType, const SDLoc &dl, EVT VT, SDValue Chain, 1244 return getExtLoad(ExtType, dl, VT, Chain, Ptr, PtrInfo, MemVT, 1247 SDValue getExtLoad(ISD::LoadExtType ExtType, const SDLoc &dl, EVT VT,
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| /llvm-project-15.0.7/llvm/lib/Target/XCore/ |
| H A D | XCoreISelLowering.cpp | 444 SDValue Low = DAG.getExtLoad(ISD::ZEXTLOAD, DL, MVT::i32, Chain, BasePtr, in LowerLOAD() 450 DAG.getExtLoad(ISD::EXTLOAD, DL, MVT::i32, Chain, HighAddr, in LowerLOAD() 952 return DAG.getExtLoad(ISD::EXTLOAD, SDLoc(Op), MVT::i32, N->getChain(), in LowerATOMIC_LOAD() 958 return DAG.getExtLoad(ISD::EXTLOAD, SDLoc(Op), MVT::i32, N->getChain(), in LowerATOMIC_LOAD()
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| /llvm-project-15.0.7/llvm/lib/Target/CSKY/ |
| H A D | CSKYISelLowering.cpp | 273 Val = DAG.getExtLoad( in unpackFromMemLoc()
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| /llvm-project-15.0.7/llvm/lib/Target/AMDGPU/ |
| H A D | AMDGPUISelLowering.cpp | 1466 SDValue LoLoad = DAG.getExtLoad(Load->getExtensionType(), SL, LoVT, in SplitVectorLoad() 1471 DAG.getExtLoad(Load->getExtensionType(), SL, HiVT, Load->getChain(), in SplitVectorLoad() 1518 SDValue WideLoad = DAG.getExtLoad( in WidenOrSplitVectorLoad()
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| H A D | R600ISelLowering.cpp | 1363 SDValue NewLoad = DAG.getExtLoad( in LowerLOAD()
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| H A D | SIISelLowering.cpp | 1796 ArgValue = DAG.getExtLoad( in lowerStackParameter() 8626 SDValue NewLD = DAG.getExtLoad(ISD::EXTLOAD, DL, MVT::i32, Chain, in LowerLOAD()
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| /llvm-project-15.0.7/llvm/lib/Target/PowerPC/ |
| H A D | PPCISelLowering.cpp | 3589 SDValue GprIndex = DAG.getExtLoad(ISD::ZEXTLOAD, dl, MVT::i32, InChain, in LowerVAARG() 3611 SDValue FprIndex = DAG.getExtLoad(ISD::ZEXTLOAD, dl, MVT::i32, InChain, in LowerVAARG() 6221 SDValue Load = DAG.getExtLoad(ISD::EXTLOAD, dl, PtrVT, Chain, Arg, in LowerCall_64SVR4() 6293 SDValue Load = DAG.getExtLoad(ISD::EXTLOAD, dl, PtrVT, Chain, AddArg, in LowerCall_64SVR4() 7290 return DAG.getExtLoad( in LowerCall_AIX() 7769 DAG.getExtLoad(ISD::EXTLOAD, dl, getPointerTy(DAG.getDataLayout()), Chain, in LowerLOAD()
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| /llvm-project-15.0.7/llvm/lib/Target/Sparc/ |
| H A D | SparcISelLowering.cpp | 3537 SDValue LoadRes = DAG.getExtLoad( in ReplaceNodeResults()
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| /llvm-project-15.0.7/llvm/lib/Target/SystemZ/ |
| H A D | SystemZISelLowering.cpp | 2322 C.Op0 = DAG.getExtLoad(ExtType, SDLoc(Load), MVT::i32, Load->getChain(), in adjustSubwordCmp() 4158 return DAG.getExtLoad(ISD::EXTLOAD, SDLoc(Op), Op.getValueType(), in lowerATOMIC_LOAD()
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| /llvm-project-15.0.7/llvm/lib/Target/Mips/ |
| H A D | MipsISelLowering.cpp | 4450 SDValue LoadVal = DAG.getExtLoad( in passByValArg()
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| /llvm-project-15.0.7/llvm/lib/Target/ARM/ |
| H A D | ARMISelLowering.cpp | 9382 return DAG.getExtLoad(LD->getExtensionType(), SDLoc(LD), ExtendedTy, in SkipLoadExtensionForVMULL() 9993 SDValue Load = DAG.getExtLoad( in LowerPredicateLoad() 14982 DAG.getExtLoad(ISD::ZEXTLOAD, SDLoc(N), VT, LN0->getChain(), in PerformVMOVrhCombine() 18572 SDValue Load = DAG.getExtLoad( in PerformMVEExtCombine()
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| /llvm-project-15.0.7/llvm/lib/Target/X86/ |
| H A D | X86ISelDAGToDAG.cpp | 1318 SDValue Result = CurDAG->getExtLoad(ISD::EXTLOAD, dl, DstVT, Store, in PreprocessISelDAG()
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| H A D | X86ISelLowering.cpp | 20628 IDX = DAG.getExtLoad(ISD::ZEXTLOAD, dl, PtrVT, Chain, IDX, in LowerGlobalTLSAddress() 21611 SDValue Fudge = DAG.getExtLoad( in LowerUINT_TO_FP() 54737 SDValue Load = DAG.getExtLoad( in combineEXTEND_VECTOR_INREG()
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| /llvm-project-15.0.7/llvm/lib/Target/RISCV/ |
| H A D | RISCVISelLowering.cpp | 2667 V = DAG.getExtLoad(ISD::SEXTLOAD, DL, XLenVT, Ld->getChain(), NewAddr, in lowerVECTOR_SHUFFLE() 10727 Val = DAG.getExtLoad( in unpackFromMemLoc()
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| /llvm-project-15.0.7/llvm/lib/Target/AArch64/ |
| H A D | AArch64ISelLowering.cpp | 5935 DAG.getExtLoad(ExtType, DL, VA.getLocVT(), Chain, FIN, in LowerFormalArguments() 19418 SDValue ExtLoad = DAG.getExtLoad(ISD::EXTLOAD, SDLoc(N), VT, in performFPExtendCombine()
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