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Searched refs:getDefIgnoringCopies (Results 1 – 12 of 12) sorted by relevance

/llvm-project-15.0.7/llvm/lib/Target/AMDGPU/
H A DAMDGPURegBankCombiner.cpp279 MachineInstr *Src0 = getDefIgnoringCopies(MI.getOperand(2).getReg(), MRI); in matchFPMed3ToClamp()
280 MachineInstr *Src1 = getDefIgnoringCopies(MI.getOperand(3).getReg(), MRI); in matchFPMed3ToClamp()
281 MachineInstr *Src2 = getDefIgnoringCopies(MI.getOperand(4).getReg(), MRI); in matchFPMed3ToClamp()
295 MachineInstr *Op3 = getDefIgnoringCopies(MI.getOperand(4).getReg(), MRI); in matchFPMed3ToClamp()
H A DAMDGPUGlobalISelUtils.cpp20 MachineInstr *Def = getDefIgnoringCopies(Reg, MRI); in getBaseWithConstantOffset()
H A DAMDGPUInstructionSelector.cpp652 MachineInstr *Src1Def = getDefIgnoringCopies(Src1, *MRI); in selectG_BUILD_VECTOR_TRUNC()
1411 MachineInstr *OffsetDef = getDefIgnoringCopies(BaseOffset, *MRI); in selectDSGWSIntrinsic()
1427 OffsetDef = getDefIgnoringCopies(BaseOffset, *MRI); in selectDSGWSIntrinsic()
3244 const MachineInstr *Def = getDefIgnoringCopies(Reg, MRI); in matchZeroExtendFromS32()
3585 MachineInstr *MI = getDefIgnoringCopies(Src, *MRI); in selectVOP3ModsImpl()
3590 MI = getDefIgnoringCopies(Src, *MRI); in selectVOP3ModsImpl()
3692 const MachineInstr *Def = getDefIgnoringCopies(Reg, *MRI); in selectVOP3NoMods()
4541 MachineInstr *RootI = getDefIgnoringCopies(Root, MRI); in getPtrBaseWithConstantOffset()
4644 Data.N2 = getDefIgnoringCopies(Data.N2, *MRI)->getOperand(0).getReg(); in parseMUBUFAddress()
4645 Data.N3 = getDefIgnoringCopies(Data.N3, *MRI)->getOperand(0).getReg(); in parseMUBUFAddress()
H A DAMDGPURegisterBankInfo.cpp1237 MachineInstr *Def = getDefIgnoringCopies(Reg, MRI); in getSrcRegIgnoringCopies()
/llvm-project-15.0.7/llvm/include/llvm/CodeGen/GlobalISel/
H A DUtils.h235 MachineInstr *getDefIgnoringCopies(Register Reg,
252 MachineInstr *DefMI = getDefIgnoringCopies(Reg, MRI); in getOpcodeDef()
H A DLegalizationArtifactCombiner.h727 MachineInstr *Def = getDefIgnoringCopies(DefReg, MRI); in findValueFromDefImpl()
819 MachineInstr *SrcDef = getDefIgnoringCopies(SrcReg, MRI); in tryCombineUnmergeValues()
884 MergeI = getDefIgnoringCopies(SrcDef->getOperand(1).getReg(), MRI); in tryCombineUnmergeValues()
/llvm-project-15.0.7/llvm/lib/CodeGen/GlobalISel/
H A DUtils.cpp459 MachineInstr *llvm::getDefIgnoringCopies(Register Reg, in getDefIgnoringCopies() function in llvm
475 MachineInstr *DefMI = getDefIgnoringCopies(Reg, MRI); in getOpcodeDef()
1024 MachineInstr *MI = getDefIgnoringCopies(VReg, MRI); in getAnyConstantSplat()
1245 const MachineInstr *Def = getDefIgnoringCopies(Reg, MRI); in matchUnaryPredicate()
1258 const MachineInstr *SrcDef = getDefIgnoringCopies(SrcElt, MRI); in matchUnaryPredicate()
H A DLoadStoreOpt.cpp152 auto *Base0Def = getDefIgnoringCopies(BasePtr0.BaseReg, MRI); in aliasIsKnownForLoadStore()
153 auto *Base1Def = getDefIgnoringCopies(BasePtr1.BaseReg, MRI); in aliasIsKnownForLoadStore()
H A DCombinerHelper.cpp986 MachineInstr *BaseDef = getDefIgnoringCopies(Base, MRI); in findPreIndexCandidate()
2652 MachineInstr *LeftHandInst = getDefIgnoringCopies(LHSReg, MRI); in matchHoistLogicOpWithSameOpcodeHands()
2653 MachineInstr *RightHandInst = getDefIgnoringCopies(RHSReg, MRI); in matchHoistLogicOpWithSameOpcodeHands()
3847 auto *DefMI = getDefIgnoringCopies(MI.getOperand(Idx).getReg(), MRI); in matchExtendThroughPhis()
3855 InSrcs.insert(getDefIgnoringCopies(MI.getOperand(Idx).getReg(), MRI)); in matchExtendThroughPhis()
4674 MachineInstr *LHSInst = getDefIgnoringCopies(AndLHS, MRI); in matchNarrowBinopFeedingAnd()
5581 auto *TrueDef = getDefIgnoringCopies(TrueReg, MRI); in matchSelectToLogical()
5582 auto *FalseDef = getDefIgnoringCopies(FalseReg, MRI); in matchSelectToLogical()
H A DCallLowering.cpp990 MachineInstr *RegDef = getDefIgnoringCopies(OutInfo.Regs[0], MRI); in parametersInCSRMatch()
/llvm-project-15.0.7/llvm/lib/Target/AArch64/GISel/
H A DAArch64PostLegalizerLowering.cpp767 MachineInstr *Def = getDefIgnoringCopies(CmpOp, MRI); in getCmpOperandFoldingProfit()
782 getDefIgnoringCopies(Def->getOperand(1).getReg(), MRI); in getCmpOperandFoldingProfit()
824 MachineInstr *Def = getDefIgnoringCopies(Reg, MRI); in trySwapICmpOperands()
H A DAArch64InstructionSelector.cpp1364 while (MachineInstr *MI = getDefIgnoringCopies(Reg, MRI)) { in getTestBitReg()
5078 MachineInstr *LHSDef = getDefIgnoringCopies(LHS.getReg(), MRI); in tryFoldIntegerCompare()
5079 MachineInstr *RHSDef = getDefIgnoringCopies(RHS.getReg(), MRI); in tryFoldIntegerCompare()
6114 MachineInstr *ExtInst = getDefIgnoringCopies(OffsetReg, MRI); in selectExtendedSHL()
6178 getDefIgnoringCopies(PtrAdd->getOperand(2).getReg(), MRI); in selectAddrModeShiftedExtendXReg()
6311 MachineInstr *OffsetInst = getDefIgnoringCopies(RHS.getReg(), MRI); in selectAddrModeWRO()
6645 MachineInstr *RootDef = getDefIgnoringCopies(Root.getReg(), MRI); in selectArithExtendedRegister()
6664 MachineInstr *ExtDef = getDefIgnoringCopies(LHS.getReg(), MRI); in selectArithExtendedRegister()