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Searched refs:getAllocatableClass (Results 1 – 6 of 6) sorted by relevance

/llvm-project-15.0.7/llvm/lib/CodeGen/SelectionDAG/
H A DInstrEmitter.cpp134 RC = TRI->getAllocatableClass( in EmitCopyFromReg()
207 TRI->getAllocatableClass(TII->getRegClass(II, i, TRI, *MF)); in CreateVirtualRegisters()
330 OpRC = TRI->getAllocatableClass(OpRC); in AddRegisterOperand()
389 II ? TRI->getAllocatableClass(TII->getRegClass(*II, IIOpNum, TRI, *MF)) in AddOperand()
617 TRI->getAllocatableClass(TRI->getRegClass(DstRCIdx)); in EmitCopyToRegClassNode()
635 Register NewVReg = MRI->createVirtualRegister(TRI->getAllocatableClass(RC)); in EmitRegSequence()
/llvm-project-15.0.7/llvm/lib/CodeGen/
H A DTargetRegisterInfo.cpp195 TargetRegisterInfo::getAllocatableClass(const TargetRegisterClass *RC) const { in getAllocatableClass() function in TargetRegisterInfo
261 const TargetRegisterClass *SubClass = getAllocatableClass(RC); in getAllocatableSet()
H A DTwoAddressInstructionPass.cpp1304 TRI->getAllocatableClass( in tryInstructionTransform()
/llvm-project-15.0.7/llvm/include/llvm/CodeGen/
H A DTargetRegisterInfo.h343 getAllocatableClass(const TargetRegisterClass *RC) const;
/llvm-project-15.0.7/llvm/lib/CodeGen/GlobalISel/
H A DUtils.cpp127 OpRC = TRI.getAllocatableClass(OpRC); in constrainOperandRegClass()
/llvm-project-15.0.7/llvm/lib/Target/AMDGPU/
H A DSIRegisterInfo.cpp2927 return getAllocatableClass(RC); in getConstrainedRegClassForOperand()