| /llvm-project-15.0.7/llvm/test/Transforms/SLPVectorizer/ |
| H A D | slp-max-phi-size.ll | 228 %i1 = fmul float %i, %fval 231 %i4 = fmul float %i3, %fval 234 %i7 = fmul float %i6, %fval 313 %phi3 = phi float [ %i15, %bb3 ], [ %fval, %bb4 ], [ %fval, %bb5 ], [ %fval, %bb1 ] 317 %phi7 = phi float [ %i5, %bb3 ], [ %fval, %bb4 ], [ %fval, %bb5 ], [ %fval, %bb1 ] 320 %phi10 = phi float [ %i23, %bb3 ], [ %fval, %bb4 ], [ %fval, %bb5 ], [ %fval, %bb1 ] 324 %phi14 = phi float [ %i31, %bb3 ], [ %fval, %bb4 ], [ %fval, %bb5 ], [ %fval, %bb1 ] 328 %phi18 = phi float [ %i39, %bb3 ], [ %fval, %bb4 ], [ %fval, %bb5 ], [ %fval, %bb1 ] 332 %phi22 = phi float [ %i47, %bb3 ], [ %fval, %bb4 ], [ %fval, %bb5 ], [ %fval, %bb1 ] 336 %phi26 = phi float [ %i55, %bb3 ], [ %fval, %bb4 ], [ %fval, %bb5 ], [ %fval, %bb1 ] [all …]
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| /llvm-project-15.0.7/llvm/test/CodeGen/Generic/ |
| H A D | negintconst.ll | 14 ; add %i6, 1999, %o2 ! fval 27 ; ioff = 2 fval = 0xffffffff7fffec90 &fval[2] = 0xb7fffeca8 29 ; ioff = 2 fval = 0xffffffff7fffec90 &fval[2] = 0xffffffff7fffeca8 32 @fmtArg = internal global [39 x i8] c"ioff = %u\09fval = 0x%p\09&fval[2] = 0x%p\0A\00" ; <… 37 %fval = alloca %Results, i32 4 ; <%Results*> [#uses=2] 42 …%fptr = getelementptr %Results, %Results* %fval, i64 %ioff.upgrd.1 ; <%Results*> [#… 44 …call i32 (i8*, ...) @printf( i8* %castFmt, i32 %ioff, %Results* %fval, %Results* %fptr ) …
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| /llvm-project-15.0.7/llvm/lib/Target/PowerPC/ |
| H A D | PPCInstrSPE.td | 847 (SELECT_SPE4 (CREQV $lhs, $rhs), $tval, $fval)>; 857 (SELECT_SPE4 (CRXOR $lhs, $rhs), $tval, $fval)>; 860 (SELECT_SPE (CRANDC $lhs, $rhs), $tval, $fval)>; 862 (SELECT_SPE (CRANDC $rhs, $lhs), $tval, $fval)>; 864 (SELECT_SPE (CRORC $lhs, $rhs), $tval, $fval)>; 866 (SELECT_SPE (CRORC $rhs, $lhs), $tval, $fval)>; 868 (SELECT_SPE (CREQV $lhs, $rhs), $tval, $fval)>; 870 (SELECT_SPE (CRORC $rhs, $lhs), $tval, $fval)>; 872 (SELECT_SPE (CRORC $lhs, $rhs), $tval, $fval)>; 874 (SELECT_SPE (CRANDC $rhs, $lhs), $tval, $fval)>; [all …]
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| H A D | PPCInstrInfo.td | 3816 def : Pat<(i1 (select i1:$cond, i1:$tval, i1:$fval)), 3818 (CRAND (crnot $cond), $fval))>; 3821 // select (lhs == rhs), tval, fval is: 3822 // ((lhs == rhs) & tval) | (!(lhs == rhs) & fval) 3825 (CRAND (CRORC $rhs, $lhs), $fval))>; 3828 (CRAND (CRORC $lhs, $rhs), $fval))>; 3831 (CRAND (CRANDC $rhs, $lhs), $fval))>; 3834 (CRAND (CRANDC $lhs, $rhs), $fval))>; 3837 (CRAND (CRXOR $lhs, $rhs), $fval))>; 3840 (CRAND (CRANDC $lhs, $rhs), $fval))>; [all …]
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| H A D | PPCInstrVSX.td | 2607 (SELECT_VSRC (CRANDC $lhs, $rhs), $tval, $fval)>; 2609 (SELECT_VSRC (CRANDC $rhs, $lhs), $tval, $fval)>; 2611 (SELECT_VSRC (CRORC $lhs, $rhs), $tval, $fval)>; 2613 (SELECT_VSRC (CRORC $rhs, $lhs), $tval, $fval)>; 2615 (SELECT_VSRC (CREQV $lhs, $rhs), $tval, $fval)>; 2617 (SELECT_VSRC (CRORC $rhs, $lhs), $tval, $fval)>; 2619 (SELECT_VSRC (CRORC $lhs, $rhs), $tval, $fval)>; 2621 (SELECT_VSRC (CRANDC $rhs, $lhs), $tval, $fval)>; 2623 (SELECT_VSRC (CRANDC $lhs, $rhs), $tval, $fval)>; 2625 (SELECT_VSRC (CRXOR $lhs, $rhs), $tval, $fval)>; [all …]
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| /llvm-project-15.0.7/llvm/test/Transforms/DeadStoreElimination/ |
| H A D | memcpy-lifetimes.ll | 39 %fval = alloca [4 x %struct.Village*], align 16 40 %0 = bitcast [4 x %struct.Village*]* %fval to i8* 45 …%arrayidx = getelementptr inbounds [4 x %struct.Village*], [4 x %struct.Village*]* %fval, i64 0, i… 48 …%arrayidx.1 = getelementptr inbounds [4 x %struct.Village*], [4 x %struct.Village*]* %fval, i64 0,… 51 …%arrayidx.2 = getelementptr inbounds [4 x %struct.Village*], [4 x %struct.Village*]* %fval, i64 0,… 54 …%arrayidx.3 = getelementptr inbounds [4 x %struct.Village*], [4 x %struct.Village*]* %fval, i64 0,…
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| /llvm-project-15.0.7/clang/test/Sema/ |
| H A D | atomic-expr.c | 90 float fval; in func_16() member 93 …yp->fval = 1.2f; // expected-error {{accessing a member of an atomic structure or union is undefin… in func_16()
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| /llvm-project-15.0.7/polly/test/DeLICM/ |
| H A D | reduction_looprotate_undef.ll | 36 %fval = sitofp i32 %phi to double 37 %add = fadd double %fval, 4.2
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| /llvm-project-15.0.7/clang-tools-extra/test/clang-tidy/checkers/cppcoreguidelines/ |
| H A D | init-variables.cpp | 59 float fval = 85.0; in init_unit_tests() local
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| /llvm-project-15.0.7/llvm/test/Transforms/PhaseOrdering/ |
| H A D | vector-select.ll | 79 define <4 x i8> @allSignBits_vec(<4 x i8> %cond, <4 x i8> %tval, <4 x i8> %fval) { 88 %a2 = and <4 x i8> %fval, %not_bitmask
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| /llvm-project-15.0.7/mlir/test/Dialect/SCF/ |
| H A D | canonicalize.mlir | 1194 // CHECK-NEXT: %[[fval:.+]] = "test.secondCodeFalse"() : () -> i32 1195 // CHECK-NEXT: scf.yield %[[fval0]], %[[fval]] : i32, i32 1220 // CHECK-NEXT: %[[fval:.+]] = "test.secondCodeFalse"() : () -> i32 1221 // CHECK-NEXT: scf.yield %[[fval]] : i32 1246 // CHECK-NEXT: %[[fval:.+]] = "test.firstCodeFalse"() : () -> i32 1247 // CHECK-NEXT: scf.yield %[[fval]] : i32 1294 // CHECK-NEXT: %[[fval:.+]] = "test.secondCodeFalse"(%[[fval0]]) : (i32) -> i32 1295 // CHECK-NEXT: scf.yield %[[fval0]], %[[fval]] : i32, i32
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| /llvm-project-15.0.7/llvm/test/CodeGen/AMDGPU/GlobalISel/ |
| H A D | llvm.amdgcn.struct.buffer.load.format.ll | 213 %fval = bitcast i32 %val to float 214 ret float %fval
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| H A D | llvm.amdgcn.struct.buffer.load.format.f16.ll | 373 %fval = bitcast i16 %val to half 374 ret half %fval
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| /llvm-project-15.0.7/llvm/test/Transforms/InstCombine/ |
| H A D | logical-select-inseltpoison.ll | 583 define i32 @allSignBits(i32 %cond, i32 %tval, i32 %fval) { 595 %a2 = and i32 %not_bitmask, %fval 600 define <4 x i8> @allSignBits_vec(<4 x i8> %cond, <4 x i8> %tval, <4 x i8> %fval) { 612 %a2 = and <4 x i8> %fval, %not_bitmask
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| H A D | logical-select.ll | 615 define i32 @allSignBits(i32 %cond, i32 %tval, i32 %fval) { 627 %a2 = and i32 %not_bitmask, %fval 632 define <4 x i8> @allSignBits_vec(<4 x i8> %cond, <4 x i8> %tval, <4 x i8> %fval) { 644 %a2 = and <4 x i8> %fval, %not_bitmask
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| H A D | vec_demanded_elts.ll | 711 %fval = shufflevector <4 x float> %y, <4 x float> %x, <4 x i32> <i32 0, i32 7, i32 6, i32 undef> 713 %r = select <4 x i1> %cond, <4 x float> %tval, <4 x float> %fval
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| H A D | vec_demanded_elts-inseltpoison.ll | 711 %fval = shufflevector <4 x float> %y, <4 x float> %x, <4 x i32> <i32 0, i32 7, i32 6, i32 undef> 713 %r = select <4 x i1> %cond, <4 x float> %tval, <4 x float> %fval
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| /llvm-project-15.0.7/llvm/lib/Target/AArch64/ |
| H A D | AArch64InstrInfo.td | 2313 (CSINVWr GPR32:$tval, GPR32:$fval, (i32 imm:$cc))>; 2315 (CSINVXr GPR64:$tval, GPR64:$fval, (i32 imm:$cc))>; 2317 (CSNEGWr GPR32:$tval, GPR32:$fval, (i32 imm:$cc))>; 2319 (CSNEGXr GPR64:$tval, GPR64:$fval, (i32 imm:$cc))>; 2321 (CSINCWr GPR32:$tval, GPR32:$fval, (i32 imm:$cc))>; 2323 (CSINCXr GPR64:$tval, GPR64:$fval, (i32 imm:$cc))>; 2333 def : Pat<(AArch64csel (i32 1), GPR32:$fval, (i32 imm:$cc), NZCV), 2334 (CSINCWr GPR32:$fval, WZR, (i32 (inv_cond_XFORM imm:$cc)))>; 2335 def : Pat<(AArch64csel (i64 1), GPR64:$fval, (i32 imm:$cc), NZCV), 2345 def : Pat<(AArch64csel (i32 -1), GPR32:$fval, (i32 imm:$cc), NZCV), [all …]
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| /llvm-project-15.0.7/mlir/lib/Dialect/SparseTensor/Transforms/ |
| H A D | Sparsification.cpp | 749 Value fval = constantI1(builder, loc, false); in genInsertionStore() local 754 filled, fval); in genInsertionStore()
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| /llvm-project-15.0.7/llvm/lib/Target/ARM/ |
| H A D | ARMInstrThumb2.td | 5623 def : T2Pat<(Node GPRwithZR:$tval, GPRwithZR:$fval, imm0_31:$imm), 5624 (Insn GPRwithZR:$tval, GPRwithZR:$fval, imm0_31:$imm)>; 5625 def : T2Pat<(Node (i32 0), GPRwithZR:$fval, imm0_31:$imm), 5626 (Insn ZR, GPRwithZR:$fval, imm0_31:$imm)>; 5648 (Insn GPRwithZR:$tval, GPRwithZR:$fval, imm0_31:$imm)>; 5650 (Insn GPRwithZR:$tval, GPRwithZR:$fval, 5653 defm : ModifiedV8_1CSEL<t2CSINC, (add rGPR:$fval, 1)>; 5654 defm : ModifiedV8_1CSEL<t2CSINV, (xor rGPR:$fval, -1)>; 5655 defm : ModifiedV8_1CSEL<t2CSNEG, (sub 0, rGPR:$fval)>;
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| /llvm-project-15.0.7/llvm/docs/ |
| H A D | SourceLevelDebugging.rst | 445 %fval = add i32 %bar, 2 446 call @llvm.dbg.value(metadata i32 %fval, metadata !1, metadata !2) 450 %merge = phi [ %tval, %truebr ], [ %fval, %falsebr ] 477 (%tval, %fval, %merge) optimized out. Assuming we cannot recover them, we
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| /llvm-project-15.0.7/mlir/test/Conversion/MemRefToLLVM/ |
| H A D | memref-to-llvm.mlir | 965 func.func @atomic_rmw(%I : memref<10xi32>, %ival : i32, %F : memref<10xf32>, %fval : f32, %i : inde… 966 memref.atomic_rmw assign %fval, %F[%i] : (f32, memref<10xf32>) -> f32 978 memref.atomic_rmw addf %fval, %F[%i] : (f32, memref<10xf32>) -> f32
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