1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py 2; RUN: opt -O2 -S < %s | FileCheck %s 3 4define <3 x float> @PR52631(<3 x float> %a, <3 x float> %b, <3 x i32> %c) { 5; CHECK-LABEL: @PR52631( 6; CHECK-NEXT: [[ISNEG3:%.*]] = icmp slt <3 x i32> [[C:%.*]], zeroinitializer 7; CHECK-NEXT: [[OR_V:%.*]] = select <3 x i1> [[ISNEG3]], <3 x float> [[B:%.*]], <3 x float> [[A:%.*]] 8; CHECK-NEXT: ret <3 x float> [[OR_V]] 9; 10 %a.addr = alloca <3 x float>, align 16 11 %b.addr = alloca <3 x float>, align 16 12 %c.addr = alloca <3 x i32>, align 16 13 %zero = alloca <3 x i32>, align 16 14 %mask = alloca <3 x i32>, align 16 15 %res = alloca <3 x i32>, align 16 16 %extractVec = shufflevector <3 x float> %a, <3 x float> poison, <4 x i32> <i32 0, i32 1, i32 2, i32 undef> 17 %storetmp = bitcast <3 x float>* %a.addr to <4 x float>* 18 store <4 x float> %extractVec, <4 x float>* %storetmp, align 16 19 %extractVec1 = shufflevector <3 x float> %b, <3 x float> poison, <4 x i32> <i32 0, i32 1, i32 2, i32 undef> 20 %storetmp2 = bitcast <3 x float>* %b.addr to <4 x float>* 21 store <4 x float> %extractVec1, <4 x float>* %storetmp2, align 16 22 %extractVec3 = shufflevector <3 x i32> %c, <3 x i32> poison, <4 x i32> <i32 0, i32 1, i32 2, i32 undef> 23 %storetmp4 = bitcast <3 x i32>* %c.addr to <4 x i32>* 24 store <4 x i32> %extractVec3, <4 x i32>* %storetmp4, align 16 25 %t0 = bitcast <3 x i32>* %zero to i8* 26 call void @llvm.lifetime.start.p0i8(i64 16, i8* %t0) #2 27 %storetmp5 = bitcast <3 x i32>* %zero to <4 x i32>* 28 store <4 x i32> <i32 0, i32 0, i32 0, i32 undef>, <4 x i32>* %storetmp5, align 16 29 %t1 = bitcast <3 x i32>* %mask to i8* 30 call void @llvm.lifetime.start.p0i8(i64 16, i8* %t1) #2 31 %castToVec4 = bitcast <3 x i32>* %zero to <4 x i32>* 32 %loadVec4 = load <4 x i32>, <4 x i32>* %castToVec4, align 16 33 %extractVec6 = shufflevector <4 x i32> %loadVec4, <4 x i32> poison, <3 x i32> <i32 0, i32 1, i32 2> 34 %castToVec47 = bitcast <3 x i32>* %c.addr to <4 x i32>* 35 %loadVec48 = load <4 x i32>, <4 x i32>* %castToVec47, align 16 36 %extractVec9 = shufflevector <4 x i32> %loadVec48, <4 x i32> poison, <3 x i32> <i32 0, i32 1, i32 2> 37 %cmp = icmp sgt <3 x i32> %extractVec6, %extractVec9 38 %sext = sext <3 x i1> %cmp to <3 x i32> 39 %extractVec10 = shufflevector <3 x i32> %sext, <3 x i32> poison, <4 x i32> <i32 0, i32 1, i32 2, i32 undef> 40 %storetmp11 = bitcast <3 x i32>* %mask to <4 x i32>* 41 store <4 x i32> %extractVec10, <4 x i32>* %storetmp11, align 16 42 %t2 = bitcast <3 x i32>* %res to i8* 43 call void @llvm.lifetime.start.p0i8(i64 16, i8* %t2) #2 44 %castToVec412 = bitcast <3 x i32>* %mask to <4 x i32>* 45 %loadVec413 = load <4 x i32>, <4 x i32>* %castToVec412, align 16 46 %extractVec14 = shufflevector <4 x i32> %loadVec413, <4 x i32> poison, <3 x i32> <i32 0, i32 1, i32 2> 47 %castToVec415 = bitcast <3 x float>* %b.addr to <4 x float>* 48 %loadVec416 = load <4 x float>, <4 x float>* %castToVec415, align 16 49 %extractVec17 = shufflevector <4 x float> %loadVec416, <4 x float> poison, <3 x i32> <i32 0, i32 1, i32 2> 50 %astype = bitcast <3 x float> %extractVec17 to <3 x i32> 51 %and = and <3 x i32> %extractVec14, %astype 52 %extractVec18 = shufflevector <3 x i32> %and, <3 x i32> poison, <4 x i32> <i32 0, i32 1, i32 2, i32 undef> 53 %storetmp19 = bitcast <3 x i32>* %res to <4 x i32>* 54 store <4 x i32> %extractVec18, <4 x i32>* %storetmp19, align 16 55 %castToVec420 = bitcast <3 x i32>* %mask to <4 x i32>* 56 %loadVec421 = load <4 x i32>, <4 x i32>* %castToVec420, align 16 57 %extractVec22 = shufflevector <4 x i32> %loadVec421, <4 x i32> poison, <3 x i32> <i32 0, i32 1, i32 2> 58 %cmp23 = icmp eq <3 x i32> %extractVec22, zeroinitializer 59 %sext24 = sext <3 x i1> %cmp23 to <3 x i32> 60 %castToVec425 = bitcast <3 x float>* %a.addr to <4 x float>* 61 %loadVec426 = load <4 x float>, <4 x float>* %castToVec425, align 16 62 %extractVec27 = shufflevector <4 x float> %loadVec426, <4 x float> poison, <3 x i32> <i32 0, i32 1, i32 2> 63 %astype28 = bitcast <3 x float> %extractVec27 to <3 x i32> 64 %and29 = and <3 x i32> %sext24, %astype28 65 %castToVec430 = bitcast <3 x i32>* %res to <4 x i32>* 66 %loadVec431 = load <4 x i32>, <4 x i32>* %castToVec430, align 16 67 %extractVec32 = shufflevector <4 x i32> %loadVec431, <4 x i32> poison, <3 x i32> <i32 0, i32 1, i32 2> 68 %or = or <3 x i32> %and29, %extractVec32 69 %astype33 = bitcast <3 x i32> %or to <3 x float> 70 %t3 = bitcast <3 x i32>* %res to i8* 71 call void @llvm.lifetime.end.p0i8(i64 16, i8* %t3) #2 72 %t4 = bitcast <3 x i32>* %mask to i8* 73 call void @llvm.lifetime.end.p0i8(i64 16, i8* %t4) #2 74 %t5 = bitcast <3 x i32>* %zero to i8* 75 call void @llvm.lifetime.end.p0i8(i64 16, i8* %t5) #2 76 ret <3 x float> %astype33 77} 78 79define <4 x i8> @allSignBits_vec(<4 x i8> %cond, <4 x i8> %tval, <4 x i8> %fval) { 80; CHECK-LABEL: @allSignBits_vec( 81; CHECK-NEXT: [[ISNEG1:%.*]] = icmp slt <4 x i8> [[COND:%.*]], zeroinitializer 82; CHECK-NEXT: [[SEL:%.*]] = select <4 x i1> [[ISNEG1]], <4 x i8> [[TVAL:%.*]], <4 x i8> [[FVAL:%.*]] 83; CHECK-NEXT: ret <4 x i8> [[SEL]] 84; 85 %bitmask = ashr <4 x i8> %cond, <i8 7, i8 7, i8 7, i8 7> 86 %not_bitmask = xor <4 x i8> %bitmask, <i8 -1, i8 -1, i8 -1, i8 -1> 87 %a1 = and <4 x i8> %tval, %bitmask 88 %a2 = and <4 x i8> %fval, %not_bitmask 89 %sel = or <4 x i8> %a2, %a1 90 ret <4 x i8> %sel 91} 92 93declare void @llvm.lifetime.start.p0i8(i64 immarg, i8* nocapture) #1 94declare void @llvm.lifetime.end.p0i8(i64 immarg, i8* nocapture) #1 95