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Searched refs:bitsGE (Results 1 – 13 of 13) sorted by relevance

/llvm-project-15.0.7/llvm/include/llvm/CodeGen/
H A DValueTypes.h264 bool bitsGE(EVT VT) const { in bitsGE() function
/llvm-project-15.0.7/llvm/include/llvm/Support/
H A DMachineValueType.h1156 bool bitsGE(MVT VT) const { in bitsGE() function
/llvm-project-15.0.7/llvm/lib/CodeGen/SelectionDAG/
H A DLegalizeFloatTypes.cpp784 if (NVT.bitsGE(SVT)) in SoftenFloatRes_XINT_TO_FP()
956 if (Promoted.bitsGE(RetVT)) in findFPToIntLibcall()
H A DLegalizeDAG.cpp404 (EltVT.isInteger() && Val.getValueType().bitsGE(EltVT))) { in ExpandINSERT_VECTOR_ELT()
4265 if (NVT.bitsGE(SVT)) in ConvertNodeToLibcall()
4308 if (NVT.bitsGE(RVT)) in ConvertNodeToLibcall()
H A DLegalizeIntegerTypes.cpp648 if (SVT.bitsGE(NVT)) { in PromoteIntRes_EXTRACT_VECTOR_ELT()
2296 if (ResVT.bitsGE(EltVT)) in PromoteIntOp_VECREDUCE()
2325 if (VT.bitsGE(EltVT)) in PromoteIntOp_VP_REDUCE()
H A DSelectionDAG.cpp6874 assert(NVT.bitsGE(VT)); in getMemcpyLoadsAndStores()
10678 assert(CVT.bitsGE(VecEltVT) && "Illegal splat_vector element extension"); in isConstOrConstSplat()
10693 assert(CVT.bitsGE(NSVT) && "Illegal build vector element extension"); in isConstOrConstSplat()
10717 assert(CVT.bitsGE(NSVT) && "Illegal build vector element extension"); in isConstOrConstSplat()
H A DSelectionDAGBuilder.cpp662 PartEVT.getVectorElementType().bitsGE( in getCopyToPartsVector()
7579 assert(EVLParamVT.isScalarInteger() && EVLParamVT.bitsGE(MVT::i32) && in visitVPCmp()
7607 assert(EVLParamVT.isScalarInteger() && EVLParamVT.bitsGE(MVT::i32) && in visitVectorPredicationIntrinsic()
H A DDAGCombiner.cpp5806 ExtVT.bitsGE(Load->getMemoryVT())) in SearchForAndLoads()
5827 if (ExtVT.bitsGE(VT)) in SearchForAndLoads()
19584 MaxEltVT = MaxEltVT.bitsGE(EltVT) ? MaxEltVT : EltVT; in visitINSERT_VECTOR_ELT()
23892 if (!isNullConstant(N3) || !XType.bitsGE(AType)) in foldSelectCCToShiftAnd()
/llvm-project-15.0.7/llvm/lib/Target/AMDGPU/
H A DR600ISelLowering.cpp1170 } else if (Ptr->getOpcode() != AMDGPUISD::DWORDADDR && VT.bitsGE(MVT::i32)) { in LowerSTORE()
H A DAMDGPUISelLowering.cpp2977 if (SrcVT.bitsGE(ExtVT)) { in performAssertSZExtCombine()
/llvm-project-15.0.7/llvm/lib/Target/WebAssembly/
H A DWebAssemblyISelLowering.cpp2358 if (LaneT.bitsGE(MVT::i32)) in unrollVectorShift()
/llvm-project-15.0.7/llvm/lib/Target/RISCV/
H A DRISCVISelLowering.cpp5390 MVT ResVT = !VecVT.isInteger() || VecEltVT.bitsGE(XLenVT) ? VecEltVT : XLenVT; in lowerVPREDUCE()
8230 cast<VTSDNode>(N->getOperand(1))->getVT().bitsGE(MVT::i16)) in performSIGN_EXTEND_INREGCombine()
/llvm-project-15.0.7/llvm/lib/Target/X86/
H A DX86ISelLowering.cpp48273 if (!N->hasOneUse() || !N->getSimpleValueType(0).bitsGE(MVT::i32) || in combineOrCmpEqZeroToCtlzSrl()
48283 N->getOperand(1).getValueType().bitsGE(MVT::i32); in combineOrCmpEqZeroToCtlzSrl()