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/llvm-project-15.0.7/llvm/test/CodeGen/WebAssembly/
H A Dsimd-bitmask-mask.ll8 declare i32 @llvm.wasm.bitmask.v16i8(<16 x i8>)
9 declare i32 @llvm.wasm.bitmask.v8i16(<8 x i16>)
10 declare i32 @llvm.wasm.bitmask.v4i32(<4 x i32>)
18 ; CHECK-NEXT: i8x16.bitmask
32 ; CHECK-NEXT: i8x16.bitmask
44 ; CHECK-NEXT: i16x8.bitmask
58 ; CHECK-NEXT: i16x8.bitmask
70 ; CHECK-NEXT: i32x4.bitmask
84 ; CHECK-NEXT: i32x4.bitmask
96 ; CHECK-NEXT: i64x2.bitmask
[all …]
H A Dsimd-intrinsics.ll109 ; CHECK-NEXT: i8x16.bitmask $push[[R:[0-9]+]]=, $0{{$}}
111 declare i32 @llvm.wasm.bitmask.v16i8(<16 x i8>)
113 %a = call i32 @llvm.wasm.bitmask.v16i8(<16 x i8> %x)
315 ; CHECK-NEXT: i16x8.bitmask $push[[R:[0-9]+]]=, $0{{$}}
317 declare i32 @llvm.wasm.bitmask.v8i16(<8 x i16>)
319 %a = call i32 @llvm.wasm.bitmask.v8i16(<8 x i16> %x)
451 ; CHECK-NEXT: i32x4.bitmask $push[[R:[0-9]+]]=, $0{{$}}
453 declare i32 @llvm.wasm.bitmask.v4i32(<4 x i32>)
455 %a = call i32 @llvm.wasm.bitmask.v4i32(<4 x i32> %x)
636 declare i32 @llvm.wasm.bitmask.v2i64(<2 x i64>)
[all …]
/llvm-project-15.0.7/llvm/test/Transforms/InstCombine/
H A Dget-lowbitmask-upto-and-including-bit.ll13 %bitmask = shl i8 1, %x
14 %lowbitmask = add i8 %bitmask, -1
15 %mask = or i8 %lowbitmask, %bitmask
26 %bitmask = shl i16 1, %x
27 %lowbitmask = add i16 %bitmask, -1
28 %mask = or i16 %lowbitmask, %bitmask
87 %bitmask = shl i8 1, %x
88 call void @use8(i8 %bitmask)
101 %bitmask = shl i8 1, %x
116 %bitmask = shl i8 1, %x
[all …]
H A Dlogical-select-inseltpoison.ll581 ; The 'ashr' guarantees that we have a bitmask, so this is select with truncated condition.
592 %bitmask = ashr i32 %cond, 31
593 %not_bitmask = xor i32 %bitmask, -1
594 %a1 = and i32 %tval, %bitmask
609 %bitmask = ashr <4 x i8> %cond, <i8 7, i8 7, i8 7, i8 7>
610 %not_bitmask = xor <4 x i8> %bitmask, <i8 -1, i8 -1, i8 -1, i8 -1>
611 %a1 = and <4 x i8> %tval, %bitmask
H A Dunsigned-add-lack-of-overflow-check.ll280 ; negative test - need same low bitmask
295 ; negative test - need same low bitmask
H A Dlogical-select.ll613 ; The 'ashr' guarantees that we have a bitmask, so this is select with truncated condition.
624 %bitmask = ashr i32 %cond, 31
625 %not_bitmask = xor i32 %bitmask, -1
626 %a1 = and i32 %tval, %bitmask
641 %bitmask = ashr <4 x i8> %cond, <i8 7, i8 7, i8 7, i8 7>
642 %not_bitmask = xor <4 x i8> %bitmask, <i8 -1, i8 -1, i8 -1, i8 -1>
643 %a1 = and <4 x i8> %tval, %bitmask
H A Dshift-amount-reassociation-in-bittest-with-truncation-lshr.ll464 %bitmask = shl i32 1, %nbitsminusone
465 %bitmasked = and i32 %bitmask, %data
/llvm-project-15.0.7/clang-tools-extra/docs/clang-tidy/checks/bugprone/
H A Dsuspicious-enum-usage.rst6 The checker detects various cases when an enum is probably misused (as a bitmask
14 bitmask if the three conditions below are true at the same time:
23 So whenever the non pow-of-2 element is used as a bitmask element we diagnose a
54 G = 31 // OK, real bitmask.
70 EE; // Warning at the decl, and note that it was used here as a bitmask.
77 When non-null the suspicious bitmask usage will be investigated additionally
/llvm-project-15.0.7/llvm/test/MC/Mips/
H A Dmips-pdr-bad.s22 .mask # ASM: :[[@LINE]]:16: error: expected bitmask value
23 .mask foo # ASM: :[[@LINE]]:19: error: bitmask not an absolute expression
29 .fmask # ASM: :[[@LINE]]:17: error: expected bitmask value
30 .fmask foo # ASM: :[[@LINE]]:20: error: bitmask not an absolute expression
/llvm-project-15.0.7/llvm/test/CodeGen/ARM/
H A Dand-sext-combine.ll5 ; VT) #bitmask)` into `VT = (zero_extend NarrowVT to VT)` when
6 ; #bitmask value is the mask made by all ones that selects the value
/llvm-project-15.0.7/llvm/test/CodeGen/Hexagon/
H A Dv60-vsel1.ll8 …re readnone %img, i32 %xsize, i32 %stride, i32 %barrier, i32* nocapture %bitmask, i32 %boundary) #…
10 %0 = bitcast i32* %bitmask to <16 x i32>*
35 %scevgep = getelementptr i32, i32* %bitmask, i32 %14
/llvm-project-15.0.7/llvm/test/MC/WebAssembly/
H A Dsimd-encodings.s334 # CHECK: i8x16.bitmask # encoding: [0xfd,0x64]
335 i8x16.bitmask
430 # CHECK: i16x8.bitmask # encoding: [0xfd,0x84,0x01]
431 i16x8.bitmask
524 # CHECK: i32x4.bitmask # encoding: [0xfd,0xa4,0x01]
525 i32x4.bitmask
611 # CHECK: i64x2.bitmask # encoding: [0xfd,0xc4,0x01]
612 i64x2.bitmask
/llvm-project-15.0.7/lldb/source/Plugins/Language/ObjC/
H A DNSString.cpp360 uint8_t bitmask = 0; in NSTaggedString_SummaryProvider() local
364 bitmask = 0x03f; in NSTaggedString_SummaryProvider()
367 bitmask = 0x01f; in NSTaggedString_SummaryProvider()
374 uint8_t packed = data_bits & bitmask; in NSTaggedString_SummaryProvider()
/llvm-project-15.0.7/llvm/test/Transforms/LoopIdiom/X86/
H A Dleft-shift-until-bittest.ll70 %bitmask = shl i32 1, %bit
138 %bitmask = shl i16 1, %bit
206 %bitmask = shl i32 1, %bit
417 %bitmask = shl i32 1, %bit
491 %bitmask = shl i32 1, %bit
565 %bitmask = shl i32 1, %bit
771 %bitmask = shl i32 1, %bit
841 %bitmask = shl i32 1, %bit
1961 %bitmask = shl i1 1, %bit
2035 %bitmask = shl i2 1, %bit
[all …]
/llvm-project-15.0.7/lldb/tools/debugserver/source/
H A DRNBRemote.cpp1985 int bitmask = 0; in set_logging() local
2006 bitmask |= LOG_VERBOSE; in set_logging()
2012 bitmask |= LOG_THREAD; in set_logging()
2019 bitmask |= LOG_SHLIB; in set_logging()
2034 bitmask |= LOG_MEMORY; in set_logging()
2041 bitmask |= LOG_EVENTS; in set_logging()
2048 bitmask |= LOG_STEP; in set_logging()
2051 bitmask |= LOG_TASK; in set_logging()
2054 bitmask |= LOG_ALL; in set_logging()
2063 bitmask = 0; in set_logging()
[all …]
/llvm-project-15.0.7/llvm/test/Transforms/PhaseOrdering/
H A Dvector-select.ll85 %bitmask = ashr <4 x i8> %cond, <i8 7, i8 7, i8 7, i8 7>
86 %not_bitmask = xor <4 x i8> %bitmask, <i8 -1, i8 -1, i8 -1, i8 -1>
87 %a1 = and <4 x i8> %tval, %bitmask
H A Dbasic.ll28 ; turning %add into a bitmask, making it difficult to spot a 0 return value.
/llvm-project-15.0.7/llvm/test/CodeGen/AArch64/
H A Daarch64-split-and-bitmask-immediate.ll36 ; bitmask immediate.
100 ; bitmask immediate.
117 ; The split bitmask immediates should be hoisted outside loop because they are
/llvm-project-15.0.7/llvm/test/MC/Disassembler/Hexagon/
H A Dxtype_pred.txt46 # Compare bitmask
/llvm-project-15.0.7/mlir/include/mlir/Dialect/SPIRV/IR/
H A DSPIRVGroupOps.td110 higher bit number of the last bitmask needed to represent all bits of the
/llvm-project-15.0.7/llvm/docs/PDB/
H A DCodeViewTypes.rst122 The ``Size`` field of the Attributes bitmask is a 1-byte value indicating the
H A DTpiStream.rst108 bitmask which can be decomposed as follows:
/llvm-project-15.0.7/llvm/test/CodeGen/X86/
H A Ddagcombine-shifts.ll200 ; AND with bitmask.
/llvm-project-15.0.7/llvm/test/Analysis/BranchProbabilityInfo/
H A Dbasic.ll395 ; AND'ing with a single bit bitmask essentially leads to a bool comparison,
404 ; AND'ing with other bitmask might be something else, so we still assume the
/llvm-project-15.0.7/llvm/test/CodeGen/Hexagon/intrinsics/
H A Dxtype_pred.ll115 ; Compare bitmask

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