1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
2; RUN: opt -O3 -S < %s | FileCheck %s
3
4target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64"
5target triple = "x86_64-apple-macosx10.6.7"
6
7declare i8* @malloc(i64)
8declare void @free(i8*)
9
10; PR2338
11define void @test1() nounwind ssp {
12; CHECK-LABEL: @test1(
13; CHECK-NEXT:    ret void
14;
15  %retval = alloca i32, align 4
16  %i = alloca i8*, align 8
17  %call = call i8* @malloc(i64 1)
18  store i8* %call, i8** %i, align 8
19  %tmp = load i8*, i8** %i, align 8
20  store i8 1, i8* %tmp
21  %tmp1 = load i8*, i8** %i, align 8
22  call void @free(i8* %tmp1)
23  ret void
24
25}
26
27; This function exposes a phase ordering problem when InstCombine is
28; turning %add into a bitmask, making it difficult to spot a 0 return value.
29;
30; It it also important that %add is expressed as a multiple of %div so scalar
31; evolution can recognize it.
32define i32 @test2(i32 %a, i32* %p) nounwind uwtable ssp {
33; CHECK-LABEL: @test2(
34; CHECK-NEXT:  entry:
35; CHECK-NEXT:    [[DIV:%.*]] = lshr i32 [[A:%.*]], 2
36; CHECK-NEXT:    store i32 [[DIV]], i32* [[P:%.*]], align 4
37; CHECK-NEXT:    [[ADD:%.*]] = shl nuw nsw i32 [[DIV]], 1
38; CHECK-NEXT:    [[ARRAYIDX1:%.*]] = getelementptr inbounds i32, i32* [[P]], i64 1
39; CHECK-NEXT:    store i32 [[ADD]], i32* [[ARRAYIDX1]], align 4
40; CHECK-NEXT:    ret i32 0
41;
42entry:
43  %div = udiv i32 %a, 4
44  %arrayidx = getelementptr inbounds i32, i32* %p, i64 0
45  store i32 %div, i32* %arrayidx, align 4
46  %add = add i32 %div, %div
47  %arrayidx1 = getelementptr inbounds i32, i32* %p, i64 1
48  store i32 %add, i32* %arrayidx1, align 4
49  %arrayidx2 = getelementptr inbounds i32, i32* %p, i64 1
50  %0 = load i32, i32* %arrayidx2, align 4
51  %arrayidx3 = getelementptr inbounds i32, i32* %p, i64 0
52  %1 = load i32, i32* %arrayidx3, align 4
53  %mul = mul i32 2, %1
54  %sub = sub i32 %0, %mul
55  ret i32 %sub
56
57}
58