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/llvm-project-15.0.7/llvm/test/CodeGen/RISCV/
H A Dimm.ll1166 ; RV64IZBA-NEXT: sh1add a0, a0, a0
1206 ; RV64IZBA-NEXT: sh2add a0, a0, a0
1246 ; RV64IZBA-NEXT: sh2add a0, a0, a0
1286 ; RV64IZBA-NEXT: sh3add a0, a0, a0
1327 ; RV64IZBA-NEXT: sh3add a0, a0, a0
2096 ; RV64IZBA-NEXT: sh2add a0, a0, a0
2137 ; RV64IZBA-NEXT: sh3add a0, a0, a0
2178 ; RV64IZBA-NEXT: sh1add a0, a0, a0
2218 ; RV64IZBA-NEXT: sh2add a0, a0, a0
2258 ; RV64IZBA-NEXT: sh3add a0, a0, a0
[all …]
H A Dctlz-cttz-ctpop.ll35 ; RV32_NOZBB-NEXT: not a0, a0
58 ; RV64NOZBB-NEXT: not a0, a0
78 ; RV32ZBB-NEXT: ctz a0, a0
84 ; RV64ZBB-NEXT: ctz a0, a0
157 ; RV32ZBB-NEXT: ctz a0, a0
164 ; RV64ZBB-NEXT: ctz a0, a0
178 ; RV32I-NEXT: not a0, a0
215 ; RV64I-NEXT: not a0, a0
249 ; RV32M-NEXT: not a0, a0
282 ; RV64M-NEXT: not a0, a0
[all …]
H A Dbitreverse-shift.ll19 ; RV32ZBKB-NEXT: rev8 a0, a0
20 ; RV32ZBKB-NEXT: brev8 a0, a0
22 ; RV32ZBKB-NEXT: rev8 a0, a0
23 ; RV32ZBKB-NEXT: brev8 a0, a0
29 ; RV64ZBKB-NEXT: rev8 a0, a0
30 ; RV64ZBKB-NEXT: brev8 a0, a0
32 ; RV64ZBKB-NEXT: rev8 a0, a0
33 ; RV64ZBKB-NEXT: brev8 a0, a0
45 ; RV32ZBKB-NEXT: rev8 a0, a0
48 ; RV32ZBKB-NEXT: rev8 a0, a0
[all …]
H A Dbswap-bitreverse.ll31 ; RV32I-NEXT: slli a0, a0, 16
32 ; RV32I-NEXT: srli a0, a0, 24
33 ; RV32I-NEXT: or a0, a1, a0
39 ; RV64I-NEXT: slli a0, a0, 48
41 ; RV64I-NEXT: or a0, a1, a0
46 ; RV32ZB-NEXT: rev8 a0, a0
52 ; RV64ZB-NEXT: rev8 a0, a0
82 ; RV32I-NEXT: or a0, a0, a2
83 ; RV32I-NEXT: or a0, a0, a1
104 ; RV32ZB-NEXT: rev8 a0, a0
[all …]
H A Ddiv-by-constant.ll19 ; RV32-NEXT: mulhu a0, a0, a1
20 ; RV32-NEXT: srli a0, a0, 2
25 ; RV64-NEXT: slli a0, a0, 32
29 ; RV64-NEXT: mulhu a0, a0, a1
30 ; RV64-NEXT: srli a0, a0, 34
43 ; RV32-NEXT: sub a0, a0, a1
44 ; RV32-NEXT: srli a0, a0, 1
45 ; RV32-NEXT: add a0, a0, a1
46 ; RV32-NEXT: srli a0, a0, 2
59 ; RV64-NEXT: add a0, a0, a1
[all …]
H A Dselect-const.ll67 ; RV32I-NEXT: sub a0, a1, a0
91 ; RV64I-NEXT: sub a0, a1, a0
329 ; RV32I-NEXT: seqz a0, a0
330 ; RV32I-NEXT: neg a0, a0
337 ; RV32IF-NEXT: neg a0, a0
358 ; RV64I-NEXT: neg a0, a0
391 ; RV32I-NEXT: neg a0, a0
419 ; RV64I-NEXT: neg a0, a0
451 ; RV32I-NEXT: neg a0, a0
475 ; RV64I-NEXT: neg a0, a0
[all …]
H A Ddiv-pow2.ll15 ; RV32I-NEXT: add a0, a0, a1
16 ; RV32I-NEXT: srai a0, a0, 1
22 ; RV32ZBT-NEXT: add a0, a0, a1
29 ; RV64I-NEXT: addw a0, a0, a1
30 ; RV64I-NEXT: sraiw a0, a0, 1
50 ; RV32I-NEXT: neg a0, a0
58 ; RV32ZBT-NEXT: neg a0, a0
66 ; RV64I-NEXT: neg a0, a0
74 ; RV64ZBT-NEXT: neg a0, a0
126 ; RV32I-NEXT: neg a0, a0
[all …]
H A Drv64zba.ll330 ; RV64ZBA-NEXT: sh1add a0, a0, a0
348 ; RV64ZBA-NEXT: sh2add a0, a0, a0
366 ; RV64ZBA-NEXT: sh1add a0, a0, a0
384 ; RV64ZBA-NEXT: sh3add a0, a0, a0
402 ; RV64ZBA-NEXT: sh2add a0, a0, a0
420 ; RV64ZBA-NEXT: sh1add a0, a0, a0
438 ; RV64ZBA-NEXT: sh3add a0, a0, a0
456 ; RV64ZBA-NEXT: sh2add a0, a0, a0
474 ; RV64ZBA-NEXT: sh3add a0, a0, a0
491 ; RV64ZBA-NEXT: sh1add a0, a0, a0
[all …]
H A Daddimm-mulimm.ll14 ; RV32IMB-NEXT: mul a0, a0, a1
21 ; RV64IMB-NEXT: mulw a0, a0, a1
33 ; RV32IMB-NEXT: mul a0, a0, a1
280 ; RV32IMB-NEXT: sh1add a0, a0, a0
287 ; RV64IMB-NEXT: sh1add a0, a0, a0
299 ; RV32IMB-NEXT: sh1add a0, a0, a0
306 ; RV64IMB-NEXT: sh1add a0, a0, a0
322 ; RV32IMB-NEXT: sh1add a0, a0, a0
334 ; RV64IMB-NEXT: sh1add a0, a0, a0
552 ; RV32IMB-NEXT: sh1add a0, a0, a0
[all …]
H A Drv64zbb.ll18 ; RV64I-NEXT: or a0, a0, a1
20 ; RV64I-NEXT: or a0, a0, a1
22 ; RV64I-NEXT: or a0, a0, a1
24 ; RV64I-NEXT: or a0, a0, a1
26 ; RV64I-NEXT: or a0, a0, a1
27 ; RV64I-NEXT: not a0, a0
36 ; RV64I-NEXT: srli a0, a0, 2
37 ; RV64I-NEXT: and a0, a0, a1
38 ; RV64I-NEXT: add a0, a2, a0
40 ; RV64I-NEXT: add a0, a0, a1
[all …]
H A Drv64i-exhaustive-w-insts.ll16 ; RV64-NEXT: addw a0, a0, a1
25 ; RV64-NEXT: addw a0, a0, a1
34 ; RV64-NEXT: addw a0, a0, a1
43 ; RV64-NEXT: addw a0, a0, a1
52 ; RV64-NEXT: addw a0, a0, a1
61 ; RV64-NEXT: addw a0, a0, a1
70 ; RV64-NEXT: addw a0, a0, a1
79 ; RV64-NEXT: addw a0, a0, a1
88 ; RV64-NEXT: addw a0, a0, a1
99 ; RV64-NEXT: addw a0, a0, a1
[all …]
H A Drv32zba.ll73 ; RV32ZBA-NEXT: sh1add a0, a0, a0
91 ; RV32ZBA-NEXT: sh2add a0, a0, a0
109 ; RV32ZBA-NEXT: sh1add a0, a0, a0
127 ; RV32ZBA-NEXT: sh3add a0, a0, a0
145 ; RV32ZBA-NEXT: sh2add a0, a0, a0
163 ; RV32ZBA-NEXT: sh1add a0, a0, a0
181 ; RV32ZBA-NEXT: sh3add a0, a0, a0
199 ; RV32ZBA-NEXT: sh2add a0, a0, a0
217 ; RV32ZBA-NEXT: sh3add a0, a0, a0
234 ; RV32ZBA-NEXT: sh1add a0, a0, a0
[all …]
H A Dshl-demanded.ll10 ; RV32I-NEXT: sll a0, a0, a1
16 ; RV64I-NEXT: sllw a0, a0, a1
29 ; RV32I-NEXT: sll a0, a0, a1
35 ; RV64I-NEXT: sllw a0, a0, a1
48 ; RV32I-NEXT: sll a0, a0, a1
54 ; RV64I-NEXT: sllw a0, a0, a1
67 ; RV32I-NEXT: sll a0, a0, a1
73 ; RV64I-NEXT: sllw a0, a0, a1
88 ; RV32I-NEXT: slli a0, a0, 16
90 ; RV32I-NEXT: sll a0, a0, a1
[all …]
H A Durem-seteq-illegal-types.ll17 ; RV32-NEXT: slli a0, a0, 19
18 ; RV32-NEXT: srli a0, a0, 19
19 ; RV32-NEXT: sltiu a0, a0, 1639
31 ; RV64-NEXT: slli a0, a0, 51
32 ; RV64-NEXT: srli a0, a0, 51
42 ; RV32M-NEXT: mul a0, a0, a1
93 ; RV32-NEXT: or a0, a0, a1
113 ; RV64-NEXT: or a0, a0, a1
196 ; RV32-NEXT: neg a0, a0
206 ; RV64-NEXT: negw a0, a0
[all …]
H A Dneg-abs.ll22 ; RV32I-NEXT: xor a0, a0, a1
23 ; RV32I-NEXT: sub a0, a1, a0
29 ; RV32ZBB-NEXT: min a0, a0, a1
35 ; RV32IBT-NEXT: xor a0, a0, a1
36 ; RV32IBT-NEXT: sub a0, a1, a0
42 ; RV64I-NEXT: xor a0, a0, a1
43 ; RV64I-NEXT: subw a0, a1, a0
68 ; RV32I-NEXT: xor a0, a0, a1
69 ; RV32I-NEXT: sub a0, a1, a0
295 ; RV32I-NEXT: neg a0, a0
[all …]
H A Diabs.ll26 ; RV32I-NEXT: xor a0, a0, a1
27 ; RV32I-NEXT: sub a0, a0, a1
32 ; RV32ZBB-NEXT: sext.b a0, a0
34 ; RV32ZBB-NEXT: max a0, a0, a1
41 ; RV32ZBT-NEXT: xor a0, a0, a1
49 ; RV64I-NEXT: xor a0, a0, a1
50 ; RV64I-NEXT: sub a0, a0, a1
55 ; RV64ZBB-NEXT: sext.b a0, a0
76 ; RV32I-NEXT: xor a0, a0, a1
77 ; RV32I-NEXT: sub a0, a0, a1
[all …]
H A Dsetcc-logic.ll10 ; RV32I-NEXT: xor a0, a0, a1
12 ; RV32I-NEXT: or a0, a0, a1
13 ; RV32I-NEXT: seqz a0, a0
18 ; RV64I-NEXT: xor a0, a0, a1
20 ; RV64I-NEXT: or a0, a0, a1
21 ; RV64I-NEXT: sext.w a0, a0
22 ; RV64I-NEXT: seqz a0, a0
35 ; RV32I-NEXT: or a0, a0, a1
36 ; RV32I-NEXT: snez a0, a0
45 ; RV64I-NEXT: snez a0, a0
[all …]
H A Dalu16.ll14 ; RV32I-NEXT: addi a0, a0, 1
19 ; RV64I-NEXT: addi a0, a0, 1
28 ; RV32I-NEXT: slli a0, a0, 16
29 ; RV32I-NEXT: srai a0, a0, 16
30 ; RV32I-NEXT: slti a0, a0, 2
35 ; RV64I-NEXT: slli a0, a0, 48
36 ; RV64I-NEXT: srai a0, a0, 48
37 ; RV64I-NEXT: slti a0, a0, 2
47 ; RV32I-NEXT: slli a0, a0, 16
48 ; RV32I-NEXT: srli a0, a0, 16
[all …]
H A Dsext-zext-trunc.ll10 ; RV32I-NEXT: andi a0, a0, 1
11 ; RV32I-NEXT: neg a0, a0
16 ; RV64I-NEXT: andi a0, a0, 1
17 ; RV64I-NEXT: neg a0, a0
26 ; RV32I-NEXT: andi a0, a0, 1
27 ; RV32I-NEXT: neg a0, a0
33 ; RV64I-NEXT: neg a0, a0
43 ; RV32I-NEXT: neg a0, a0
49 ; RV64I-NEXT: neg a0, a0
59 ; RV32I-NEXT: neg a0, a0
[all …]
H A Dsadd_sat_plus.ll20 ; RV32I-NEXT: add a0, a0, a1
25 ; RV32I-NEXT: srai a0, a0, 31
27 ; RV32I-NEXT: xor a0, a0, a1
33 ; RV64I-NEXT: sext.w a0, a0
35 ; RV64I-NEXT: add a0, a0, a1
67 ; RV64IZbb-NEXT: sext.w a0, a0
69 ; RV64IZbb-NEXT: add a0, a0, a1
99 ; RV32I-NEXT: add a0, a0, a4
117 ; RV64I-NEXT: add a0, a0, a2
122 ; RV64I-NEXT: srai a0, a0, 63
[all …]
H A Dshlimm-addimm.ll15 ; RV32I-NEXT: slli a0, a0, 5
16 ; RV32I-NEXT: addi a0, a0, 1184
21 ; RV64I-NEXT: slliw a0, a0, 5
22 ; RV64I-NEXT: addiw a0, a0, 1184
32 ; RV32I-NEXT: slli a0, a0, 5
33 ; RV32I-NEXT: addi a0, a0, 1184
38 ; RV64I-NEXT: slliw a0, a0, 5
60 ; RV64I-NEXT: slli a0, a0, 5
71 ; RV32I-NEXT: slli a0, a0, 5
74 ; RV32I-NEXT: add a0, a0, a1
[all …]
/llvm-project-15.0.7/llvm/test/MC/CSKY/
H A Dcompressed-inst.s6 addu32 a0, a0, a1
10 addu32 a0, a1, a0
18 subu32 a0, a0, a1
26 addc32 a0, a0, a1
30 subc32 a0, a0, a1
42 addi32 a0, a0, 10
46 subi32 a0, a0, 10
70 and32 a0, a0, a1
74 and32 a0, a1, a0
78 or32 a0, a0, a1
[all …]
/llvm-project-15.0.7/llvm/test/CodeGen/LoongArch/ir-instruction/
H A Dselect-icc-int.ll9 ; LA32-NEXT: xor $a0, $a0, $a1
10 ; LA32-NEXT: sltui $a0, $a0, 1
12 ; LA32-NEXT: maskeqz $a0, $a2, $a0
13 ; LA32-NEXT: or $a0, $a0, $a1
18 ; LA64-NEXT: xor $a0, $a0, $a1
19 ; LA64-NEXT: sltui $a0, $a0, 1
22 ; LA64-NEXT: or $a0, $a0, $a1
32 ; LA32-NEXT: xor $a0, $a0, $a1
36 ; LA32-NEXT: or $a0, $a0, $a1
41 ; LA64-NEXT: xor $a0, $a0, $a1
[all …]
/llvm-project-15.0.7/clang/test/CodeGen/
H A Dbitfield-2.c26 return a0->f0; in f0_load()
147 a0->f0 = 1; in f3_load()
184 return a0->f0 ^ a0->f1; in f4_load()
187 return (a0->f0 = 1234) ^ (a0->f1 = 5678); in f4_store()
190 return (a0->f0 += 1234) ^ (a0->f1 += 5678); in f4_reload()
216 return a0->f0 ^ a0->f1; in f5_load()
219 return (a0->f0 = 0xF) ^ (a0->f1 = 0xF) ^ (a0->f2 = 0xF); in f5_store()
222 return (a0->f0 += 0xF) ^ (a0->f1 += 0xF) ^ (a0->f2 += 0xF); in f5_reload()
304 return a0->f0 ^ a0 ->f2 ^ a0->f3; in f8_load()
307 return (a0->f0 = 0xFD) ^ (a0->f2 = 0xFD) ^ (a0->f3 = 0xFD); in f8_store()
[all …]
/llvm-project-15.0.7/llvm/test/CodeGen/RISCV/rvv/
H A Dctpop-sdnode.ll165 ; RV32-NEXT: addi a0, a0, 1365
169 ; RV32-NEXT: addi a0, a0, 819
177 ; RV32-NEXT: addi a0, a0, -241
193 ; RV64-NEXT: addiw a0, a0, 819
218 ; RV32-NEXT: addi a0, a0, 1365
222 ; RV32-NEXT: addi a0, a0, 819
230 ; RV32-NEXT: addi a0, a0, -241
246 ; RV64-NEXT: addiw a0, a0, 819
275 ; RV32-NEXT: addi a0, a0, 819
328 ; RV32-NEXT: addi a0, a0, 819
[all …]

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