Searched refs:VOffset (Results 1 – 10 of 10) sorted by relevance
| /llvm-project-15.0.7/llvm/lib/Target/AMDGPU/ |
| H A D | AMDGPUInstructionSelector.cpp | 3042 MachineOperand &VOffset = MI.getOperand(4); in selectAMDGPU_BUFFER_ATOMIC_FADD() local 3084 .addReg(VOffset.getReg()) in selectAMDGPU_BUFFER_ATOMIC_FADD() 3091 I.add(VOffset); in selectAMDGPU_BUFFER_ATOMIC_FADD() 3160 getIConstantVRegValWithLookThrough(VOffset, *MRI); in selectBufferLoadLds() 3198 .addReg(VOffset) in selectBufferLoadLds() 3205 MIB.addReg(VOffset); in selectBufferLoadLds() 3281 Register VOffset; in selectGlobalLoadLds() local 3295 VOffset = Off; in selectGlobalLoadLds() 3303 if (!VOffset) { in selectGlobalLoadLds() 3314 MIB.addReg(VOffset); in selectGlobalLoadLds() [all …]
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| H A D | AMDGPULegalizerInfo.cpp | 4299 getIConstantVRegValWithLookThrough(VOffset, MRI); in updateBufferMMO() 4438 Register VOffset = MI.getOperand(3 + OpOffset).getReg(); in legalizeBufferStore() local 4449 std::tie(VOffset, ImmOffset) = splitBufferOffsets(B, VOffset); in legalizeBufferStore() 4450 updateBufferMMO(MMO, VOffset, SOffset, ImmOffset, VIndex, MRI); in legalizeBufferStore() 4477 .addUse(VOffset) // voffset in legalizeBufferStore() 4519 Register VOffset = MI.getOperand(3 + OpOffset).getReg(); in legalizeBufferLoad() local 4536 std::tie(VOffset, ImmOffset) = splitBufferOffsets(B, VOffset); in legalizeBufferLoad() 4578 .addUse(VOffset) // voffset in legalizeBufferLoad() 4717 Register VOffset = MI.getOperand(4 + OpOffset).getReg(); in legalizeBufferAtomic() local 4724 std::tie(VOffset, ImmOffset) = splitBufferOffsets(B, VOffset); in legalizeBufferAtomic() [all …]
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| H A D | AMDGPULegalizerInfo.h | 170 void updateBufferMMO(MachineMemOperand *MMO, Register VOffset,
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| H A D | AMDGPUISelDAGToDAG.h | 188 SDValue &VOffset, SDValue &Offset) const;
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| H A D | AMDGPUISelDAGToDAG.cpp | 1656 SDValue &VOffset, in SelectGlobalSAddr() argument 1686 VOffset = SDValue(VMov, 0); in SelectGlobalSAddr() 1715 VOffset = ZextRHS; in SelectGlobalSAddr() 1723 VOffset = ZextLHS; in SelectGlobalSAddr() 1743 VOffset = SDValue(VMov, 0); in SelectGlobalSAddr()
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| H A D | SIRegisterInfo.cpp | 1329 int64_t VOffset) { in buildSpillLoadStore() argument 1339 .addImm(VOffset) in buildSpillLoadStore() 1345 .addImm(VOffset) in buildSpillLoadStore() 1351 .addImm(VOffset); in buildSpillLoadStore()
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| H A D | SIISelLowering.cpp | 7114 static void updateBufferMMO(MachineMemOperand *MMO, SDValue VOffset, in updateBufferMMO() argument 7133 MMO->setOffset(cast<ConstantSDNode>(VOffset)->getSExtValue() + in updateBufferMMO() 8232 SDValue VOffset = Op.getOperand(5 + OpOffset); in LowerINTRINSIC_VOID() local 8233 auto CVOffset = dyn_cast<ConstantSDNode>(VOffset); in LowerINTRINSIC_VOID() 8267 VOffset })); in LowerINTRINSIC_VOID() 8271 Ops.push_back(VOffset); in LowerINTRINSIC_VOID() 8329 SDValue VOffset; in LowerINTRINSIC_VOID() local 8343 VOffset = RHS.getOperand(0); in LowerINTRINSIC_VOID() 8350 if (!VOffset) in LowerINTRINSIC_VOID() 8351 VOffset = SDValue( in LowerINTRINSIC_VOID() [all …]
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| H A D | AMDGPURegisterBankInfo.cpp | 1367 Register VOffset; in applyMappingSBufferLoad() local 1371 VOffset, SOffset, ImmOffset, Alignment); in applyMappingSBufferLoad() 1413 .addUse(VOffset) // voffset in applyMappingSBufferLoad()
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| /llvm-project-15.0.7/llvm/lib/Target/Hexagon/MCTargetDesc/ |
| H A D | HexagonMCCodeEmitter.cpp | 725 unsigned VOffset = 0; in getMachineOpValue() local 744 ++VOffset; in getMachineOpValue() 766 unsigned Offset = HexagonMCInstrInfo::isVector(MCII, MI) ? VOffset in getMachineOpValue()
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| /llvm-project-15.0.7/llvm/lib/Target/X86/ |
| H A D | X86ISelLowering.cpp | 40481 int VOffset = V.getOpcode() == X86ISD::PSHUFLW ? 0 : 4; in combineTargetShuffle() local 40485 WordMask[i + VOffset] = VMask[i] + VOffset; in combineTargetShuffle()
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