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Searched refs:VB (Results 1 – 25 of 40) sorted by relevance

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/llvm-project-15.0.7/libcxx/test/std/containers/sequences/vector.bool/
H A Dcompare.pass.cpp24 typedef std::vector<bool> VB; in test() typedef
26 const VB v1, v2; in test()
30 const VB v1(1, true); in test()
31 const VB v2(1, true); in test()
35 const VB v1(1, false); in test()
36 const VB v2(1, true); in test()
40 const VB v1, v2(1, true); in test()
46 const VB v1(items1, items1 + 3); in test()
47 const VB v2(items2, items2 + 3); in test()
66 const VB v1(items, items + 3); in test()
[all …]
/llvm-project-15.0.7/llvm/test/CodeGen/PowerPC/
H A Dvec_xxpermdi.ll70 %0 = shufflevector <2 x double> %VA, <2 x double> %VB,<2 x i32> <i32 3, i32 1>
79 %0 = shufflevector <2 x double> %VA, <2 x double> %VB,<2 x i32> <i32 2, i32 1>
88 %0 = shufflevector <2 x double> %VA, <2 x double> %VB,<2 x i32> <i32 3, i32 0>
97 %0 = shufflevector <2 x double> %VA, <2 x double> %VB,<2 x i32> <i32 2, i32 0>
106 %0 = shufflevector <2 x double> %VA, <2 x double> %VB,<2 x i32> <i32 1, i32 3>
115 %0 = shufflevector <2 x double> %VA, <2 x double> %VB,<2 x i32> <i32 0, i32 3>
124 %0 = shufflevector <2 x double> %VA, <2 x double> %VB,<2 x i32> <i32 1, i32 2>
133 %0 = shufflevector <2 x double> %VA, <2 x double> %VB,<2 x i32> <i32 0, i32 2>
177 %0 = shufflevector <2 x double> %VA, <2 x double> %VB,<2 x i32> <i32 0, i32 2>
186 %0 = shufflevector <2 x double> %VA, <2 x double> %VB,<2 x i32> <i32 0, i32 3>
[all …]
H A Dvec_sldwi.ll68 define <4 x i32> @check_le_vec_sldwi_va_vb_0(<4 x i32> %VA, <4 x i32> %VB) {
76 define <4 x i32> @check_le_vec_sldwi_va_vb_1(<4 x i32> %VA, <4 x i32> %VB) {
85 define <4 x i32> @check_le_vec_sldwi_va_vb_2(<4 x i32> %VA, <4 x i32> %VB) {
94 define <4 x i32> @check_le_vec_sldwi_va_vb_3(<4 x i32> %VA, <4 x i32> %VB) {
103 define <4 x i32> @check_le_swap_vec_sldwi_va_vb_0(<4 x i32> %VA, <4 x i32> %VB) {
112 define <4 x i32> @check_le_swap_vec_sldwi_va_vb_1(<4 x i32> %VA, <4 x i32> %VB) {
174 define <4 x i32> @check_be_vec_sldwi_va_vb_0(<4 x i32> %VA, <4 x i32> %VB) {
182 define <4 x i32> @check_be_vec_sldwi_va_vb_1(<4 x i32> %VA, <4 x i32> %VB) {
191 define <4 x i32> @check_be_vec_sldwi_va_vb_2(<4 x i32> %VA, <4 x i32> %VB) {
200 define <4 x i32> @check_be_vec_sldwi_va_vb_3(<4 x i32> %VA, <4 x i32> %VB) {
[all …]
/llvm-project-15.0.7/clang/test/SemaCXX/
H A Ddestructor.cpp236 struct VB { struct
238 virtual ~VB();
241 struct VD: VB {};
243 struct VF final: VB {};
257 void use(VB&);
263 VB vb; use(vb); in nowarnstack()
290 VB* vb = new VB[4]; in nowarnarray()
317 VB* vb = new VB(); in nowarn0()
321 VB* vb = new VD(); in nowarn0()
337 vb->~VB(); in nowarn0_explicit_dtor()
[all …]
/llvm-project-15.0.7/clang/lib/StaticAnalyzer/Core/
H A DSValBuilder.cpp628 SValBuilder &VB; member in __anona9af1b1c0211::EvalCastVisitor
634 : VB(VB), Context(VB.getContext()), CastTy(CastTy), in EvalCastVisitor()
671 return VB.makeIntVal(Value); in VisitLocConcreteInt()
688 return VB.makeTruthVal(true, CastTy); in VisitLocGotoLabel()
731 return VB.makeNonLoc( in VisitLocMemRegionVal()
736 return VB.makeTruthVal(true, CastTy); in VisitLocMemRegionVal()
873 return VB.makeIntVal(CastedValue()); in VisitNonLocConcreteInt()
877 return VB.makeIntLocVal(CastedValue()); in VisitNonLocConcreteInt()
1045 return VB.makeNonLoc(SE, T, CastTy); in simplifySymbolCast()
1052 return VB.makeNonLoc(SE, T, CastTy); in simplifySymbolCast()
[all …]
/llvm-project-15.0.7/llvm/test/CodeGen/AMDGPU/
H A Dmadak.ll13 ; GFX6: buffer_load_dword [[VB:v[0-9]+]]
15 ; GFX8: {{flat|global}}_load_dword [[VB:v[0-9]+]]
17 ; GFX9: {{flat|global}}_load_dword [[VB:v[0-9]+]]
19 ; GFX10: {{flat|global}}_load_dword [[VB:v[0-9]+]]
106 ; GFX6: buffer_load_dword [[VB:v[0-9]+]]
108 ; GFX8: {{flat|global}}_load_dword [[VB:v[0-9]+]]
110 ; GFX9: {{flat|global}}_load_dword [[VB:v[0-9]+]]
112 ; GFX10: {{flat|global}}_load_dword [[VB:v[0-9]+]]
113 ; MAD: v_mad_f32 {{v[0-9]+}}, [[VA]], [[VB]], 4.0
191 ; GFX6: buffer_load_dword [[VB:v[0-9]+]]
[all …]
H A Dllvm.amdgcn.class.ll12 ; SI: v_mov_b32_e32 [[VB:v[0-9]+]], [[SB]]
13 ; SI: v_cmp_class_f32_e32 vcc, [[SA]], [[VB]]
27 ; SI: v_mov_b32_e32 [[VB:v[0-9]+]], [[SB]]
43 ; SI: v_mov_b32_e32 [[VB:v[0-9]+]], [[SB]]
59 ; SI: v_mov_b32_e32 [[VB:v[0-9]+]], [[SB]]
148 ; SI-DAG: buffer_load_dword [[VB:v[0-9]+]]
149 ; SI: v_cmp_class_f32_e32 vcc, 1.0, [[VB]]
167 ; SI-DAG: buffer_load_dword [[VB:v[0-9]+]]
169 ; SI: v_cmp_class_f32_e32 vcc, [[VK]], [[VB]]
188 ; SI-DAG: v_mov_b32_e32 [[VB:v[0-9]+]], [[SB]]
[all …]
H A Dmadmk.ll13 ; GCN-DAG: buffer_load_dword [[VB:v[0-9]+]], {{v\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}}, 0 addr…
14 ; GCN: v_mac_f32_e32 [[VB]], 0x41200000, [[VA]]
32 ; GCN-DAG: buffer_load_dword [[VB:v[0-9]+]], {{v\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}}, 0 addr…
34 ; GCN-DAG: v_mac_f32_e32 [[VB]], 0x41200000, [[VA]]
64 ; GCN-DAG: buffer_load_dword [[VB:v[0-9]+]], {{v\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}}, 0 addr…
65 ; GCN: v_mac_f32_e32 [[VB]], 4.0, [[VA]]
131 ; GCN-DAG: buffer_load_dword [[VB:v[0-9]+]], {{v\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}}, 0 addr…
133 ; GCN: v_mad_f32 {{v[0-9]+}}, |[[VA]]|, [[SK]], [[VB]]
153 ; GCN-DAG: buffer_load_dword [[VB:v[0-9]+]], {{v\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}}, 0 addr…
H A Dllvm.amdgcn.div.fmas.ll22 ; GCN-DAG: v_mov_b32_e32 [[VB:v[0-9]+]], [[SB]]
24 ; GCN: v_div_fmas_f32 [[RESULT:v[0-9]+]], [[VA]], [[VB]], [[VC]]
36 ; SI-DAG: v_mov_b32_e32 [[VB:v[0-9]+]], [[SB]]
37 ; SI: v_div_fmas_f32 [[RESULT:v[0-9]+]], 1.0, [[VB]], [[VC]]
70 ; GCN-DAG: v_mov_b32_e32 [[VB:v[0-9]+]], [[SB]]
71 ; GCN: v_div_fmas_f32 [[RESULT:v[0-9]+]], [[VA]], [[VB]], 1.0
H A Dllvm.amdgcn.div.fixup.ll17 ; GCN-DAG: v_mov_b32_e32 [[VB:v[0-9]+]], [[SB]]
18 ; GCN: v_div_fixup_f32 [[RESULT:v[0-9]+]], [[SA]], [[VB]], [[VC]]
H A Dfmin_legacy.ll38 ; GCN-NONAN: v_mov_b32_e32 [[VB:v[0-9]+]], s[[B]]
40 ; VI-SAFE: v_mov_b32_e32 [[VB:v[0-9]+]], s[[B]]
45 ; VI-SAFE: v_cmp_ngt_f32_e32 vcc, s[[A]], [[VB]]
46 ; VI-SAFE: v_cndmask_b32_e32 v{{[0-9]+}}, [[VB]], [[VA]]
48 ; GCN-NONAN: v_min_f32_e32 {{v[0-9]+}}, s[[A]], [[VB]]
H A Dllvm.amdgcn.fmad.ftz.ll54 ; GCN: v_mov_b32_e32 [[VB:v[0-9]+]], [[B]]
55 ; GCN: v_mac_f32_e32 [[C]], {{s[0-9]+}}, [[VB]]{{$}}
H A Duse-sgpr-multiple-times.ll58 ; GCN: v_mov_b32_e32 [[VB:v[0-9]+]], s[[SB]]
61 ; GCN-DAG: v_fma_f32 [[RESULT0:v[0-9]+]], s[[SA]], [[VA0]], [[VB]]
62 ; GCN-DAG: v_fma_f32 [[RESULT1:v[0-9]+]], s[[SA]], [[VA1]], [[VB]]
H A Dand.ll110 ; SI-DAG: {{buffer|flat}}_load_dword [[VB:v[0-9]+]]
111 ; SI: v_and_b32_e32 v{{[0-9]+}}, [[SA]], [[VB]]
124 ; SI-DAG: {{buffer|flat}}_load_dword [[VB:v[0-9]+]]
125 ; SI: v_and_b32_e32 v{{[0-9]+}}, [[SA]], [[VB]]
/llvm-project-15.0.7/llvm/test/Transforms/ConstantMerge/
H A Dmerge-dbg.ll18 ; CHECK: [[B]] = !DIGlobalVariableExpression(var: [[VB:![0-9]+]], expr: !DIExpression())
19 ; CHECK: [[VB]] = distinct !DIGlobalVariable(name: "x"
/llvm-project-15.0.7/llvm/lib/DebugInfo/PDB/
H A DUDTLayout.cpp238 for (auto &VB : VirtualBaseSyms) { in initializeChildren() local
239 int VBPO = VB->getVirtualBasePointerOffset(); in initializeChildren()
241 if (auto VBP = VB->getRawSymbol().getVirtualBaseTableType()) { in initializeChildren()
256 std::make_unique<BaseClassLayout>(*this, Offset, Elide, std::move(VB)); in initializeChildren()
/llvm-project-15.0.7/clang/test/CXX/special/class.dtor/
H A Dp3-0x.cpp145 struct VB : VA struct
146 { virtual ~VB() {} }; in ~VB() argument
/llvm-project-15.0.7/clang-tools-extra/test/clang-tidy/checkers/modernize/
H A Duse-equals-default-copy.cpp202 struct VB : virtual OL {}; struct
203 struct VBC : VA, VB, virtual OL {
207 VBC(const VBC &Other) : OL(Other), VA(Other), VB(Other) {} in VBC()
215 VB::operator=(Other); in operator =()
/llvm-project-15.0.7/llvm/test/CodeGen/AArch64/
H A Dmisched-fusion-aes.ll94 ; CHECK: aese [[VB:v[0-7].16b]], {{v[0-7].16b}}
95 ; CHECK-NEXT: aesmc [[VB]], [[VB]]
178 ; CHECK: aesd [[VB:v[0-7].16b]], {{v[0-7].16b}}
179 ; CHECK-NEXT: aesimc [[VB]], [[VB]]
220 ; CHECK: aese [[VB:v[0-7].16b]], {{v[0-7].16b}}
221 ; CHECK-NEXT: aesmc [[VB]], [[VB]]
/llvm-project-15.0.7/llvm/lib/Target/PowerPC/
H A DPPCInstrFormats.td995 bits<5> VB;
1892 bits<5> VB;
1909 bits<5> VB;
1926 bits<5> VB;
1945 bits<5> VB;
1967 bits<5> VB;
2009 bits<5> VB;
2024 bits<5> VB;
2073 bits<5> VB;
2091 bits<5> VB;
[all …]
/llvm-project-15.0.7/clang/lib/AST/
H A DCommentParser.cpp651 VerbatimBlockComment *VB = in parseVerbatimBlock() local
682 S.actOnVerbatimBlockFinish(VB, Tok.getLocation(), in parseVerbatimBlock()
688 S.actOnVerbatimBlockFinish(VB, SourceLocation(), "", in parseVerbatimBlock()
692 return VB; in parseVerbatimBlock()
H A DVTableBuilder.cpp3349 if (const CXXRecordDecl *VB = P->getVBaseWithVPtr()) in computeVTablePaths() local
3350 P->FullOffsetInMDC += Layout.getVBaseClassOffset(VB); in computeVTablePaths()
3360 for (const auto &VB : Base->vbases()) in computeVTablePaths() local
3361 VBasesSeen.insert(VB.getType()->getAsCXXRecordDecl()); in computeVTablePaths()
3735 for (const auto &VB : RD->vbases()) { in computeVBTableRelatedInformation() local
3736 const CXXRecordDecl *CurVBase = VB.getType()->getAsCXXRecordDecl(); in computeVBTableRelatedInformation()
/llvm-project-15.0.7/llvm/test/Demangle/
H A Dms-back-references.test113 ?bar@PR13207@@YAXV?$J@VA@PR13207@@VB@2@@1@@Z
116 ?spam@PR13207@@YAXV?$K@VA@PR13207@@VB@2@VC@2@@1@@Z
/llvm-project-15.0.7/llvm/lib/Transforms/Scalar/
H A DReassociate.cpp1010 Value *VB = Or->user_back(); in shouldConvertOrWithNoCommonBitsToAdd() local
1011 if (Or->hasOneUse() && isInteresting(VB)) in shouldConvertOrWithNoCommonBitsToAdd()
1055 Value *VB = Sub->user_back(); in ShouldBreakUpSubtract() local
1057 (isReassociableOp(VB, Instruction::Add, Instruction::FAdd) || in ShouldBreakUpSubtract()
1058 isReassociableOp(VB, Instruction::Sub, Instruction::FSub))) in ShouldBreakUpSubtract()
/llvm-project-15.0.7/clang/test/CXX/drs/
H A Ddr6xx.cpp746 struct VB : virtual A {} *vb; struct
748 struct VD : VB, VC {} *vd;

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