| /llvm-project-15.0.7/llvm/include/llvm/MC/ |
| H A D | MCInstrItineraries.h | 185 unsigned UseClass, unsigned UseIdx) const { in hasPipelineForwarding() argument 195 if ((FirstUseIdx + UseIdx) >= LastUseIdx) in hasPipelineForwarding() 199 Forwardings[FirstUseIdx + UseIdx]; in hasPipelineForwarding() 206 unsigned UseClass, unsigned UseIdx) const { in getOperandLatency() argument 214 int UseCycle = getOperandCycle(UseClass, UseIdx); in getOperandLatency() 220 hasPipelineForwarding(DefClass, DefIdx, UseClass, UseIdx)) in getOperandLatency()
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| H A D | MCSubtargetInfo.h | 184 int getReadAdvanceCycles(const MCSchedClassDesc *SC, unsigned UseIdx, in getReadAdvanceCycles() argument 191 if (I->UseIdx < UseIdx) in getReadAdvanceCycles() 193 if (I->UseIdx > UseIdx) in getReadAdvanceCycles()
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| H A D | MCSchedule.h | 95 unsigned UseIdx; member 100 return UseIdx == Other.UseIdx && WriteResourceID == Other.WriteResourceID
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| /llvm-project-15.0.7/llvm/lib/Target/PowerPC/ |
| H A D | PPCVSXSwapRemoval.cpp | 680 int UseIdx = SwapMap[&UseMI]; in recordUnoptimizableWebs() local 682 if (!SwapVector[UseIdx].IsSwap || SwapVector[UseIdx].IsLoad || in recordUnoptimizableWebs() 683 SwapVector[UseIdx].IsStore) { in recordUnoptimizableWebs() 691 LLVM_DEBUG(dbgs() << " use " << UseIdx << ": "); in recordUnoptimizableWebs() 699 if (SwapVector[UseIdx].IsSwap && !SwapVector[UseIdx].IsLoad && in recordUnoptimizableWebs() 700 !SwapVector[UseIdx].IsStore) { in recordUnoptimizableWebs() 746 int UseIdx = SwapMap[&UseMI]; in recordUnoptimizableWebs() local 757 LLVM_DEBUG(dbgs() << " use " << UseIdx << ": "); in recordUnoptimizableWebs() 758 LLVM_DEBUG(SwapVector[UseIdx].VSEMI->dump()); in recordUnoptimizableWebs() 788 int UseIdx = SwapMap[&UseMI]; in markSwapsForRemoval() local [all …]
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| H A D | PPCInstrInfo.h | 416 unsigned UseIdx) const override; 419 SDNode *UseNode, unsigned UseIdx) const override { in getOperandLatency() argument 421 UseNode, UseIdx); in getOperandLatency()
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| H A D | PPCInstrInfo.cpp | 169 unsigned UseIdx) const { in getOperandLatency() 171 UseMI, UseIdx); in getOperandLatency() 2088 unsigned UseIdx; in onlyFoldImmediate() local 2089 for (UseIdx = 0; UseIdx < UseMI.getNumOperands(); ++UseIdx) in onlyFoldImmediate() 2090 if (UseMI.getOperand(UseIdx).isReg() && in onlyFoldImmediate() 2091 UseMI.getOperand(UseIdx).getReg() == Reg) in onlyFoldImmediate() 2094 assert(UseIdx < UseMI.getNumOperands() && "Cannot find Reg in UseMI"); in onlyFoldImmediate() 2095 assert(UseIdx < UseMCID.getNumOperands() && "No operand description for Reg"); in onlyFoldImmediate() 2097 const MCOperandInfo *UseInfo = &UseMCID.OpInfo[UseIdx]; in onlyFoldImmediate() 2125 UseMI.getOperand(UseIdx).setReg(ZeroReg); in onlyFoldImmediate()
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| /llvm-project-15.0.7/llvm/lib/CodeGen/ |
| H A D | LiveRangeEdit.cpp | 107 SlotIndex UseIdx) const { in allUsesAvailableAt() 109 UseIdx = std::max(UseIdx, UseIdx.getRegSlot(true)); in allUsesAvailableAt() 130 if (SlotIndex::isSameInstr(OrigIdx, UseIdx)) in allUsesAvailableAt() 133 if (OVNI != li.getVNInfoAt(UseIdx)) in allUsesAvailableAt() 143 if (!SR.liveAt(UseIdx)) in allUsesAvailableAt() 156 SlotIndex UseIdx, bool cheapAsAMove) { in canRematerializeAt() argument 173 if (!allUsesAvailableAt(RM.OrigMI, DefIdx, UseIdx)) in canRematerializeAt()
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| H A D | LiveIntervalCalc.cpp | 172 SlotIndex UseIdx; in extendToUses() local 177 UseIdx = Indexes->getMBBEndIdx(MI->getOperand(OpNo + 1).getMBB()); in extendToUses() 189 UseIdx = Indexes->getInstructionIndex(*MI).getRegSlot(isEarlyClobber); in extendToUses() 194 extend(LR, UseIdx, Reg, Undefs); in extendToUses()
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| H A D | TargetSchedule.cpp | 173 unsigned UseIdx = 0; in findUseIdx() local 177 ++UseIdx; in findUseIdx() 179 return UseIdx; in findUseIdx() 231 unsigned UseIdx = findUseIdx(UseMI, UseOperIdx); in computeOperandLatency() local 232 int Advance = STI->getReadAdvanceCycles(UseDesc, UseIdx, WriteID); in computeOperandLatency()
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| H A D | MachineCopyPropagation.cpp | 331 const MachineInstr &UseI, unsigned UseIdx); 334 unsigned UseIdx); 441 const MachineInstr &Copy, const MachineInstr &UseI, unsigned UseIdx) { in isBackwardPropagatableRegClassCopy() argument 447 UseI.getRegClassConstraint(UseIdx, TII, TRI)) in isBackwardPropagatableRegClassCopy() 460 unsigned UseIdx) { in isForwardableRegClassCopy() argument 468 UseI.getRegClassConstraint(UseIdx, TII, TRI)) in isForwardableRegClassCopy()
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| H A D | InlineSpiller.cpp | 574 SlotIndex UseIdx = LIS.getInstructionIndex(MI).getRegSlot(true); in reMaterializeFor() local 575 VNInfo *ParentVNI = VirtReg.getVNInfoAt(UseIdx.getBaseIndex()); in reMaterializeFor() 582 LLVM_DEBUG(dbgs() << UseIdx << '\t' << MI); in reMaterializeFor() 590 VNInfo *OrigVNI = OrigLI.getVNInfoAt(UseIdx); in reMaterializeFor() 594 if (!Edit->canRematerializeAt(RM, OrigVNI, UseIdx, false)) { in reMaterializeFor() 596 LLVM_DEBUG(dbgs() << "\tcannot remat for " << UseIdx << '\t' << MI); in reMaterializeFor() 604 LLVM_DEBUG(dbgs() << "\tcannot remat tied reg: " << UseIdx << '\t' << MI); in reMaterializeFor() 621 LLVM_DEBUG(dbgs() << "\tcannot remat for " << UseIdx << '\t' << MI); in reMaterializeFor() 649 LLVM_DEBUG(dbgs() << "\t " << UseIdx << '\t' << MI << '\n'); in reMaterializeFor()
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| H A D | RegisterCoalescer.cpp | 207 SlotIndex UseIdx); 617 .allUsesAvailableAt(OrigMI, OrigIdx, UseIdx); in allUsesAvailableAt() 967 SlotIndex DefIdx = UseIdx.getRegSlot(); in removeCopyByCommutingDef() 1685 SlotIndex UseIdx = LIS->getInstructionIndex(MI); in eliminateUndefCopy() local 1693 if (SR.liveAt(UseIdx)) { in eliminateUndefCopy() 1699 isLive = DstLI.liveAt(UseIdx); in eliminateUndefCopy() 1728 if (S.liveAt(UseIdx)) { in addUndefFlag() 1739 LiveQueryResult Q = Int.Query(UseIdx); in addUndefFlag() 1759 addUndefFlag(*DstInt, UseIdx, MO, SubReg); in updateRegDefsUses() 1816 SlotIndex UseIdx = MIIdx.getRegSlot(true); in updateRegDefsUses() local [all …]
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| H A D | MachineVerifier.cpp | 255 SlotIndex UseIdx, const LiveRange &LR, 2228 unsigned MONum, SlotIndex UseIdx, in checkLivenessAtUse() argument 2232 LiveQueryResult LRQ = LR.Query(UseIdx); in checkLivenessAtUse() 2239 report_context(UseIdx); in checkLivenessAtUse() 2247 report_context(UseIdx); in checkLivenessAtUse() 2332 SlotIndex UseIdx = LiveInts->getInstructionIndex(*MI); in checkLiveness() local 2340 checkLivenessAtUse(MO, MONum, UseIdx, *LR, *Units); in checkLiveness() 2346 checkLivenessAtUse(MO, MONum, UseIdx, *LI, Reg); in checkLiveness() 2356 checkLivenessAtUse(MO, MONum, UseIdx, SR, Reg, SR.LaneMask); in checkLiveness() 2357 LiveQueryResult LRQ = SR.Query(UseIdx); in checkLiveness() [all …]
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| H A D | TargetInstrInfo.cpp | 1090 SDNode *UseNode, unsigned UseIdx) const { in getOperandLatency() 1101 return ItinData->getOperandLatency(DefClass, DefIdx, UseClass, UseIdx); in getOperandLatency() 1260 unsigned UseIdx) const { in getOperandLatency() 1263 return ItinData->getOperandLatency(DefClass, DefIdx, UseClass, UseIdx); in getOperandLatency()
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| H A D | MachineCombiner.cpp | 238 int UseIdx = InstrPtr->findRegisterUseOperandIdx(MO.getReg()); in getDepth() local 240 InstrPtr, UseIdx); in getDepth()
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| H A D | SplitKit.h | 380 SlotIndex UseIdx, MachineBasicBlock &MBB,
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| /llvm-project-15.0.7/llvm/lib/IR/ |
| H A D | AbstractCallSite.cpp | 100 unsigned UseIdx = CB->getArgOperandNo(U); in AbstractCallSite() local 107 if (CBCalleeIdx != UseIdx) in AbstractCallSite()
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| /llvm-project-15.0.7/llvm/lib/Target/ARM/ |
| H A D | ARMBaseInstrInfo.h | 321 unsigned UseIdx) const override; 324 SDNode *UseNode, unsigned UseIdx) const override; 434 unsigned UseIdx, unsigned UseAlign) const; 438 unsigned UseIdx, unsigned UseAlign) const; 443 unsigned UseIdx, unsigned UseAlign) const; 449 const MachineInstr &UseMI, unsigned UseIdx, 465 unsigned UseIdx) const override;
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| H A D | ARMBaseInstrInfo.cpp | 3946 int RegNo = (int)(UseIdx+1) - UseMCID.getNumOperands() + 1; in getVSTMUseCycle() 3948 return ItinData->getOperandCycle(UseClass, UseIdx); in getVSTMUseCycle() 3986 int RegNo = (int)(UseIdx+1) - UseMCID.getNumOperands() + 1; in getSTMUseCycle() 3988 return ItinData->getOperandCycle(UseClass, UseIdx); in getSTMUseCycle() 4070 UseCycle = ItinData->getOperandCycle(UseClass, UseIdx); in getOperandLatency() 4111 UseClass, UseIdx)) in getOperandLatency() 4170 UseIdx = Idx; in getBundledUseMI() 4359 unsigned UseIdx) const { in getOperandLatency() 4422 if (DefMO.isImplicit() || UseMI.getOperand(UseIdx).isImplicit()) in getOperandLatencyImpl() 4434 UseIdx, UseAlign); in getOperandLatencyImpl() [all …]
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| /llvm-project-15.0.7/llvm/include/llvm/CodeGen/ |
| H A D | LiveRangeEdit.h | 203 SlotIndex UseIdx) const; 208 bool canRematerializeAt(Remat &RM, VNInfo *OrigVNI, SlotIndex UseIdx,
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| H A D | TargetInstrInfo.h | 1602 SDNode *UseNode, unsigned UseIdx) const; 1615 unsigned UseIdx) const; 1645 unsigned UseIdx) const { in hasHighOperandLatency() argument
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| /llvm-project-15.0.7/llvm/lib/Target/Hexagon/ |
| H A D | HexagonSubtarget.cpp | 486 int UseIdx = -1; in adjustSchedDependency() local 490 UseIdx = OpNum; in adjustSchedDependency() 495 if (UseIdx == -1) in adjustSchedDependency() 499 *DDst, UseIdx)); in adjustSchedDependency()
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| /llvm-project-15.0.7/llvm/lib/Target/VE/ |
| H A D | VEInstrInfo.cpp | 700 unsigned UseIdx; in FoldImmediate() local 705 UseIdx = 2; in FoldImmediate() 728 UseIdx = 1; in FoldImmediate() 736 UseIdx = 2; in FoldImmediate() 745 UseMI.getOperand(1).setReg(UseMI.getOperand(UseIdx).getReg()); in FoldImmediate() 747 UseMI.getOperand(UseIdx).ChangeToImmediate(ImmVal); in FoldImmediate()
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| /llvm-project-15.0.7/llvm/utils/TableGen/ |
| H A D | SubtargetEmitter.cpp | 1185 for (unsigned UseIdx = 0, EndIdx = Reads.size(); in GenSchedClassTables() local 1186 UseIdx != EndIdx; ++UseIdx) { in GenSchedClassTables() 1188 FindReadAdvance(SchedModels.getSchedRead(Reads[UseIdx]), ProcModel); in GenSchedClassTables() 1209 RAEntry.UseIdx = UseIdx; in GenSchedClassTables() 1316 OS << " {" << RAEntry.UseIdx << ", " in EmitSchedClassTables()
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| /llvm-project-15.0.7/llvm/lib/Target/SystemZ/ |
| H A D | SystemZInstrInfo.cpp | 626 unsigned UseIdx; in FoldImmediate() local 638 UseIdx = 2; in FoldImmediate() 640 UseIdx = 2, CommuteIdx = 1; in FoldImmediate() 652 UseIdx = 2; in FoldImmediate() 654 UseIdx = 2, CommuteIdx = 1; in FoldImmediate() 663 if (!commuteInstruction(UseMI, false, CommuteIdx, UseIdx)) in FoldImmediate() 670 UseMI.getOperand(UseIdx).ChangeToImmediate(ImmVal); in FoldImmediate()
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