Lines Matching refs:UseIdx

207                             SlotIndex UseIdx);
328 void addUndefFlag(const LiveInterval &Int, SlotIndex UseIdx,
614 SlotIndex UseIdx) { in allUsesAvailableAt() argument
617 .allUsesAvailableAt(OrigMI, OrigIdx, UseIdx); in allUsesAvailableAt()
895 SlotIndex UseIdx = LIS->getInstructionIndex(*UseMI); in removeCopyByCommutingDef() local
896 LiveInterval::iterator US = IntA.FindSegmentContaining(UseIdx); in removeCopyByCommutingDef()
946 SlotIndex UseIdx = LIS->getInstructionIndex(*UseMI).getRegSlot(true); in removeCopyByCommutingDef() local
947 LiveInterval::iterator US = IntA.FindSegmentContaining(UseIdx); in removeCopyByCommutingDef()
967 SlotIndex DefIdx = UseIdx.getRegSlot(); in removeCopyByCommutingDef()
1685 SlotIndex UseIdx = LIS->getInstructionIndex(MI); in eliminateUndefCopy() local
1693 if (SR.liveAt(UseIdx)) { in eliminateUndefCopy()
1699 isLive = DstLI.liveAt(UseIdx); in eliminateUndefCopy()
1703 LLVM_DEBUG(dbgs() << "\tnew undef: " << UseIdx << '\t' << MI); in eliminateUndefCopy()
1719 void RegisterCoalescer::addUndefFlag(const LiveInterval &Int, SlotIndex UseIdx, in addUndefFlag() argument
1728 if (S.liveAt(UseIdx)) { in addUndefFlag()
1739 LiveQueryResult Q = Int.Query(UseIdx); in addUndefFlag()
1758 SlotIndex UseIdx = LIS->getInstructionIndex(MI).getRegSlot(true); in updateRegDefsUses() local
1759 addUndefFlag(*DstInt, UseIdx, MO, SubReg); in updateRegDefsUses()
1816 SlotIndex UseIdx = MIIdx.getRegSlot(true); in updateRegDefsUses() local
1817 addUndefFlag(*DstInt, UseIdx, MO, SubUseIdx); in updateRegDefsUses()