| /llvm-project-15.0.7/llvm/unittests/Analysis/ |
| H A D | VectorUtilsTest.cpp | 80 Value *UndefVec = UndefValue::get(FixedVectorType::get(IRB.getInt8Ty(), 4)); in TEST_F() local
81 EXPECT_TRUE(isSplatValue(UndefVec)); in TEST_F()
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| /llvm-project-15.0.7/llvm/lib/CodeGen/GlobalISel/ |
| H A D | MachineIRBuilder.cpp | 675 auto UndefVec = buildUndef(DstTy); in buildShuffleSplat() local
677 auto InsElt = buildInsertVectorElement(DstTy, UndefVec, Src, Zero); in buildShuffleSplat()
679 return buildShuffleVector(DstTy, InsElt, UndefVec, ZeroMask); in buildShuffleSplat()
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| /llvm-project-15.0.7/llvm/lib/Transforms/InstCombine/ |
| H A D | InstCombineVectorOps.cpp | 2030 UndefValue *UndefVec = UndefValue::get(Shuf.getType()); in canonicalizeInsertSplat() local
2032 Value *NewIns = Builder.CreateInsertElement(UndefVec, X, Zero); in canonicalizeInsertSplat()
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| /llvm-project-15.0.7/clang/lib/CodeGen/ |
| H A D | CGExprScalar.cpp | 2103 llvm::Value *UndefVec = llvm::UndefValue::get(DstTy); in VisitCastExpr() local
2106 DstTy, UndefVec, Src, Zero, "castScalableSve"); in VisitCastExpr()
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| H A D | CGCall.cpp | 1305 auto *UndefVec = llvm::UndefValue::get(ScalableDst); in CreateCoercedLoad() local
1308 ScalableDst, UndefVec, Load, Zero, "castScalableSve"); in CreateCoercedLoad()
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| /llvm-project-15.0.7/llvm/lib/Target/X86/ |
| H A D | X86ISelLowering.cpp | 41440 SDValue UndefVec = TLO.DAG.getUNDEF(VT); in SimplifyDemandedVectorEltsForTargetNode() local
41442 insertSubVector(UndefVec, ExtOp, 0, TLO.DAG, DL, ExtSizeInBits); in SimplifyDemandedVectorEltsForTargetNode()
41454 SDValue UndefVec = TLO.DAG.getUNDEF(VT); in SimplifyDemandedVectorEltsForTargetNode() local
41455 SDValue Insert = insertSubVector(UndefVec, Ext, 0, TLO.DAG, DL, 128); in SimplifyDemandedVectorEltsForTargetNode()
41472 SDValue UndefVec = TLO.DAG.getUNDEF(VT); in SimplifyDemandedVectorEltsForTargetNode() local
41474 insertSubVector(UndefVec, ExtOp, 0, TLO.DAG, DL, ExtSizeInBits); in SimplifyDemandedVectorEltsForTargetNode()
41514 SDValue UndefVec = TLO.DAG.getUNDEF(VT); in SimplifyDemandedVectorEltsForTargetNode() local
41516 insertSubVector(UndefVec, ExtOp, 0, TLO.DAG, DL, ExtSizeInBits); in SimplifyDemandedVectorEltsForTargetNode()
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| /llvm-project-15.0.7/llvm/lib/Target/PowerPC/ |
| H A D | PPCISelLowering.cpp | 8425 SDValue UndefVec = DAG.getUNDEF(VecVT); in widenVec() local
8427 Ops[i] = UndefVec; in widenVec()
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| /llvm-project-15.0.7/llvm/lib/Target/AArch64/ |
| H A D | AArch64ISelLowering.cpp | 5145 SDValue UndefVec = DAG.getBuildVector(MVT::v4i16, DL, in LowerTruncateVectorStore() local
5149 Value, UndefVec); in LowerTruncateVectorStore()
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| /llvm-project-15.0.7/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | DAGCombiner.cpp | 22636 SDValue UndefVec = DAG.getUNDEF(N0.getOperand(0).getValueType()); in visitVECTOR_SHUFFLE() local
22638 N0.getOperand(0), UndefVec); in visitVECTOR_SHUFFLE()
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